1 /*	$OpenBSD: itvar.h,v 1.2 2003/11/05 20:57:10 grange Exp $	*/
2 
3 /*
4  * Copyright (c) 2003 Julien Bordet <zejames@greyhats.org>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #ifndef _DEV_ISA_ITVAR_H
29 #define _DEV_ISA_ITVAR_H
30 
31 #define IT_NUM_SENSORS	15
32 
33 /* chip ids */
34 #define IT_ID_IT87	0x90
35 
36 /* ctl registers */
37 
38 #define ITC_ADDR	0x05
39 #define ITC_DATA	0x06
40 
41 /* data registers */
42 
43 #define ITD_CONFIG	0x00
44 #define ITD_ISR1	0x01
45 #define ITD_ISR2	0x02
46 #define ITD_ISR3	0x03
47 #define ITD_SMI1	0x04
48 #define ITD_SMI2	0x05
49 #define ITD_SMI3	0x06
50 #define ITD_IMR1	0x07
51 #define ITD_IMR2	0x08
52 #define ITD_IMR3	0x09
53 #define ITD_VID		0x0a
54 #define ITD_FAN		0x0b
55 
56 #define ITD_FANMINBASE	0x10
57 #define ITD_FANENABLE	0x13
58 
59 #define ITD_SENSORFANBASE	0x0d	/* Fan from 0x0d to 0x0f */
60 #define ITD_SENSORVOLTBASE	0x20	/* Fan from 0x20 to 0x28 */
61 #define ITD_SENSORTEMPBASE	0x29	/* Fan from 0x29 to 0x2b */
62 
63 #define ITD_VOLTMAXBASE	0x30
64 #define ITD_VOLTMINBASE	0x31
65 
66 #define ITD_TEMPMAXBASE 0x40
67 #define ITD_TEMPMINBASE 0x41
68 
69 #define ITD_SBUSADDR	0x48
70 #define ITD_VOLTENABLE	0x50
71 #define ITD_TEMPENABLE	0x51
72 
73 #define ITD_CHIPID	0x58
74 
75 #define IT_VREF		(4096) /* Vref = 4.096 V */
76 
77 struct it_softc {
78 	struct device sc_dev;
79 
80 	bus_space_tag_t it_iot;
81 	bus_space_handle_t it_ioh;
82 
83 	struct sensor sensors[IT_NUM_SENSORS];
84 	u_int numsensors;
85 	void (*refresh_sensor_data)(struct it_softc *);
86 
87 	u_int8_t (*it_readreg)(struct it_softc *, int);
88 	void (*it_writereg)(struct it_softc *, int, int);
89 };
90 
91 #endif
92