1 /* $OpenBSD: iha.c,v 1.23 2004/01/19 00:44:32 krw Exp $ */
2 /*-------------------------------------------------------------------------
3 *
4 * Device driver for the INI-9XXXU/UW or INIC-940/950 PCI SCSI Controller.
5 *
6 * Written for 386bsd and FreeBSD by
7 * Winston Hung <winstonh@initio.com>
8 *
9 * Copyright (c) 1997-1999 Initio Corp
10 * Copyright (c) 2000-2002 Ken Westerback
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer,
17 * without modification, immediately at the beginning of the file.
18 * 2. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
30 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 *-------------------------------------------------------------------------
34 */
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/buf.h>
39 #include <sys/device.h>
40
41 #include <machine/bus.h>
42 #include <machine/intr.h>
43
44 #include <scsi/scsi_all.h>
45 #include <scsi/scsiconf.h>
46 #include <scsi/scsi_message.h>
47
48 #include <dev/ic/iha.h>
49
50 /* #define IHA_DEBUG_STATE */
51
52 struct cfdriver iha_cd = {
53 NULL, "iha", DV_DULL
54 };
55
56 struct scsi_adapter iha_switch = {
57 iha_scsi_cmd, /* int (*scsi_cmd)(struct scsi_xfer *); */
58 iha_minphys, /* void (*scsi_minphys)(struct buf *); */
59 NULL, /* int (*open_target_lu)(void); */
60 NULL /* int (*close_target_lu)(void); */
61 };
62
63 struct scsi_device iha_dev = {
64 NULL, /* Use default error handler */
65 NULL, /* have a queue, served by this */
66 NULL, /* have no async handler */
67 NULL, /* Use default 'done' routine */
68 };
69
70 /*
71 * SCSI Rate Table, indexed by FLAG_SCSI_RATE field of
72 * TCS_Flags.
73 */
74 static const u_int8_t iha_rate_tbl[] = {
75 /* fast 20 */
76 /* nanosecond divide by 4 */
77 12, /* 50ns, 20M */
78 18, /* 75ns, 13.3M */
79 25, /* 100ns, 10M */
80 31, /* 125ns, 8M */
81 37, /* 150ns, 6.6M */
82 43, /* 175ns, 5.7M */
83 50, /* 200ns, 5M */
84 62 /* 250ns, 4M */
85 };
86
87 int iha_setup_sg_list(struct iha_softc *, struct iha_scb *);
88 u_int8_t iha_data_over_run(struct iha_scb *);
89 int iha_push_sense_request(struct iha_softc *, struct iha_scb *);
90 void iha_timeout(void *);
91 int iha_alloc_scbs(struct iha_softc *);
92 void iha_read_eeprom(bus_space_tag_t, bus_space_handle_t,
93 struct iha_nvram *);
94 void iha_se2_instr(bus_space_tag_t, bus_space_handle_t, u_int8_t);
95 u_int16_t iha_se2_rd(bus_space_tag_t, bus_space_handle_t, u_int8_t);
96 void iha_reset_scsi_bus(struct iha_softc *);
97 void iha_reset_chip(struct iha_softc *,
98 bus_space_tag_t, bus_space_handle_t);
99 void iha_reset_dma(bus_space_tag_t, bus_space_handle_t);
100 void iha_reset_tcs(struct tcs *, u_int8_t);
101 void iha_print_info(struct iha_softc *, int);
102 void iha_done_scb(struct iha_softc *, struct iha_scb *);
103 void iha_exec_scb(struct iha_softc *, struct iha_scb *);
104 void iha_main(struct iha_softc *, bus_space_tag_t, bus_space_handle_t);
105 void iha_scsi(struct iha_softc *, bus_space_tag_t, bus_space_handle_t);
106 int iha_wait(struct iha_softc *, bus_space_tag_t, bus_space_handle_t,
107 u_int8_t);
108 void iha_mark_busy_scb(struct iha_scb *);
109 void iha_append_free_scb(struct iha_softc *, struct iha_scb *);
110 struct iha_scb *iha_pop_free_scb(struct iha_softc *);
111 void iha_append_done_scb(struct iha_softc *, struct iha_scb *,
112 u_int8_t);
113 struct iha_scb *iha_pop_done_scb(struct iha_softc *);
114 void iha_append_pend_scb(struct iha_softc *, struct iha_scb *);
115 void iha_push_pend_scb(struct iha_softc *, struct iha_scb *);
116 void iha_del_pend_scb(struct iha_softc *, struct iha_scb *);
117 struct iha_scb *iha_find_pend_scb(struct iha_softc *);
118 void iha_sync_done(struct iha_softc *,
119 bus_space_tag_t, bus_space_handle_t);
120 void iha_wide_done(struct iha_softc *,
121 bus_space_tag_t, bus_space_handle_t);
122 void iha_bad_seq(struct iha_softc *);
123 int iha_next_state(struct iha_softc *,
124 bus_space_tag_t, bus_space_handle_t);
125 int iha_state_1(struct iha_softc *,
126 bus_space_tag_t, bus_space_handle_t);
127 int iha_state_2(struct iha_softc *,
128 bus_space_tag_t, bus_space_handle_t);
129 int iha_state_3(struct iha_softc *,
130 bus_space_tag_t, bus_space_handle_t);
131 int iha_state_4(struct iha_softc *,
132 bus_space_tag_t, bus_space_handle_t);
133 int iha_state_5(struct iha_softc *,
134 bus_space_tag_t, bus_space_handle_t);
135 int iha_state_6(struct iha_softc *,
136 bus_space_tag_t, bus_space_handle_t);
137 int iha_state_8(struct iha_softc *,
138 bus_space_tag_t, bus_space_handle_t);
139 void iha_set_ssig(bus_space_tag_t,
140 bus_space_handle_t, u_int8_t, u_int8_t);
141 int iha_xpad_in(struct iha_softc *,
142 bus_space_tag_t, bus_space_handle_t);
143 int iha_xpad_out(struct iha_softc *,
144 bus_space_tag_t, bus_space_handle_t);
145 int iha_xfer_data(struct iha_scb *,
146 bus_space_tag_t, bus_space_handle_t,
147 int direction);
148 int iha_status_msg(struct iha_softc *,
149 bus_space_tag_t, bus_space_handle_t);
150 int iha_msgin(struct iha_softc *, bus_space_tag_t, bus_space_handle_t);
151 int iha_msgin_sdtr(struct iha_softc *);
152 int iha_msgin_extended(struct iha_softc *,
153 bus_space_tag_t, bus_space_handle_t);
154 int iha_msgin_ignore_wid_resid(struct iha_softc *,
155 bus_space_tag_t, bus_space_handle_t);
156 int iha_msgout(struct iha_softc *,
157 bus_space_tag_t, bus_space_handle_t, u_int8_t);
158 int iha_msgout_extended(struct iha_softc *,
159 bus_space_tag_t, bus_space_handle_t);
160 void iha_msgout_abort(struct iha_softc *,
161 bus_space_tag_t, bus_space_handle_t, u_int8_t);
162 int iha_msgout_reject(struct iha_softc *,
163 bus_space_tag_t, bus_space_handle_t);
164 int iha_msgout_sdtr(struct iha_softc *,
165 bus_space_tag_t, bus_space_handle_t);
166 int iha_msgout_wdtr(struct iha_softc *,
167 bus_space_tag_t, bus_space_handle_t);
168 void iha_select(struct iha_softc *,
169 bus_space_tag_t, bus_space_handle_t,
170 struct iha_scb *, u_int8_t);
171 void iha_busfree(struct iha_softc *,
172 bus_space_tag_t, bus_space_handle_t);
173 int iha_resel(struct iha_softc *, bus_space_tag_t, bus_space_handle_t);
174 void iha_abort_xs(struct iha_softc *, struct scsi_xfer *, u_int8_t);
175
176 /*
177 * iha_intr - the interrupt service routine for the iha driver
178 */
179 int
iha_intr(arg)180 iha_intr(arg)
181 void *arg;
182 {
183 bus_space_handle_t ioh;
184 struct iha_softc *sc;
185 bus_space_tag_t iot;
186 int s;
187
188 sc = (struct iha_softc *)arg;
189 iot = sc->sc_iot;
190 ioh = sc->sc_ioh;
191
192 if ((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0)
193 return (0);
194
195 s = splbio(); /* XXX - Or are interrupts off when ISR's are called? */
196
197 if (sc->HCS_Semaph != SEMAPH_IN_MAIN) {
198 /* XXX - need these inside a splbio()/splx()? */
199 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL);
200 sc->HCS_Semaph = SEMAPH_IN_MAIN;
201
202 iha_main(sc, iot, ioh);
203
204 sc->HCS_Semaph = ~SEMAPH_IN_MAIN;
205 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP));
206 }
207
208 splx(s);
209
210 return (1);
211 }
212
213 /*
214 * iha_setup_sg_list - initialize scatter gather list of pScb from
215 * pScb->SCB_DataDma.
216 */
217 int
iha_setup_sg_list(sc,pScb)218 iha_setup_sg_list(sc, pScb)
219 struct iha_softc *sc;
220 struct iha_scb *pScb;
221 {
222 bus_dma_segment_t *segs = pScb->SCB_DataDma->dm_segs;
223 int i, error, nseg = pScb->SCB_DataDma->dm_nsegs;
224
225 if (nseg > 1) {
226 error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_SGDma,
227 pScb->SCB_SGList, sizeof(pScb->SCB_SGList), NULL,
228 (pScb->SCB_Flags & SCSI_NOSLEEP) ?
229 BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
230 if (error) {
231 sc_print_addr(pScb->SCB_Xs->sc_link);
232 printf("error %d loading SG list dma map\n", error);
233 return (error);
234 }
235
236 /*
237 * Only set FLAG_SG when SCB_SGDma is loaded so iha_scsi_done
238 * will not unload an unloaded map.
239 */
240 pScb->SCB_Flags |= FLAG_SG;
241 bzero(pScb->SCB_SGList, sizeof(pScb->SCB_SGList));
242
243 pScb->SCB_SGIdx = 0;
244 pScb->SCB_SGCount = nseg;
245
246 for (i=0; i < nseg; i++) {
247 pScb->SCB_SGList[i].SG_Len = segs[i].ds_len;
248 pScb->SCB_SGList[i].SG_Addr = segs[i].ds_addr;
249 }
250
251 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
252 0, sizeof(pScb->SCB_SGList), BUS_DMASYNC_PREWRITE);
253 }
254
255 return (0);
256 }
257
258 /*
259 * iha_scsi_cmd - start execution of a SCSI command. This is called
260 * from the generic SCSI driver via the field
261 * sc_adapter.scsi_cmd of iha_softc.
262 */
263 int
iha_scsi_cmd(xs)264 iha_scsi_cmd(xs)
265 struct scsi_xfer *xs;
266 {
267 struct iha_scb *pScb;
268 struct scsi_link *sc_link = xs->sc_link;
269 struct iha_softc *sc = sc_link->adapter_softc;
270 int error;
271
272 if ((xs->cmdlen > 12) || (sc_link->target >= IHA_MAX_TARGETS)) {
273 xs->error = XS_DRIVER_STUFFUP;
274 return (COMPLETE);
275 }
276
277 pScb = iha_pop_free_scb(sc);
278 if (pScb == NULL) {
279 /* XXX - different xs->error/return if
280 * SCSI_POLL/_NOSLEEP? */
281 xs->error = XS_BUSY;
282 return (TRY_AGAIN_LATER);
283 }
284
285 pScb->SCB_Target = sc_link->target;
286 pScb->SCB_Lun = sc_link->lun;
287 pScb->SCB_Tcs = &sc->HCS_Tcs[pScb->SCB_Target];
288 pScb->SCB_Flags = xs->flags;
289 pScb->SCB_Ident = MSG_IDENTIFYFLAG |
290 (pScb->SCB_Lun & MSG_IDENTIFY_LUNMASK);
291
292 if ((xs->cmd->opcode != REQUEST_SENSE)
293 && ((pScb->SCB_Flags & SCSI_POLL) == 0))
294 pScb->SCB_Ident |= MSG_IDENTIFY_DISCFLAG;
295
296 pScb->SCB_Xs = xs;
297 pScb->SCB_CDBLen = xs->cmdlen;
298 bcopy(xs->cmd, &pScb->SCB_CDB, xs->cmdlen);
299
300 pScb->SCB_BufCharsLeft = pScb->SCB_BufChars = xs->datalen;
301
302 if ((pScb->SCB_Flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) != 0) {
303 #ifdef TFS
304 if (pScb->SCB_Flags & SCSI_DATA_UIO)
305 error = bus_dmamap_load_uio(sc->sc_dmat,
306 pScb->SCB_DataDma, (struct uio *)xs->data,
307 (pScb->SCB_Flags & SCSI_NOSLEEP) ?
308 BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
309 else
310 #endif /* TFS */
311 error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_DataDma,
312 xs->data, pScb->SCB_BufChars, NULL,
313 (pScb->SCB_Flags & SCSI_NOSLEEP) ?
314 BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
315
316 if (error) {
317 sc_print_addr(xs->sc_link);
318 if (error == EFBIG)
319 printf("buffer needs >%d dma segments\n",
320 IHA_MAX_SG_ENTRIES);
321 else
322 printf("error %d loading buffer dma map\n",
323 error);
324
325 iha_append_free_scb(sc, pScb);
326
327 xs->error = XS_DRIVER_STUFFUP;
328 return (COMPLETE);
329 }
330 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma,
331 0, pScb->SCB_BufChars,
332 (pScb->SCB_Flags & SCSI_DATA_IN) ?
333 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
334
335 error = iha_setup_sg_list(sc, pScb);
336 if (error) {
337 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma);
338 xs->error = XS_DRIVER_STUFFUP;
339 return (COMPLETE);
340 }
341
342 }
343
344 /*
345 * Always initialize the stimeout structure as it may
346 * contain garbage that confuses timeout_del() later on.
347 * But, timeout_add() ONLY if we are not polling.
348 */
349 timeout_set(&xs->stimeout, iha_timeout, pScb);
350 if ((pScb->SCB_Flags & SCSI_POLL) == 0)
351 timeout_add(&xs->stimeout, (xs->timeout/1000) * hz);
352
353 iha_exec_scb(sc, pScb);
354
355 if ((xs->flags & ITSDONE) == 0)
356 return (SUCCESSFULLY_QUEUED);
357 else
358 return (COMPLETE);
359 }
360
361 /*
362 * iha_init_tulip - initialize the inic-940/950 card and the rest of the
363 * iha_softc structure supplied
364 */
365 int
iha_init_tulip(sc)366 iha_init_tulip(sc)
367 struct iha_softc *sc;
368 {
369 struct iha_scb *pScb;
370 struct iha_nvram_scsi *pScsi;
371 bus_space_handle_t ioh;
372 struct iha_nvram iha_nvram;
373 bus_space_tag_t iot;
374 int i, error;
375
376 iot = sc->sc_iot;
377 ioh = sc->sc_ioh;
378
379 iha_read_eeprom(iot, ioh, &iha_nvram);
380
381 pScsi = &iha_nvram.NVM_Scsi[0];
382
383 /*
384 * fill in the prototype scsi_link.
385 */
386 sc->sc_link.adapter_softc = sc;
387 sc->sc_link.adapter = &iha_switch;
388 sc->sc_link.device = &iha_dev;
389 sc->sc_link.openings = 4; /* # xs's allowed per device */
390 sc->sc_link.adapter_target = pScsi->NVM_SCSI_Id;
391 sc->sc_link.adapter_buswidth = pScsi->NVM_SCSI_Targets;
392
393 /*
394 * fill in the rest of the iha_softc fields
395 */
396 sc->HCS_Semaph = ~SEMAPH_IN_MAIN;
397 sc->HCS_JSStatus0 = 0;
398 sc->HCS_ActScb = NULL;
399
400 TAILQ_INIT(&sc->HCS_FreeScb);
401 TAILQ_INIT(&sc->HCS_PendScb);
402 TAILQ_INIT(&sc->HCS_DoneScb);
403
404 error = iha_alloc_scbs(sc);
405 if (error != 0)
406 return (error);
407
408 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) {
409 pScb->SCB_TagId = i;
410
411 error = bus_dmamap_create(sc->sc_dmat,
412 (IHA_MAX_SG_ENTRIES-1) * PAGE_SIZE, IHA_MAX_SG_ENTRIES,
413 (IHA_MAX_SG_ENTRIES-1) * PAGE_SIZE, 0,
414 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &pScb->SCB_DataDma);
415
416 if (error != 0) {
417 printf("%s: couldn't create SCB data DMA map, error = %d\n",
418 sc->sc_dev.dv_xname, error);
419 return (error);
420 }
421
422 error = bus_dmamap_create(sc->sc_dmat,
423 sizeof(pScb->SCB_SGList), 1,
424 sizeof(pScb->SCB_SGList), 0,
425 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
426 &pScb->SCB_SGDma);
427 if (error != 0) {
428 printf("%s: couldn't create SCB SG DMA map, error = %d\n",
429 sc->sc_dev.dv_xname, error);
430 return (error);
431 }
432
433 TAILQ_INSERT_TAIL(&sc->HCS_FreeScb, pScb, SCB_ScbList);
434 }
435
436 /* Mask all the interrupts */
437 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL);
438
439 /* Stop any I/O and reset the scsi module */
440 iha_reset_dma(iot, ioh);
441 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSMOD);
442
443 /* Program HBA's SCSI ID */
444 bus_space_write_1(iot, ioh, TUL_SID, sc->sc_link.adapter_target << 4);
445
446 /*
447 * Configure the channel as requested by the NVRAM settings read
448 * into iha_nvram by iha_read_eeprom() above.
449 */
450
451 if ((pScsi->NVM_SCSI_Cfg & CFG_EN_PAR) != 0)
452 sc->HCS_SConf1 = (SCONFIG0DEFAULT | SPCHK);
453 else
454 sc->HCS_SConf1 = (SCONFIG0DEFAULT);
455 bus_space_write_1(iot, ioh, TUL_SCONFIG0, sc->HCS_SConf1);
456
457 /* selection time out in units of 1.6385 millisecond = 250 ms */
458 bus_space_write_1(iot, ioh, TUL_STIMO, 153);
459
460 /* Enable desired SCSI termination configuration read from eeprom */
461 bus_space_write_1(iot, ioh, TUL_DCTRL0,
462 (pScsi->NVM_SCSI_Cfg & (CFG_ACT_TERM1 | CFG_ACT_TERM2)));
463
464 bus_space_write_1(iot, ioh, TUL_GCTRL1,
465 ((pScsi->NVM_SCSI_Cfg & CFG_AUTO_TERM) >> 4)
466 | (bus_space_read_1(iot, ioh, TUL_GCTRL1) & (~ATDEN)));
467
468 for (i = 0; i < IHA_MAX_TARGETS; i++) {
469 sc->HCS_Tcs[i].TCS_Flags = pScsi->NVM_SCSI_TargetFlags[i];
470 iha_reset_tcs(&sc->HCS_Tcs[i], sc->HCS_SConf1);
471 }
472
473 iha_reset_chip(sc, iot, ioh);
474 bus_space_write_1(iot, ioh, TUL_SIEN, ALL_INTERRUPTS);
475
476 return (0);
477 }
478
479 /*
480 * iha_minphys - reduce bp->b_bcount to something less than
481 * or equal to the largest I/O possible through
482 * the adapter. Called from higher layers
483 * via sc->sc_adapter.scsi_minphys.
484 */
485 void
iha_minphys(bp)486 iha_minphys(bp)
487 struct buf *bp;
488 {
489 if (bp->b_bcount > ((IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE))
490 bp->b_bcount = ((IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE);
491
492 minphys(bp);
493 }
494
495 /*
496 * iha_reset_dma - abort any active DMA xfer, reset tulip FIFO.
497 */
498 void
iha_reset_dma(iot,ioh)499 iha_reset_dma(iot, ioh)
500 bus_space_tag_t iot;
501 bus_space_handle_t ioh;
502 {
503 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) {
504 /* if DMA xfer is pending, abort DMA xfer */
505 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR);
506 /* wait Abort DMA xfer done */
507 while ((bus_space_read_1(iot, ioh, TUL_ISTUS0) & DABT) == 0)
508 ;
509 }
510
511 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
512 }
513
514 /*
515 * iha_pop_free_scb - return the first free SCB, or NULL if there are none.
516 */
517 struct iha_scb *
iha_pop_free_scb(sc)518 iha_pop_free_scb(sc)
519 struct iha_softc *sc;
520 {
521 struct iha_scb *pScb;
522 int s;
523
524 s = splbio();
525
526 pScb = TAILQ_FIRST(&sc->HCS_FreeScb);
527
528 if (pScb != NULL) {
529 pScb->SCB_Status = STATUS_RENT;
530 TAILQ_REMOVE(&sc->HCS_FreeScb, pScb, SCB_ScbList);
531 }
532
533 splx(s);
534
535 return (pScb);
536 }
537
538 /*
539 * iha_append_free_scb - append the supplied SCB to the tail of the
540 * HCS_FreeScb queue after clearing and resetting
541 * everything possible.
542 */
543 void
iha_append_free_scb(sc,pScb)544 iha_append_free_scb(sc, pScb)
545 struct iha_softc *sc;
546 struct iha_scb *pScb;
547 {
548 int s;
549
550 s = splbio();
551
552 if (pScb == sc->HCS_ActScb)
553 sc->HCS_ActScb = NULL;
554
555 pScb->SCB_Status = STATUS_QUEUED;
556 pScb->SCB_HaStat = HOST_OK;
557 pScb->SCB_TaStat = SCSI_OK;
558
559 pScb->SCB_NxtStat = 0;
560 pScb->SCB_Flags = 0;
561 pScb->SCB_Target = 0;
562 pScb->SCB_Lun = 0;
563 pScb->SCB_CDBLen = 0;
564 pScb->SCB_Ident = 0;
565 pScb->SCB_TagMsg = 0;
566
567 pScb->SCB_BufChars = 0;
568 pScb->SCB_BufCharsLeft = 0;
569
570 pScb->SCB_Xs = NULL;
571 pScb->SCB_Tcs = NULL;
572
573 bzero(pScb->SCB_CDB, sizeof(pScb->SCB_CDB));
574
575 /*
576 * SCB_TagId is set at initialization and never changes
577 */
578
579 TAILQ_INSERT_TAIL(&sc->HCS_FreeScb, pScb, SCB_ScbList);
580
581 splx(s);
582 }
583
584 void
iha_append_pend_scb(sc,pScb)585 iha_append_pend_scb(sc, pScb)
586 struct iha_softc *sc;
587 struct iha_scb *pScb;
588 {
589 /* ASSUMPTION: only called within a splbio()/splx() pair */
590
591 if (pScb == sc->HCS_ActScb)
592 sc->HCS_ActScb = NULL;
593
594 pScb->SCB_Status = STATUS_QUEUED;
595
596 TAILQ_INSERT_TAIL(&sc->HCS_PendScb, pScb, SCB_ScbList);
597 }
598
599 void
iha_push_pend_scb(sc,pScb)600 iha_push_pend_scb(sc, pScb)
601 struct iha_softc *sc;
602 struct iha_scb *pScb;
603 {
604 int s;
605
606 s = splbio();
607
608 if (pScb == sc->HCS_ActScb)
609 sc->HCS_ActScb = NULL;
610
611 pScb->SCB_Status = STATUS_QUEUED;
612
613 TAILQ_INSERT_HEAD(&sc->HCS_PendScb, pScb, SCB_ScbList);
614
615 splx(s);
616 }
617
618 /*
619 * iha_find_pend_scb - scan the pending queue for a SCB that can be
620 * processed immediately. Return NULL if none found
621 * and a pointer to the SCB if one is found. If there
622 * is an active SCB, return NULL!
623 */
624 struct iha_scb *
iha_find_pend_scb(sc)625 iha_find_pend_scb(sc)
626 struct iha_softc *sc;
627 {
628 struct iha_scb *pScb;
629 struct tcs *pTcs;
630 int s;
631
632 s = splbio();
633
634 if (sc->HCS_ActScb != NULL)
635 pScb = NULL;
636
637 else
638 TAILQ_FOREACH(pScb, &sc->HCS_PendScb, SCB_ScbList) {
639 if ((pScb->SCB_Flags & SCSI_RESET) != 0)
640 /* ALWAYS willing to reset a device */
641 break;
642
643 pTcs = pScb->SCB_Tcs;
644
645 if ((pScb->SCB_TagMsg) != 0) {
646 /*
647 * A Tagged I/O. OK to start If no
648 * non-tagged I/O is active on the same
649 * target
650 */
651 if (pTcs->TCS_NonTagScb == NULL)
652 break;
653
654 } else if (pScb->SCB_CDB[0] == REQUEST_SENSE) {
655 /*
656 * OK to do a non-tagged request sense
657 * even if a non-tagged I/O has been
658 * started, because we don't allow any
659 * disconnect during a request sense op
660 */
661 break;
662
663 } else if (pTcs->TCS_TagCnt == 0) {
664 /*
665 * No tagged I/O active on this target,
666 * ok to start a non-tagged one if one
667 * is not already active
668 */
669 if (pTcs->TCS_NonTagScb == NULL)
670 break;
671 }
672 }
673
674 splx(s);
675
676 return (pScb);
677 }
678
679 /*
680 * iha_del_pend_scb - remove pScb from HCS_PendScb
681 */
682 void
iha_del_pend_scb(sc,pScb)683 iha_del_pend_scb(sc, pScb)
684 struct iha_softc *sc;
685 struct iha_scb *pScb;
686 {
687 int s;
688
689 s = splbio();
690
691 TAILQ_REMOVE(&sc->HCS_PendScb, pScb, SCB_ScbList);
692
693 splx(s);
694 }
695
696 void
iha_mark_busy_scb(pScb)697 iha_mark_busy_scb(pScb)
698 struct iha_scb *pScb;
699 {
700 int s;
701
702 s = splbio();
703
704 pScb->SCB_Status = STATUS_BUSY;
705
706 if (pScb->SCB_TagMsg == 0)
707 pScb->SCB_Tcs->TCS_NonTagScb = pScb;
708 else
709 pScb->SCB_Tcs->TCS_TagCnt++;
710
711 splx(s);
712 }
713
714 void
iha_append_done_scb(sc,pScb,hastat)715 iha_append_done_scb(sc, pScb, hastat)
716 struct iha_softc *sc;
717 struct iha_scb *pScb;
718 u_int8_t hastat;
719 {
720 struct tcs *pTcs;
721 int s;
722
723 s = splbio();
724
725 if (pScb->SCB_Xs != NULL)
726 timeout_del(&pScb->SCB_Xs->stimeout);
727
728 if (pScb == sc->HCS_ActScb)
729 sc->HCS_ActScb = NULL;
730
731 pTcs = pScb->SCB_Tcs;
732
733 if (pScb->SCB_TagMsg != 0) {
734 if (pTcs->TCS_TagCnt)
735 pTcs->TCS_TagCnt--;
736 } else if (pTcs->TCS_NonTagScb == pScb)
737 pTcs->TCS_NonTagScb = NULL;
738
739 pScb->SCB_Status = STATUS_QUEUED;
740 pScb->SCB_HaStat = hastat;
741
742 TAILQ_INSERT_TAIL(&sc->HCS_DoneScb, pScb, SCB_ScbList);
743
744 splx(s);
745 }
746
747 struct iha_scb *
iha_pop_done_scb(sc)748 iha_pop_done_scb(sc)
749 struct iha_softc *sc;
750 {
751 struct iha_scb *pScb;
752 int s;
753
754 s = splbio();
755
756 pScb = TAILQ_FIRST(&sc->HCS_DoneScb);
757
758 if (pScb != NULL) {
759 pScb->SCB_Status = STATUS_RENT;
760 TAILQ_REMOVE(&sc->HCS_DoneScb, pScb, SCB_ScbList);
761 }
762
763 splx(s);
764
765 return (pScb);
766 }
767
768 /*
769 * iha_abort_xs - find the SCB associated with the supplied xs and
770 * stop all processing on it, moving it to the done
771 * queue with the supplied host status value.
772 */
773 void
iha_abort_xs(sc,xs,hastat)774 iha_abort_xs(sc, xs, hastat)
775 struct iha_softc *sc;
776 struct scsi_xfer *xs;
777 u_int8_t hastat;
778 {
779 struct iha_scb *pScb;
780 int i, s;
781
782 s = splbio();
783
784 /* Check the pending queue for the SCB pointing to xs */
785
786 TAILQ_FOREACH(pScb, &sc->HCS_PendScb, SCB_ScbList)
787 if (pScb->SCB_Xs == xs) {
788 iha_del_pend_scb(sc, pScb);
789 iha_append_done_scb(sc, pScb, hastat);
790 splx(s);
791 return;
792 }
793
794 /*
795 * If that didn't work, check all BUSY/SELECTING SCB's for one
796 * pointing to xs
797 */
798
799 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++)
800 switch (pScb->SCB_Status) {
801 case STATUS_BUSY:
802 case STATUS_SELECT:
803 if (pScb->SCB_Xs == xs) {
804 iha_append_done_scb(sc, pScb, hastat);
805 splx(s);
806 return;
807 }
808 break;
809 default:
810 break;
811 }
812
813 splx(s);
814 }
815
816 /*
817 * iha_bad_seq - a SCSI bus phase was encountered out of the
818 * correct/expected sequence. Reset the SCSI bus.
819 */
820 void
iha_bad_seq(sc)821 iha_bad_seq(sc)
822 struct iha_softc *sc;
823 {
824 struct iha_scb *pScb = sc->HCS_ActScb;
825
826 if (pScb != NULL)
827 iha_append_done_scb(sc, pScb, HOST_BAD_PHAS);
828
829 iha_reset_scsi_bus(sc);
830 iha_reset_chip(sc, sc->sc_iot, sc->sc_ioh);
831 }
832
833 /*
834 * iha_push_sense_request - obtain auto sense data by pushing the
835 * SCB needing it back onto the pending
836 * queue with a REQUEST_SENSE CDB.
837 */
838 int
iha_push_sense_request(sc,pScb)839 iha_push_sense_request(sc, pScb)
840 struct iha_softc *sc;
841 struct iha_scb *pScb;
842 {
843 struct scsi_sense *sensecmd;
844 int error;
845
846 /* First sync & unload any existing DataDma and SGDma maps */
847 if ((pScb->SCB_Flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) != 0) {
848 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma,
849 0, pScb->SCB_BufChars,
850 ((pScb->SCB_Flags & SCSI_DATA_IN) ?
851 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
852 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma);
853 /* Don't unload this map again until it is reloaded */
854 pScb->SCB_Flags &= ~(SCSI_DATA_IN | SCSI_DATA_OUT);
855 }
856 if ((pScb->SCB_Flags & FLAG_SG) != 0) {
857 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
858 0, sizeof(pScb->SCB_SGList),
859 BUS_DMASYNC_POSTWRITE);
860 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_SGDma);
861 /* Don't unload this map again until it is reloaded */
862 pScb->SCB_Flags &= ~FLAG_SG;
863 }
864
865 pScb->SCB_BufChars = sizeof(pScb->SCB_ScsiSenseData);
866 pScb->SCB_BufCharsLeft = sizeof(pScb->SCB_ScsiSenseData);
867 bzero(&pScb->SCB_ScsiSenseData, sizeof(pScb->SCB_ScsiSenseData));
868
869 error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_DataDma,
870 &pScb->SCB_ScsiSenseData,
871 sizeof(pScb->SCB_ScsiSenseData), NULL,
872 (pScb->SCB_Flags & SCSI_NOSLEEP) ?
873 BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
874 if (error) {
875 sc_print_addr(pScb->SCB_Xs->sc_link);
876 printf("error %d loading request sense buffer dma map\n",
877 error);
878 return (error);
879 }
880 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma,
881 0, pScb->SCB_BufChars, BUS_DMASYNC_PREREAD);
882
883 /* Save _POLL and _NOSLEEP flags. */
884 pScb->SCB_Flags &= SCSI_POLL | SCSI_NOSLEEP;
885 pScb->SCB_Flags |= FLAG_RSENS | SCSI_DATA_IN;
886
887 error = iha_setup_sg_list(sc, pScb);
888 if (error)
889 return (error);
890
891 pScb->SCB_Ident &= ~MSG_IDENTIFY_DISCFLAG;
892
893 pScb->SCB_TagMsg = 0;
894 pScb->SCB_TaStat = SCSI_OK;
895
896 bzero(pScb->SCB_CDB, sizeof(pScb->SCB_CDB));
897
898 sensecmd = (struct scsi_sense *)pScb->SCB_CDB;
899 pScb->SCB_CDBLen = sizeof(*sensecmd);
900 sensecmd->opcode = REQUEST_SENSE;
901 sensecmd->byte2 = pScb->SCB_Xs->sc_link->lun << 5;
902 sensecmd->length = sizeof(pScb->SCB_ScsiSenseData);
903
904 if ((pScb->SCB_Flags & SCSI_POLL) == 0)
905 timeout_add(&pScb->SCB_Xs->stimeout,
906 (pScb->SCB_Xs->timeout/1000) * hz);
907
908 iha_push_pend_scb(sc, pScb);
909
910 return (0);
911 }
912
913 /*
914 * iha_main - process the active SCB, taking one off pending and making it
915 * active if necessary, and any done SCB's created as
916 * a result until there are no interrupts pending and no pending
917 * SCB's that can be started.
918 */
919 void
iha_main(sc,iot,ioh)920 iha_main(sc, iot, ioh)
921 struct iha_softc *sc;
922 bus_space_tag_t iot;
923 bus_space_handle_t ioh;
924 {
925 struct iha_scb *pScb;
926
927 for (;;) {
928 iha_scsi_label:
929 iha_scsi(sc, iot, ioh);
930
931 while ((pScb = iha_pop_done_scb(sc)) != NULL) {
932
933 switch (pScb->SCB_TaStat) {
934 case SCSI_TERMINATED:
935 case SCSI_ACA_ACTIVE:
936 case SCSI_CHECK:
937 pScb->SCB_Tcs->TCS_Flags &=
938 ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE);
939
940 if ((pScb->SCB_Flags & FLAG_RSENS) != 0)
941 /* Check condition on check condition*/
942 pScb->SCB_HaStat = HOST_BAD_PHAS;
943 else if (iha_push_sense_request(sc, pScb) != 0)
944 /* Could not push sense request */
945 pScb->SCB_HaStat = HOST_BAD_PHAS;
946 else
947 /* REQUEST SENSE ready to process */
948 goto iha_scsi_label;
949 break;
950
951 default:
952 if ((pScb->SCB_Flags & FLAG_RSENS) != 0)
953 /*
954 * Return the original SCSI_CHECK, not
955 * the status of the request sense
956 * command!
957 */
958 pScb->SCB_TaStat = SCSI_CHECK;
959 break;
960 }
961
962 iha_done_scb(sc, pScb);
963 }
964
965 /*
966 * If there are no interrupts pending, or we can't start
967 * a pending sc, break out of the for(;;). Otherwise
968 * continue the good work with another call to
969 * iha_scsi().
970 */
971 if (((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0)
972 && (iha_find_pend_scb(sc) == NULL))
973 break;
974 }
975 }
976
977 /*
978 * iha_scsi - service any outstanding interrupts. If there are none, try to
979 * start another SCB currently in the pending queue.
980 */
981 void
iha_scsi(sc,iot,ioh)982 iha_scsi(sc, iot, ioh)
983 struct iha_softc *sc;
984 bus_space_tag_t iot;
985 bus_space_handle_t ioh;
986 {
987 struct iha_scb *pScb;
988 struct tcs *pTcs;
989 u_int8_t stat;
990 int i;
991
992 /* service pending interrupts asap */
993
994 stat = bus_space_read_1(iot, ioh, TUL_STAT0);
995 if ((stat & INTPD) != 0) {
996 sc->HCS_JSStatus0 = stat;
997 sc->HCS_JSStatus1 = bus_space_read_1(iot, ioh, TUL_STAT1);
998 sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT);
999
1000 sc->HCS_Phase = sc->HCS_JSStatus0 & PH_MASK;
1001
1002 if ((sc->HCS_JSInt & SRSTD) != 0) {
1003 iha_reset_scsi_bus(sc);
1004 return;
1005 }
1006
1007 if ((sc->HCS_JSInt & RSELED) != 0) {
1008 iha_resel(sc, iot, ioh);
1009 return;
1010 }
1011
1012 if ((sc->HCS_JSInt & (STIMEO | DISCD)) != 0) {
1013 iha_busfree(sc, iot, ioh);
1014 return;
1015 }
1016
1017 if ((sc->HCS_JSInt & (SCMDN | SBSRV)) != 0) {
1018 iha_next_state(sc, iot, ioh);
1019 return;
1020 }
1021
1022 if ((sc->HCS_JSInt & SELED) != 0)
1023 iha_set_ssig(iot, ioh, 0, 0);
1024 }
1025
1026 /*
1027 * There were no interrupts pending which required action elsewhere, so
1028 * see if it is possible to start the selection phase on a pending SCB
1029 */
1030 if ((pScb = iha_find_pend_scb(sc)) == NULL)
1031 return;
1032
1033 pTcs = pScb->SCB_Tcs;
1034
1035 /* program HBA's SCSI ID & target SCSI ID */
1036 bus_space_write_1(iot, ioh, TUL_SID,
1037 (sc->sc_link.adapter_target << 4) | pScb->SCB_Target);
1038
1039 if ((pScb->SCB_Flags & SCSI_RESET) == 0) {
1040 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period);
1041
1042 if (((pTcs->TCS_Flags & FLAG_NO_NEG_WIDE) == 0)
1043 ||
1044 ((pTcs->TCS_Flags & FLAG_NO_NEG_SYNC) == 0))
1045 iha_select(sc, iot, ioh, pScb, SELATNSTOP);
1046
1047 else if (pScb->SCB_TagMsg != 0)
1048 iha_select(sc, iot, ioh, pScb, SEL_ATN3);
1049
1050 else
1051 iha_select(sc, iot, ioh, pScb, SEL_ATN);
1052
1053 } else {
1054 iha_select(sc, iot, ioh, pScb, SELATNSTOP);
1055 pScb->SCB_NxtStat = 8;
1056 }
1057
1058 if ((pScb->SCB_Flags & SCSI_POLL) != 0) {
1059 for (i = pScb->SCB_Xs->timeout; i > 0; i--) {
1060 if (iha_wait(sc, iot, ioh, NO_OP) == -1)
1061 break;
1062 if (iha_next_state(sc, iot, ioh) == -1)
1063 break;
1064 delay(1000); /* Only happens in boot, so it's ok */
1065 }
1066
1067 /*
1068 * Since done queue processing not done until AFTER this
1069 * function returns, pScb is on the done queue, not
1070 * the free queue at this point and still has valid data
1071 *
1072 * Conversely, xs->error has not been set yet
1073 */
1074 if (i == 0)
1075 iha_timeout(pScb);
1076
1077 else if ((pScb->SCB_CDB[0] == INQUIRY)
1078 && (pScb->SCB_Lun == 0)
1079 && (pScb->SCB_HaStat == HOST_OK)
1080 && (pScb->SCB_TaStat == SCSI_OK))
1081 iha_print_info(sc, pScb->SCB_Target);
1082 }
1083 }
1084
1085 /*
1086 * iha_data_over_run - return HOST_OK for all SCSI opcodes where BufCharsLeft
1087 * is an 'Allocation Length'. All other SCSI opcodes
1088 * get HOST_DO_DU as they SHOULD have xferred all the
1089 * data requested.
1090 *
1091 * The list of opcodes using 'Allocation Length' was
1092 * found by scanning all the SCSI-3 T10 drafts. See
1093 * www.t10.org for the curious with a .pdf reader.
1094 */
1095 u_int8_t
iha_data_over_run(pScb)1096 iha_data_over_run(pScb)
1097 struct iha_scb *pScb;
1098 {
1099 switch (pScb->SCB_CDB[0]) {
1100 case 0x03: /* Request Sense SPC-2 */
1101 case 0x12: /* Inquiry SPC-2 */
1102 case 0x1a: /* Mode Sense (6 byte version) SPC-2 */
1103 case 0x1c: /* Receive Diagnostic Results SPC-2 */
1104 case 0x23: /* Read Format Capacities MMC-2 */
1105 case 0x29: /* Read Generation SBC */
1106 case 0x34: /* Read Position SSC-2 */
1107 case 0x37: /* Read Defect Data SBC */
1108 case 0x3c: /* Read Buffer SPC-2 */
1109 case 0x42: /* Read Sub Channel MMC-2 */
1110 case 0x43: /* Read TOC/PMA/ATIP MMC */
1111
1112 /* XXX - 2 with same opcode of 0x44? */
1113 case 0x44: /* Read Header/Read Density Suprt MMC/SSC*/
1114
1115 case 0x46: /* Get Configuration MMC-2 */
1116 case 0x4a: /* Get Event/Status Notification MMC-2 */
1117 case 0x4d: /* Log Sense SPC-2 */
1118 case 0x51: /* Read Disc Information MMC */
1119 case 0x52: /* Read Track Information MMC */
1120 case 0x59: /* Read Master CUE MMC */
1121 case 0x5a: /* Mode Sense (10 byte version) SPC-2 */
1122 case 0x5c: /* Read Buffer Capacity MMC */
1123 case 0x5e: /* Persistent Reserve In SPC-2 */
1124 case 0x84: /* Receive Copy Results SPC-2 */
1125 case 0xa0: /* Report LUNs SPC-2 */
1126 case 0xa3: /* Various Report requests SBC-2/SCC-2*/
1127 case 0xa4: /* Report Key MMC-2 */
1128 case 0xad: /* Read DVD Structure MMC-2 */
1129 case 0xb4: /* Read Element Status (Attached) SMC */
1130 case 0xb5: /* Request Volume Element Address SMC */
1131 case 0xb7: /* Read Defect Data (12 byte ver.) SBC */
1132 case 0xb8: /* Read Element Status (Independ.) SMC */
1133 case 0xba: /* Report Redundancy SCC-2 */
1134 case 0xbd: /* Mechanism Status MMC */
1135 case 0xbe: /* Report Basic Redundancy SCC-2 */
1136
1137 return (HOST_OK);
1138 break;
1139
1140 default:
1141 return (HOST_DO_DU);
1142 break;
1143 }
1144 }
1145
1146 /*
1147 * iha_next_state - process the current SCB as requested in it's
1148 * SCB_NxtStat member.
1149 */
1150 int
iha_next_state(sc,iot,ioh)1151 iha_next_state(sc, iot, ioh)
1152 struct iha_softc *sc;
1153 bus_space_tag_t iot;
1154 bus_space_handle_t ioh;
1155 {
1156 if (sc->HCS_ActScb == NULL)
1157 return (-1);
1158
1159 switch (sc->HCS_ActScb->SCB_NxtStat) {
1160 case 1:
1161 if (iha_state_1(sc, iot, ioh) == 3)
1162 goto state_3;
1163 break;
1164
1165 case 2:
1166 switch (iha_state_2(sc, iot, ioh)) {
1167 case 3: goto state_3;
1168 case 4: goto state_4;
1169 default: break;
1170 }
1171 break;
1172
1173 case 3:
1174 state_3:
1175 if (iha_state_3(sc, iot, ioh) == 4)
1176 goto state_4;
1177 break;
1178
1179 case 4:
1180 state_4:
1181 switch (iha_state_4(sc, iot, ioh)) {
1182 case 0: return (0);
1183 case 6: goto state_6;
1184 default: break;
1185 }
1186 break;
1187
1188 case 5:
1189 switch (iha_state_5(sc, iot, ioh)) {
1190 case 4: goto state_4;
1191 case 6: goto state_6;
1192 default: break;
1193 }
1194 break;
1195
1196 case 6:
1197 state_6:
1198 iha_state_6(sc, iot, ioh);
1199 break;
1200
1201 case 8:
1202 iha_state_8(sc, iot, ioh);
1203 break;
1204
1205 default:
1206 #ifdef IHA_DEBUG_STATE
1207 sc_print_addr(sc->HCS_ActScb->SCB_Xs->sc_link);
1208 printf("[debug] -unknown state: %i-\n",
1209 sc->HCS_ActScb->SCB_NxtStat);
1210 #endif
1211 iha_bad_seq(sc);
1212 break;
1213 }
1214
1215 return (-1);
1216 }
1217
1218 /*
1219 * iha_state_1 - selection is complete after a SELATNSTOP. If the target
1220 * has put the bus into MSG_OUT phase start wide/sync
1221 * negotiation. Otherwise clear the FIFO and go to state 3,
1222 * which will send the SCSI CDB to the target.
1223 */
1224 int
iha_state_1(sc,iot,ioh)1225 iha_state_1(sc, iot, ioh)
1226 struct iha_softc *sc;
1227 bus_space_tag_t iot;
1228 bus_space_handle_t ioh;
1229 {
1230 struct iha_scb *pScb = sc->HCS_ActScb;
1231 struct tcs *pTcs;
1232 u_int16_t flags;
1233
1234 iha_mark_busy_scb(pScb);
1235
1236 pTcs = pScb->SCB_Tcs;
1237
1238 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0);
1239
1240 /*
1241 * If we are in PHASE_MSG_OUT, send
1242 * a) IDENT message (with tags if appropriate)
1243 * b) WDTR if the target is configured to negotiate wide xfers
1244 * ** OR **
1245 * c) SDTR if the target is configured to negotiate sync xfers
1246 * but not wide ones
1247 *
1248 * If we are NOT, then the target is not asking for anything but
1249 * the data/command, so go straight to state 3.
1250 */
1251 if (sc->HCS_Phase == PHASE_MSG_OUT) {
1252 bus_space_write_1(iot, ioh, TUL_SCTRL1, (ESBUSIN | EHRSL));
1253 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident);
1254
1255 if (pScb->SCB_TagMsg != 0) {
1256 bus_space_write_1(iot, ioh, TUL_SFIFO,
1257 pScb->SCB_TagMsg);
1258 bus_space_write_1(iot, ioh, TUL_SFIFO,
1259 pScb->SCB_TagId);
1260 }
1261
1262 flags = pTcs->TCS_Flags;
1263 if ((flags & FLAG_NO_NEG_WIDE) == 0) {
1264 if (iha_msgout_wdtr(sc, iot, ioh) == -1)
1265 return (-1);
1266 } else if ((flags & FLAG_NO_NEG_SYNC) == 0) {
1267 if (iha_msgout_sdtr(sc, iot, ioh) == -1)
1268 return (-1);
1269 }
1270
1271 } else {
1272 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1273 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0);
1274 }
1275
1276 return (3);
1277 }
1278
1279 /*
1280 * iha_state_2 - selection is complete after a SEL_ATN or SEL_ATN3. If the SCSI
1281 * CDB has already been send, go to state 4 to start the data
1282 * xfer. Otherwise reset the FIFO and go to state 3, sending
1283 * the SCSI CDB.
1284 */
1285 int
iha_state_2(sc,iot,ioh)1286 iha_state_2(sc, iot, ioh)
1287 struct iha_softc *sc;
1288 bus_space_tag_t iot;
1289 bus_space_handle_t ioh;
1290 {
1291 struct iha_scb *pScb = sc->HCS_ActScb;
1292
1293 iha_mark_busy_scb(pScb);
1294
1295 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pScb->SCB_Tcs->TCS_SConfig0);
1296
1297 if ((sc->HCS_JSStatus1 & CPDNE) != 0)
1298 return (4);
1299
1300 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1301
1302 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0);
1303
1304 return (3);
1305 }
1306
1307 /*
1308 * iha_state_3 - send the SCSI CDB to the target, processing any status
1309 * or other messages received until that is done or
1310 * abandoned.
1311 */
1312 int
iha_state_3(sc,iot,ioh)1313 iha_state_3(sc, iot, ioh)
1314 struct iha_softc *sc;
1315 bus_space_tag_t iot;
1316 bus_space_handle_t ioh;
1317 {
1318 struct iha_scb *pScb = sc->HCS_ActScb;
1319 u_int16_t flags;
1320
1321 for (;;)
1322 switch (sc->HCS_Phase) {
1323 case PHASE_CMD_OUT:
1324 bus_space_write_multi_1(iot, ioh, TUL_SFIFO,
1325 pScb->SCB_CDB, pScb->SCB_CDBLen);
1326 if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1)
1327 return (-1);
1328 else if (sc->HCS_Phase == PHASE_CMD_OUT) {
1329 iha_bad_seq(sc);
1330 return (-1);
1331 } else
1332 return (4);
1333
1334 case PHASE_MSG_IN:
1335 pScb->SCB_NxtStat = 3;
1336 if (iha_msgin(sc, iot, ioh) == -1)
1337 return (-1);
1338 break;
1339
1340 case PHASE_STATUS_IN:
1341 if (iha_status_msg(sc, iot, ioh) == -1)
1342 return (-1);
1343 break;
1344
1345 case PHASE_MSG_OUT:
1346 flags = pScb->SCB_Tcs->TCS_Flags;
1347 if ((flags & FLAG_NO_NEG_SYNC) != 0) {
1348 if (iha_msgout(sc, iot, ioh, MSG_NOOP) == -1)
1349 return (-1);
1350 } else if (iha_msgout_sdtr(sc, iot, ioh) == -1)
1351 return (-1);
1352 break;
1353
1354 default:
1355 #ifdef IHA_DEBUG_STATE
1356 sc_print_addr(pScb->SCB_Xs->sc_link);
1357 printf("[debug] -s3- bad phase = %d\n", sc->HCS_Phase);
1358 #endif
1359 iha_bad_seq(sc);
1360 return (-1);
1361 }
1362 }
1363
1364 /*
1365 * iha_state_4 - start a data xfer. Handle any bus state
1366 * transitions until PHASE_DATA_IN/_OUT
1367 * or the attempt is abandoned. If there is
1368 * no data to xfer, go to state 6 and finish
1369 * processing the current SCB.
1370 */
1371 int
iha_state_4(sc,iot,ioh)1372 iha_state_4(sc, iot, ioh)
1373 struct iha_softc *sc;
1374 bus_space_tag_t iot;
1375 bus_space_handle_t ioh;
1376 {
1377 struct iha_scb *pScb = sc->HCS_ActScb;
1378
1379 if ((pScb->SCB_Flags & FLAG_DIR) == FLAG_DIR)
1380 return (6); /* Both dir flags set => NO xfer was requested */
1381
1382 for (;;) {
1383 if (pScb->SCB_BufCharsLeft == 0)
1384 return (6);
1385
1386 switch (sc->HCS_Phase) {
1387 case PHASE_STATUS_IN:
1388 if ((pScb->SCB_Flags & FLAG_DIR) != 0)
1389 pScb->SCB_HaStat = iha_data_over_run(pScb);
1390 if ((iha_status_msg(sc, iot, ioh)) == -1)
1391 return (-1);
1392 break;
1393
1394 case PHASE_MSG_IN:
1395 pScb->SCB_NxtStat = 4;
1396 if (iha_msgin(sc, iot, ioh) == -1)
1397 return (-1);
1398 break;
1399
1400 case PHASE_MSG_OUT:
1401 if ((sc->HCS_JSStatus0 & SPERR) != 0) {
1402 pScb->SCB_BufCharsLeft = 0;
1403 pScb->SCB_HaStat = HOST_SPERR;
1404 if (iha_msgout(sc, iot, ioh,
1405 MSG_INITIATOR_DET_ERR) == -1)
1406 return (-1);
1407 else
1408 return (6);
1409 } else {
1410 if (iha_msgout(sc, iot, ioh, MSG_NOOP) == -1)
1411 return (-1);
1412 }
1413 break;
1414
1415 case PHASE_DATA_IN:
1416 return (iha_xfer_data(pScb, iot, ioh, SCSI_DATA_IN));
1417
1418 case PHASE_DATA_OUT:
1419 return (iha_xfer_data(pScb, iot, ioh, SCSI_DATA_OUT));
1420
1421 default:
1422 iha_bad_seq(sc);
1423 return (-1);
1424 }
1425 }
1426 }
1427
1428 /*
1429 * iha_state_5 - handle the partial or final completion of the current
1430 * data xfer. If DMA is still active stop it. If there is
1431 * more data to xfer, go to state 4 and start the xfer.
1432 * If not go to state 6 and finish the SCB.
1433 */
1434 int
iha_state_5(sc,iot,ioh)1435 iha_state_5(sc, iot, ioh)
1436 struct iha_softc *sc;
1437 bus_space_tag_t iot;
1438 bus_space_handle_t ioh;
1439 {
1440 struct iha_scb *pScb = sc->HCS_ActScb;
1441 struct iha_sg_element *pSg;
1442 u_int32_t cnt;
1443 u_int16_t period;
1444 u_int8_t stat;
1445 long xcnt; /* cannot use unsigned!! see code: if (xcnt < 0) */
1446
1447 cnt = bus_space_read_4(iot, ioh, TUL_STCNT0) & TCNT;
1448
1449 /*
1450 * Stop any pending DMA activity and check for parity error.
1451 */
1452
1453 if ((bus_space_read_1(iot, ioh, TUL_DCMD) & XDIR) != 0) {
1454 /* Input Operation */
1455 if ((sc->HCS_JSStatus0 & SPERR) != 0)
1456 pScb->SCB_HaStat = HOST_SPERR;
1457
1458 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) {
1459 bus_space_write_1(iot, ioh, TUL_DCTRL0,
1460 bus_space_read_1(iot, ioh, TUL_DCTRL0) | SXSTP);
1461 while (bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND)
1462 ;
1463 }
1464
1465 } else {
1466 /* Output Operation */
1467 if ((sc->HCS_JSStatus1 & SXCMP) == 0) {
1468 period = pScb->SCB_Tcs->TCS_JS_Period;
1469 if ((period & PERIOD_WIDE_SCSI) != 0)
1470 cnt += (bus_space_read_1(iot, ioh,
1471 TUL_SFIFOCNT) & FIFOC) << 1;
1472 else
1473 cnt += (bus_space_read_1(iot, ioh,
1474 TUL_SFIFOCNT) & FIFOC);
1475 }
1476
1477 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) {
1478 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR);
1479 do
1480 stat = bus_space_read_1(iot, ioh, TUL_ISTUS0);
1481 while ((stat & DABT) == 0);
1482 }
1483
1484 if ((cnt == 1) && (sc->HCS_Phase == PHASE_DATA_OUT)) {
1485 if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1)
1486 return (-1);
1487 cnt = 0;
1488
1489 } else if ((sc->HCS_JSStatus1 & SXCMP) == 0)
1490 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1491 }
1492
1493 if (cnt == 0) {
1494 pScb->SCB_BufCharsLeft = 0;
1495 return (6);
1496 }
1497
1498 /* Update active data pointer and restart the I/O at the new point */
1499
1500 xcnt = pScb->SCB_BufCharsLeft - cnt; /* xcnt == bytes xferred */
1501 pScb->SCB_BufCharsLeft = cnt; /* cnt == bytes left */
1502
1503 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
1504 0, sizeof(pScb->SCB_SGList), BUS_DMASYNC_POSTWRITE);
1505
1506 if ((pScb->SCB_Flags & FLAG_SG) != 0) {
1507 pSg = &pScb->SCB_SGList[pScb->SCB_SGIdx];
1508 for (; pScb->SCB_SGIdx < pScb->SCB_SGCount; pSg++, pScb->SCB_SGIdx++) {
1509 xcnt -= pSg->SG_Len;
1510 if (xcnt < 0) {
1511 xcnt += pSg->SG_Len;
1512
1513 pSg->SG_Addr += xcnt;
1514 pSg->SG_Len -= xcnt;
1515
1516 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
1517 0, sizeof(pScb->SCB_SGList),
1518 BUS_DMASYNC_PREWRITE);
1519
1520 return (4);
1521 }
1522 }
1523 return (6);
1524
1525 }
1526
1527 return (4);
1528 }
1529
1530 /*
1531 * iha_state_6 - finish off the active scb (may require several
1532 * iterations if PHASE_MSG_IN) and return -1 to indicate
1533 * the bus is free.
1534 */
1535 int
iha_state_6(sc,iot,ioh)1536 iha_state_6(sc, iot, ioh)
1537 struct iha_softc *sc;
1538 bus_space_tag_t iot;
1539 bus_space_handle_t ioh;
1540 {
1541 for (;;)
1542 switch (sc->HCS_Phase) {
1543 case PHASE_STATUS_IN:
1544 if (iha_status_msg(sc, iot, ioh) == -1)
1545 return (-1);
1546 break;
1547
1548 case PHASE_MSG_IN:
1549 sc->HCS_ActScb->SCB_NxtStat = 6;
1550 if ((iha_msgin(sc, iot, ioh)) == -1)
1551 return (-1);
1552 break;
1553
1554 case PHASE_MSG_OUT:
1555 if ((iha_msgout(sc, iot, ioh, MSG_NOOP)) == -1)
1556 return (-1);
1557 break;
1558
1559 case PHASE_DATA_IN:
1560 if (iha_xpad_in(sc, iot, ioh) == -1)
1561 return (-1);
1562 break;
1563
1564 case PHASE_DATA_OUT:
1565 if (iha_xpad_out(sc, iot, ioh) == -1)
1566 return (-1);
1567 break;
1568
1569 default:
1570 iha_bad_seq(sc);
1571 return (-1);
1572 }
1573 }
1574
1575 /*
1576 * iha_state_8 - reset the active device and all busy SCBs using it
1577 */
1578 int
iha_state_8(sc,iot,ioh)1579 iha_state_8(sc, iot, ioh)
1580 struct iha_softc *sc;
1581 bus_space_tag_t iot;
1582 bus_space_handle_t ioh;
1583 {
1584 struct iha_scb *pScb;
1585 u_int32_t i;
1586 u_int8_t tar;
1587
1588 if (sc->HCS_Phase == PHASE_MSG_OUT) {
1589 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_BUS_DEV_RESET);
1590
1591 pScb = sc->HCS_ActScb;
1592
1593 /* This SCB finished correctly -- resetting the device */
1594 iha_append_done_scb(sc, pScb, HOST_OK);
1595
1596 iha_reset_tcs(pScb->SCB_Tcs, sc->HCS_SConf1);
1597
1598 tar = pScb->SCB_Target;
1599 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++)
1600 if (pScb->SCB_Target == tar)
1601 switch (pScb->SCB_Status) {
1602 case STATUS_BUSY:
1603 iha_append_done_scb(sc,
1604 pScb, HOST_DEV_RST);
1605 break;
1606
1607 case STATUS_SELECT:
1608 iha_push_pend_scb(sc, pScb);
1609 break;
1610
1611 default:
1612 break;
1613 }
1614
1615 sc->HCS_Flags |= FLAG_EXPECT_DISC;
1616
1617 if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1)
1618 return (-1);
1619 }
1620
1621 iha_bad_seq(sc);
1622 return (-1);
1623 }
1624
1625 /*
1626 * iha_xfer_data - initiate the DMA xfer of the data
1627 */
1628 int
iha_xfer_data(pScb,iot,ioh,direction)1629 iha_xfer_data(pScb, iot, ioh, direction)
1630 struct iha_scb *pScb;
1631 bus_space_tag_t iot;
1632 bus_space_handle_t ioh;
1633 int direction;
1634 {
1635 u_int32_t xferaddr, xferlen;
1636 u_int8_t xfertype;
1637
1638 if ((pScb->SCB_Flags & FLAG_DIR) != direction)
1639 return (6); /* wrong direction, abandon I/O */
1640
1641 bus_space_write_4(iot, ioh, TUL_STCNT0, pScb->SCB_BufCharsLeft);
1642
1643 if ((pScb->SCB_Flags & FLAG_SG) == 0) {
1644 xferaddr = pScb->SCB_DataDma->dm_segs[0].ds_addr
1645 + (pScb->SCB_BufChars - pScb->SCB_BufCharsLeft);
1646 xferlen = pScb->SCB_BufCharsLeft;
1647 xfertype = (direction == SCSI_DATA_IN) ? ST_X_IN : ST_X_OUT;
1648
1649 } else {
1650 xferaddr = pScb->SCB_SGDma->dm_segs[0].ds_addr
1651 + (pScb->SCB_SGIdx * sizeof(struct iha_sg_element));
1652 xferlen = (pScb->SCB_SGCount - pScb->SCB_SGIdx)
1653 * sizeof(struct iha_sg_element);
1654 xfertype = (direction == SCSI_DATA_IN) ? ST_SG_IN : ST_SG_OUT;
1655 }
1656
1657 bus_space_write_4(iot, ioh, TUL_DXC, xferlen);
1658 bus_space_write_4(iot, ioh, TUL_DXPA, xferaddr);
1659 bus_space_write_1(iot, ioh, TUL_DCMD, xfertype);
1660
1661 bus_space_write_1(iot, ioh, TUL_SCMD,
1662 (direction == SCSI_DATA_IN) ? XF_DMA_IN : XF_DMA_OUT);
1663
1664 pScb->SCB_NxtStat = 5;
1665
1666 return (0);
1667 }
1668
1669 int
iha_xpad_in(sc,iot,ioh)1670 iha_xpad_in(sc, iot, ioh)
1671 struct iha_softc *sc;
1672 bus_space_tag_t iot;
1673 bus_space_handle_t ioh;
1674 {
1675 struct iha_scb *pScb = sc->HCS_ActScb;
1676
1677 if ((pScb->SCB_Flags & FLAG_DIR) != 0)
1678 pScb->SCB_HaStat = HOST_DO_DU;
1679
1680 for (;;) {
1681 if ((pScb->SCB_Tcs->TCS_JS_Period & PERIOD_WIDE_SCSI) != 0)
1682 bus_space_write_4(iot, ioh, TUL_STCNT0, 2);
1683 else
1684 bus_space_write_4(iot, ioh, TUL_STCNT0, 1);
1685
1686 switch (iha_wait(sc, iot, ioh, XF_FIFO_IN)) {
1687 case -1:
1688 return (-1);
1689
1690 case PHASE_DATA_IN:
1691 bus_space_read_1(iot, ioh, TUL_SFIFO);
1692 break;
1693
1694 default:
1695 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1696 return (6);
1697 }
1698 }
1699 }
1700
1701 int
iha_xpad_out(sc,iot,ioh)1702 iha_xpad_out(sc, iot, ioh)
1703 struct iha_softc *sc;
1704 bus_space_tag_t iot;
1705 bus_space_handle_t ioh;
1706 {
1707 struct iha_scb *pScb = sc->HCS_ActScb;
1708
1709 if ((pScb->SCB_Flags & FLAG_DIR) != 0)
1710 pScb->SCB_HaStat = HOST_DO_DU;
1711
1712 for (;;) {
1713 if ((pScb->SCB_Tcs->TCS_JS_Period & PERIOD_WIDE_SCSI) != 0)
1714 bus_space_write_4(iot, ioh, TUL_STCNT0, 2);
1715 else
1716 bus_space_write_4(iot, ioh, TUL_STCNT0, 1);
1717
1718 bus_space_write_1(iot, ioh, TUL_SFIFO, 0);
1719
1720 switch (iha_wait(sc, iot, ioh, XF_FIFO_OUT)) {
1721 case -1:
1722 return (-1);
1723
1724 case PHASE_DATA_OUT:
1725 break;
1726
1727 default:
1728 /* Disable wide CPU to allow read 16 bits */
1729 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL);
1730 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1731 return (6);
1732 }
1733 }
1734 }
1735
1736 int
iha_status_msg(sc,iot,ioh)1737 iha_status_msg(sc, iot, ioh)
1738 struct iha_softc *sc;
1739 bus_space_tag_t iot;
1740 bus_space_handle_t ioh;
1741 {
1742 struct iha_scb *pScb;
1743 u_int8_t msg;
1744 int phase;
1745
1746 if ((phase = iha_wait(sc, iot, ioh, CMD_COMP)) == -1)
1747 return (-1);
1748
1749 pScb = sc->HCS_ActScb;
1750
1751 pScb->SCB_TaStat = bus_space_read_1(iot, ioh, TUL_SFIFO);
1752
1753 if (phase == PHASE_MSG_OUT) {
1754 if ((sc->HCS_JSStatus0 & SPERR) == 0)
1755 bus_space_write_1(iot, ioh, TUL_SFIFO,
1756 MSG_NOOP);
1757 else
1758 bus_space_write_1(iot, ioh, TUL_SFIFO,
1759 MSG_PARITY_ERROR);
1760
1761 return (iha_wait(sc, iot, ioh, XF_FIFO_OUT));
1762
1763 } else if (phase == PHASE_MSG_IN) {
1764 msg = bus_space_read_1(iot, ioh, TUL_SFIFO);
1765
1766 if ((sc->HCS_JSStatus0 & SPERR) != 0)
1767 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) {
1768 case -1:
1769 return (-1);
1770 case PHASE_MSG_OUT:
1771 bus_space_write_1(iot, ioh, TUL_SFIFO,
1772 MSG_PARITY_ERROR);
1773 return (iha_wait(sc, iot, ioh, XF_FIFO_OUT));
1774 default:
1775 iha_bad_seq(sc);
1776 return (-1);
1777 }
1778
1779 if (msg == MSG_CMDCOMPLETE) {
1780 if ((pScb->SCB_TaStat
1781 & (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) {
1782 iha_bad_seq(sc);
1783 return (-1);
1784 }
1785 sc->HCS_Flags |= FLAG_EXPECT_DONE_DISC;
1786 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1787 return (iha_wait(sc, iot, ioh, MSG_ACCEPT));
1788 }
1789
1790 if ((msg == MSG_LINK_CMD_COMPLETE)
1791 || (msg == MSG_LINK_CMD_COMPLETEF)) {
1792 if ((pScb->SCB_TaStat
1793 & (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM)
1794 return (iha_wait(sc, iot, ioh, MSG_ACCEPT));
1795 }
1796 }
1797
1798 iha_bad_seq(sc);
1799 return (-1);
1800 }
1801
1802 /*
1803 * iha_busfree - SCSI bus free detected as a result of a TIMEOUT or
1804 * DISCONNECT interrupt. Reset the tulip FIFO and
1805 * SCONFIG0 and enable hardware reselect. Move any active
1806 * SCB to HCS_DoneScb list. Return an appropriate host status
1807 * if an I/O was active.
1808 */
1809 void
iha_busfree(sc,iot,ioh)1810 iha_busfree(sc, iot, ioh)
1811 struct iha_softc *sc;
1812 bus_space_tag_t iot;
1813 bus_space_handle_t ioh;
1814 {
1815 struct iha_scb *pScb;
1816
1817 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1818 bus_space_write_1(iot, ioh, TUL_SCONFIG0, SCONFIG0DEFAULT);
1819 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL);
1820
1821 pScb = sc->HCS_ActScb;
1822
1823 if (pScb != NULL) {
1824 if (pScb->SCB_Status == STATUS_SELECT)
1825 /* selection timeout */
1826 iha_append_done_scb(sc, pScb, HOST_SEL_TOUT);
1827 else
1828 /* Unexpected bus free */
1829 iha_append_done_scb(sc, pScb, HOST_BAD_PHAS);
1830
1831 }
1832 }
1833
1834 void
iha_reset_scsi_bus(sc)1835 iha_reset_scsi_bus(sc)
1836 struct iha_softc *sc;
1837 {
1838 struct iha_scb *pScb;
1839 struct tcs *pTcs;
1840 int i, s;
1841
1842 s = splbio();
1843
1844 iha_reset_dma(sc->sc_iot, sc->sc_ioh);
1845
1846 for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++)
1847 switch (pScb->SCB_Status) {
1848 case STATUS_BUSY:
1849 iha_append_done_scb(sc, pScb, HOST_SCSI_RST);
1850 break;
1851
1852 case STATUS_SELECT:
1853 iha_push_pend_scb(sc, pScb);
1854 break;
1855
1856 default:
1857 break;
1858 }
1859
1860 for (i = 0, pTcs = sc->HCS_Tcs; i < IHA_MAX_TARGETS; i++, pTcs++)
1861 iha_reset_tcs(pTcs, sc->HCS_SConf1);
1862
1863 splx(s);
1864 }
1865
1866 /*
1867 * iha_resel - handle a detected SCSI bus reselection request.
1868 */
1869 int
iha_resel(sc,iot,ioh)1870 iha_resel(sc, iot, ioh)
1871 struct iha_softc *sc;
1872 bus_space_tag_t iot;
1873 bus_space_handle_t ioh;
1874 {
1875 struct iha_scb *pScb;
1876 struct tcs *pTcs;
1877 u_int8_t tag, target, lun, msg, abortmsg;
1878
1879 if (sc->HCS_ActScb != NULL) {
1880 if ((sc->HCS_ActScb->SCB_Status == STATUS_SELECT))
1881 iha_push_pend_scb(sc, sc->HCS_ActScb);
1882 sc->HCS_ActScb = NULL;
1883 }
1884
1885 target = bus_space_read_1(iot, ioh, TUL_SBID);
1886 lun = bus_space_read_1(iot, ioh, TUL_SALVC) & MSG_IDENTIFY_LUNMASK;
1887
1888 pTcs = &sc->HCS_Tcs[target];
1889
1890 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0);
1891 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period);
1892
1893 abortmsg = MSG_ABORT; /* until a valid tag has been obtained */
1894
1895 if (pTcs->TCS_NonTagScb != NULL)
1896 /* There is a non-tagged I/O active on the target */
1897 pScb = pTcs->TCS_NonTagScb;
1898
1899 else {
1900 /*
1901 * Since there is no active non-tagged operation
1902 * read the tag type, the tag itself, and find
1903 * the appropriate pScb by indexing HCS_Scb with
1904 * the tag.
1905 */
1906
1907 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) {
1908 case -1:
1909 return (-1);
1910 case PHASE_MSG_IN:
1911 bus_space_write_4(iot, ioh, TUL_STCNT0, 1);
1912 if ((iha_wait(sc, iot, ioh, XF_FIFO_IN)) == -1)
1913 return (-1);
1914 break;
1915 default:
1916 goto abort;
1917 }
1918
1919 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag Msg */
1920
1921 if ((msg < MSG_SIMPLE_Q_TAG) || (msg > MSG_ORDERED_Q_TAG))
1922 goto abort;
1923
1924 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) {
1925 case -1:
1926 return (-1);
1927 case PHASE_MSG_IN:
1928 bus_space_write_4(iot, ioh, TUL_STCNT0, 1);
1929 if ((iha_wait(sc, iot, ioh, XF_FIFO_IN)) == -1)
1930 return (-1);
1931 break;
1932 default:
1933 goto abort;
1934 }
1935
1936 tag = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag ID */
1937 pScb = &sc->HCS_Scb[tag];
1938
1939 abortmsg = MSG_ABORT_TAG; /* Now that we have valdid tag! */
1940 }
1941
1942 if ((pScb->SCB_Target != target)
1943 || (pScb->SCB_Lun != lun)
1944 || (pScb->SCB_Status != STATUS_BUSY)) {
1945 abort:
1946 iha_msgout_abort(sc, iot, ioh, abortmsg);
1947 return (-1);
1948 }
1949
1950 sc->HCS_ActScb = pScb;
1951
1952 if (iha_wait(sc, iot, ioh, MSG_ACCEPT) == -1)
1953 return (-1);
1954
1955 return(iha_next_state(sc, iot, ioh));
1956 }
1957
1958 int
iha_msgin(sc,iot,ioh)1959 iha_msgin(sc, iot, ioh)
1960 struct iha_softc *sc;
1961 bus_space_tag_t iot;
1962 bus_space_handle_t ioh;
1963 {
1964 u_int16_t flags;
1965 u_int8_t msg;
1966 int phase;
1967
1968 for (;;) {
1969 if ((bus_space_read_1(iot, ioh, TUL_SFIFOCNT) & FIFOC) > 0)
1970 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
1971
1972 bus_space_write_4(iot, ioh, TUL_STCNT0, 1);
1973
1974 phase = iha_wait(sc, iot, ioh, XF_FIFO_IN);
1975 msg = bus_space_read_1(iot, ioh, TUL_SFIFO);
1976
1977 switch (msg) {
1978 case MSG_DISCONNECT:
1979 sc->HCS_Flags |= FLAG_EXPECT_DISC;
1980 if (iha_wait(sc, iot, ioh, MSG_ACCEPT) != -1)
1981 iha_bad_seq(sc);
1982 phase = -1;
1983 break;
1984 case MSG_SAVEDATAPOINTER:
1985 case MSG_RESTOREPOINTERS:
1986 case MSG_NOOP:
1987 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
1988 break;
1989 case MSG_MESSAGE_REJECT:
1990 /* XXX - need to clear FIFO like other 'Clear ATN'?*/
1991 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0);
1992 flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags;
1993 if ((flags & FLAG_NO_NEG_SYNC) == 0)
1994 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN);
1995 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
1996 break;
1997 case MSG_EXTENDED:
1998 phase = iha_msgin_extended(sc, iot, ioh);
1999 break;
2000 case MSG_IGN_WIDE_RESIDUE:
2001 phase = iha_msgin_ignore_wid_resid(sc, iot, ioh);
2002 break;
2003 case MSG_CMDCOMPLETE:
2004 sc->HCS_Flags |= FLAG_EXPECT_DONE_DISC;
2005 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
2006 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
2007 if (phase != -1) {
2008 iha_bad_seq(sc);
2009 return (-1);
2010 }
2011 break;
2012 default:
2013 #ifdef IHA_DEBUG_STATE
2014 printf("[debug] iha_msgin: bad msg type: %d\n", msg);
2015 #endif
2016 phase = iha_msgout_reject(sc, iot, ioh);
2017 break;
2018 }
2019
2020 if (phase != PHASE_MSG_IN)
2021 return (phase);
2022 }
2023 /* NOTREACHED */
2024 }
2025
2026 int
iha_msgin_ignore_wid_resid(sc,iot,ioh)2027 iha_msgin_ignore_wid_resid(sc, iot, ioh)
2028 struct iha_softc *sc;
2029 bus_space_tag_t iot;
2030 bus_space_handle_t ioh;
2031 {
2032 int phase;
2033
2034 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
2035
2036 if (phase == PHASE_MSG_IN) {
2037 phase = iha_wait(sc, iot, ioh, XF_FIFO_IN);
2038
2039 if (phase != -1) {
2040 bus_space_write_1(iot, ioh, TUL_SFIFO, 0);
2041 bus_space_read_1 (iot, ioh, TUL_SFIFO);
2042 bus_space_read_1 (iot, ioh, TUL_SFIFO);
2043
2044 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
2045 }
2046 }
2047
2048 return (phase);
2049 }
2050
2051 int
iha_msgin_extended(sc,iot,ioh)2052 iha_msgin_extended(sc, iot, ioh)
2053 struct iha_softc *sc;
2054 bus_space_tag_t iot;
2055 bus_space_handle_t ioh;
2056 {
2057 u_int16_t flags;
2058 int i, phase, msglen, msgcode;
2059
2060 /* XXX - can we just stop reading and reject, or do we have to
2061 * read all input, discarding the excess, and then reject
2062 */
2063 for (i = 0; i < IHA_MAX_EXTENDED_MSG; i++) {
2064 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
2065
2066 if (phase != PHASE_MSG_IN)
2067 return (phase);
2068
2069 bus_space_write_4(iot, ioh, TUL_STCNT0, 1);
2070
2071 if (iha_wait(sc, iot, ioh, XF_FIFO_IN) == -1)
2072 return (-1);
2073
2074 sc->HCS_Msg[i] = bus_space_read_1(iot, ioh, TUL_SFIFO);
2075
2076 if (sc->HCS_Msg[0] == i)
2077 break;
2078 }
2079
2080 msglen = sc->HCS_Msg[0];
2081 msgcode = sc->HCS_Msg[1];
2082
2083 if ((msglen == MSG_EXT_SDTR_LEN) && (msgcode == MSG_EXT_SDTR)) {
2084 if (iha_msgin_sdtr(sc) == 0) {
2085 iha_sync_done(sc, iot, ioh);
2086 return (iha_wait(sc, iot, ioh, MSG_ACCEPT));
2087 }
2088
2089 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN);
2090
2091 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
2092 if (phase != PHASE_MSG_OUT)
2093 return (phase);
2094
2095 /* Clear FIFO for important message - final SYNC offer */
2096 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
2097
2098 iha_sync_done(sc, iot, ioh); /* This is our final offer */
2099
2100 } else if ((msglen == MSG_EXT_WDTR_LEN) && (msgcode == MSG_EXT_WDTR)) {
2101
2102 flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags;
2103
2104 if ((flags & FLAG_NO_WIDE) != 0)
2105 /* Offer 8 bit xfers only */
2106 sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_8_BIT;
2107
2108 else if (sc->HCS_Msg[2] > MSG_EXT_WDTR_BUS_32_BIT)
2109 return (iha_msgout_reject(sc, iot, ioh));
2110
2111 else if (sc->HCS_Msg[2] == MSG_EXT_WDTR_BUS_32_BIT)
2112 /* Offer 16 instead */
2113 sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_32_BIT;
2114
2115 else {
2116 iha_wide_done(sc, iot, ioh);
2117 if ((flags & FLAG_NO_NEG_SYNC) == 0)
2118 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN);
2119 return (iha_wait(sc, iot, ioh, MSG_ACCEPT));
2120 }
2121
2122 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN);
2123
2124 phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
2125 if (phase != PHASE_MSG_OUT)
2126 return (phase);
2127
2128 } else
2129 return (iha_msgout_reject(sc, iot, ioh));
2130
2131 /* Send message built in sc->HCS_Msg[] */
2132 return (iha_msgout_extended(sc, iot, ioh));
2133 }
2134
2135 /*
2136 * iha_msgin_sdtr - check SDTR msg in HCS_Msg. If the offer is
2137 * acceptable leave HCS_Msg as is and return 0.
2138 * If the negotiation must continue, modify HCS_Msg
2139 * as needed and return 1. Else return 0.
2140 */
2141 int
iha_msgin_sdtr(sc)2142 iha_msgin_sdtr(sc)
2143 struct iha_softc *sc;
2144 {
2145 u_int16_t flags;
2146 u_int8_t default_period;
2147 int newoffer;
2148
2149 flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags;
2150
2151 default_period = iha_rate_tbl[flags & FLAG_SCSI_RATE];
2152
2153 if (sc->HCS_Msg[3] == 0) /* target offered async only. Accept it. */
2154 return (0);
2155
2156 newoffer = 0;
2157
2158 if ((flags & FLAG_NO_SYNC) != 0) {
2159 sc->HCS_Msg[3] = 0;
2160 newoffer = 1;
2161 }
2162
2163 if (sc->HCS_Msg[3] > IHA_MAX_TARGETS-1) {
2164 sc->HCS_Msg[3] = IHA_MAX_TARGETS-1;
2165 newoffer = 1;
2166 }
2167
2168 if (sc->HCS_Msg[2] < default_period) {
2169 sc->HCS_Msg[2] = default_period;
2170 newoffer = 1;
2171 }
2172
2173 if (sc->HCS_Msg[2] >= 59) {
2174 sc->HCS_Msg[3] = 0;
2175 newoffer = 1;
2176 }
2177
2178 return (newoffer);
2179 }
2180
2181 int
iha_msgout(sc,iot,ioh,msg)2182 iha_msgout(sc, iot, ioh, msg)
2183 struct iha_softc *sc;
2184 bus_space_tag_t iot;
2185 bus_space_handle_t ioh;
2186 u_int8_t msg;
2187 {
2188 bus_space_write_1(iot, ioh, TUL_SFIFO, msg);
2189
2190 return (iha_wait(sc, iot, ioh, XF_FIFO_OUT));
2191 }
2192
2193 void
iha_msgout_abort(sc,iot,ioh,aborttype)2194 iha_msgout_abort(sc, iot, ioh, aborttype)
2195 struct iha_softc *sc;
2196 bus_space_tag_t iot;
2197 bus_space_handle_t ioh;
2198 u_int8_t aborttype;
2199 {
2200 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN);
2201
2202 switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) {
2203 case -1:
2204 break;
2205
2206 case PHASE_MSG_OUT:
2207 sc->HCS_Flags |= FLAG_EXPECT_DISC;
2208 if (iha_msgout(sc, iot, ioh, aborttype) != -1)
2209 iha_bad_seq(sc);
2210 break;
2211
2212 default:
2213 iha_bad_seq(sc);
2214 break;
2215 }
2216 }
2217
2218 int
iha_msgout_reject(sc,iot,ioh)2219 iha_msgout_reject(sc, iot, ioh)
2220 struct iha_softc *sc;
2221 bus_space_tag_t iot;
2222 bus_space_handle_t ioh;
2223 {
2224 iha_set_ssig(iot, ioh, REQ | BSY | SEL, ATN);
2225
2226 if (iha_wait(sc, iot, ioh, MSG_ACCEPT) == PHASE_MSG_OUT)
2227 return (iha_msgout(sc, iot, ioh, MSG_MESSAGE_REJECT));
2228
2229 return (-1);
2230 }
2231
2232 int
iha_msgout_extended(sc,iot,ioh)2233 iha_msgout_extended(sc, iot, ioh)
2234 struct iha_softc *sc;
2235 bus_space_tag_t iot;
2236 bus_space_handle_t ioh;
2237 {
2238 int phase;
2239
2240 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_EXTENDED);
2241
2242 bus_space_write_multi_1(iot, ioh, TUL_SFIFO,
2243 sc->HCS_Msg, sc->HCS_Msg[0]+1);
2244
2245 phase = iha_wait(sc, iot, ioh, XF_FIFO_OUT);
2246
2247 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
2248 iha_set_ssig(iot, ioh, REQ | BSY | SEL | ATN, 0);
2249
2250 return (phase);
2251 }
2252
2253 int
iha_msgout_wdtr(sc,iot,ioh)2254 iha_msgout_wdtr(sc, iot, ioh)
2255 struct iha_softc *sc;
2256 bus_space_tag_t iot;
2257 bus_space_handle_t ioh;
2258 {
2259 sc->HCS_ActScb->SCB_Tcs->TCS_Flags |= FLAG_WIDE_DONE;
2260
2261 sc->HCS_Msg[0] = MSG_EXT_WDTR_LEN;
2262 sc->HCS_Msg[1] = MSG_EXT_WDTR;
2263 sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_16_BIT;
2264
2265 return (iha_msgout_extended(sc, iot, ioh));
2266 }
2267
2268 int
iha_msgout_sdtr(sc,iot,ioh)2269 iha_msgout_sdtr(sc, iot, ioh)
2270 struct iha_softc *sc;
2271 bus_space_tag_t iot;
2272 bus_space_handle_t ioh;
2273 {
2274 u_int16_t rateindex;
2275 u_int8_t sync_rate;
2276
2277 rateindex = sc->HCS_ActScb->SCB_Tcs->TCS_Flags & FLAG_SCSI_RATE;
2278
2279 sync_rate = iha_rate_tbl[rateindex];
2280
2281 sc->HCS_Msg[0] = MSG_EXT_SDTR_LEN;
2282 sc->HCS_Msg[1] = MSG_EXT_SDTR;
2283 sc->HCS_Msg[2] = sync_rate;
2284 sc->HCS_Msg[3] = IHA_MAX_TARGETS-1; /* REQ/ACK */
2285
2286 return (iha_msgout_extended(sc, iot, ioh));
2287 }
2288
2289 void
iha_wide_done(sc,iot,ioh)2290 iha_wide_done(sc, iot, ioh)
2291 struct iha_softc *sc;
2292 bus_space_tag_t iot;
2293 bus_space_handle_t ioh;
2294 {
2295 struct tcs *pTcs = sc->HCS_ActScb->SCB_Tcs;
2296
2297 pTcs->TCS_JS_Period = 0;
2298
2299 if (sc->HCS_Msg[2] != 0)
2300 pTcs->TCS_JS_Period |= PERIOD_WIDE_SCSI;
2301
2302 pTcs->TCS_SConfig0 &= ~ALTPD;
2303 pTcs->TCS_Flags &= ~FLAG_SYNC_DONE;
2304 pTcs->TCS_Flags |= FLAG_WIDE_DONE;
2305
2306 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0);
2307 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period);
2308 }
2309
2310 void
iha_sync_done(sc,iot,ioh)2311 iha_sync_done(sc, iot, ioh)
2312 struct iha_softc *sc;
2313 bus_space_tag_t iot;
2314 bus_space_handle_t ioh;
2315 {
2316 struct tcs *pTcs = sc->HCS_ActScb->SCB_Tcs;
2317 int i;
2318
2319 if ((pTcs->TCS_Flags & FLAG_SYNC_DONE) == 0) {
2320 if (sc->HCS_Msg[3] != 0) {
2321 pTcs->TCS_JS_Period |= sc->HCS_Msg[3];
2322
2323 /* pick the highest possible rate */
2324 for (i = 0; i < sizeof(iha_rate_tbl); i++)
2325 if (iha_rate_tbl[i] >= sc->HCS_Msg[2])
2326 break;
2327
2328 pTcs->TCS_JS_Period |= (i << 4);
2329 pTcs->TCS_SConfig0 |= ALTPD;
2330 }
2331
2332 pTcs->TCS_Flags |= FLAG_SYNC_DONE;
2333
2334 bus_space_write_1(iot, ioh, TUL_SCONFIG0, pTcs->TCS_SConfig0);
2335 bus_space_write_1(iot, ioh, TUL_SYNCM, pTcs->TCS_JS_Period);
2336 }
2337 }
2338
2339 void
iha_reset_chip(sc,iot,ioh)2340 iha_reset_chip(sc, iot, ioh)
2341 struct iha_softc *sc;
2342 bus_space_tag_t iot;
2343 bus_space_handle_t ioh;
2344 {
2345 int i;
2346
2347 /* reset tulip chip */
2348
2349 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSCSI);
2350
2351 do
2352 sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT);
2353 while((sc->HCS_JSInt & SRSTD) == 0);
2354
2355 iha_set_ssig(iot, ioh, 0, 0);
2356
2357 /*
2358 * Stall for 2 seconds, wait for target's firmware ready.
2359 */
2360 for (i = 0; i < 2000; i++)
2361 DELAY (1000);
2362
2363 bus_space_read_1(iot, ioh, TUL_SISTAT); /* Clear any active interrupt*/
2364 }
2365
2366 void
iha_select(sc,iot,ioh,pScb,select_type)2367 iha_select(sc, iot, ioh, pScb, select_type)
2368 struct iha_softc *sc;
2369 bus_space_tag_t iot;
2370 bus_space_handle_t ioh;
2371 struct iha_scb *pScb;
2372 u_int8_t select_type;
2373 {
2374 switch (select_type) {
2375 case SEL_ATN:
2376 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident);
2377 bus_space_write_multi_1(iot, ioh, TUL_SFIFO,
2378 pScb->SCB_CDB, pScb->SCB_CDBLen);
2379
2380 pScb->SCB_NxtStat = 2;
2381 break;
2382
2383 case SELATNSTOP:
2384 pScb->SCB_NxtStat = 1;
2385 break;
2386
2387 case SEL_ATN3:
2388 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_Ident);
2389 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_TagMsg);
2390 bus_space_write_1(iot, ioh, TUL_SFIFO, pScb->SCB_TagId);
2391
2392 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, pScb->SCB_CDB,
2393 pScb->SCB_CDBLen);
2394
2395 pScb->SCB_NxtStat = 2;
2396 break;
2397
2398 default:
2399 #ifdef IHA_DEBUG_STATE
2400 sc_print_addr(pScb->SCB_Xs->sc_link);
2401 printf("[debug] iha_select() - unknown select type = 0x%02x\n",
2402 select_type);
2403 #endif
2404 return;
2405 }
2406
2407 iha_del_pend_scb(sc, pScb);
2408 pScb->SCB_Status = STATUS_SELECT;
2409
2410 sc->HCS_ActScb = pScb;
2411
2412 bus_space_write_1(iot, ioh, TUL_SCMD, select_type);
2413 }
2414
2415 /*
2416 * iha_wait - wait for an interrupt to service or a SCSI bus phase change
2417 * after writing the supplied command to the tulip chip. If
2418 * the command is NO_OP, skip the command writing.
2419 */
2420 int
iha_wait(sc,iot,ioh,cmd)2421 iha_wait(sc, iot, ioh, cmd)
2422 struct iha_softc *sc;
2423 bus_space_tag_t iot;
2424 bus_space_handle_t ioh;
2425 u_int8_t cmd;
2426 {
2427 if (cmd != NO_OP)
2428 bus_space_write_1(iot, ioh, TUL_SCMD, cmd);
2429
2430 /*
2431 * Have to do this here, in addition to in iha_isr, because
2432 * interrupts might be turned off when we get here.
2433 */
2434 do
2435 sc->HCS_JSStatus0 = bus_space_read_1(iot, ioh, TUL_STAT0);
2436 while ((sc->HCS_JSStatus0 & INTPD) == 0);
2437
2438 sc->HCS_JSStatus1 = bus_space_read_1(iot, ioh, TUL_STAT1);
2439 sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT);
2440
2441 sc->HCS_Phase = sc->HCS_JSStatus0 & PH_MASK;
2442
2443 if ((sc->HCS_JSInt & SRSTD) != 0) {
2444 /* SCSI bus reset interrupt */
2445 iha_reset_scsi_bus(sc);
2446 return (-1);
2447 }
2448
2449 if ((sc->HCS_JSInt & RSELED) != 0)
2450 /* Reselection interrupt */
2451 return (iha_resel(sc, iot, ioh));
2452
2453 if ((sc->HCS_JSInt & STIMEO) != 0) {
2454 /* selected/reselected timeout interrupt */
2455 iha_busfree(sc, iot, ioh);
2456 return (-1);
2457 }
2458
2459 if ((sc->HCS_JSInt & DISCD) != 0) {
2460 /* BUS disconnection interrupt */
2461 if ((sc->HCS_Flags & FLAG_EXPECT_DONE_DISC) != 0) {
2462 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
2463 bus_space_write_1(iot, ioh, TUL_SCONFIG0,
2464 SCONFIG0DEFAULT);
2465 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL);
2466 iha_append_done_scb(sc, sc->HCS_ActScb, HOST_OK);
2467 sc->HCS_Flags &= ~FLAG_EXPECT_DONE_DISC;
2468
2469 } else if ((sc->HCS_Flags & FLAG_EXPECT_DISC) != 0) {
2470 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO);
2471 bus_space_write_1(iot, ioh, TUL_SCONFIG0,
2472 SCONFIG0DEFAULT);
2473 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL);
2474 sc->HCS_ActScb = NULL;
2475 sc->HCS_Flags &= ~FLAG_EXPECT_DISC;
2476
2477 } else
2478 iha_busfree(sc, iot, ioh);
2479
2480 return (-1);
2481 }
2482
2483 return (sc->HCS_Phase);
2484 }
2485
2486 /*
2487 * iha_done_scb - We have a scb which has been processed by the
2488 * adaptor, now we look to see how the operation went.
2489 */
2490 void
iha_done_scb(sc,pScb)2491 iha_done_scb(sc, pScb)
2492 struct iha_softc *sc;
2493 struct iha_scb *pScb;
2494 {
2495 struct scsi_sense_data *s1, *s2;
2496 struct scsi_xfer *xs = pScb->SCB_Xs;
2497
2498 if (xs != NULL) {
2499 timeout_del(&xs->stimeout);
2500
2501 xs->status = pScb->SCB_TaStat;
2502
2503 if ((pScb->SCB_Flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) != 0) {
2504 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma,
2505 0, pScb->SCB_BufChars,
2506 ((pScb->SCB_Flags & SCSI_DATA_IN) ?
2507 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
2508 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma);
2509 }
2510 if ((pScb->SCB_Flags & FLAG_SG) != 0) {
2511 bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
2512 0, sizeof(pScb->SCB_SGList),
2513 BUS_DMASYNC_POSTWRITE);
2514 bus_dmamap_unload(sc->sc_dmat, pScb->SCB_SGDma);
2515 }
2516
2517 switch (pScb->SCB_HaStat) {
2518 case HOST_OK:
2519 switch (pScb->SCB_TaStat) {
2520 case SCSI_OK:
2521 case SCSI_COND_MET:
2522 case SCSI_INTERM:
2523 case SCSI_INTERM_COND_MET:
2524 xs->resid = pScb->SCB_BufCharsLeft;
2525 xs->error = XS_NOERROR;
2526 break;
2527
2528 case SCSI_RESV_CONFLICT:
2529 case SCSI_BUSY:
2530 case SCSI_QUEUE_FULL:
2531 xs->error = XS_BUSY;
2532 break;
2533
2534 case SCSI_TERMINATED:
2535 case SCSI_ACA_ACTIVE:
2536 case SCSI_CHECK:
2537 s1 = &pScb->SCB_ScsiSenseData;
2538 s2 = &xs->sense;
2539 *s2 = *s1;
2540
2541 xs->error = XS_SENSE;
2542 break;
2543
2544 default:
2545 xs->error = XS_DRIVER_STUFFUP;
2546 break;
2547 }
2548 break;
2549
2550 case HOST_SEL_TOUT:
2551 xs->error = XS_SELTIMEOUT;
2552 break;
2553
2554 case HOST_SCSI_RST:
2555 case HOST_DEV_RST:
2556 xs->error = XS_RESET;
2557 break;
2558
2559 case HOST_SPERR:
2560 sc_print_addr(xs->sc_link);
2561 printf("SCSI Parity error detected\n");
2562 xs->error = XS_DRIVER_STUFFUP;
2563 break;
2564
2565 case HOST_TIMED_OUT:
2566 xs->error = XS_TIMEOUT;
2567 break;
2568
2569 case HOST_DO_DU:
2570 case HOST_BAD_PHAS:
2571 default:
2572 xs->error = XS_DRIVER_STUFFUP;
2573 break;
2574 }
2575
2576 xs->flags |= ITSDONE;
2577 scsi_done(xs);
2578 }
2579
2580 iha_append_free_scb(sc, pScb);
2581 }
2582
2583 void
iha_timeout(arg)2584 iha_timeout(arg)
2585 void *arg;
2586 {
2587 struct iha_scb *pScb = (struct iha_scb *)arg;
2588 struct scsi_xfer *xs = pScb->SCB_Xs;
2589
2590 if (xs != NULL) {
2591 sc_print_addr(xs->sc_link);
2592 printf("SCSI OpCode 0x%02x timed out\n", xs->cmd->opcode);
2593 iha_abort_xs(xs->sc_link->adapter_softc, xs, HOST_TIMED_OUT);
2594 }
2595 }
2596
2597 void
iha_exec_scb(sc,pScb)2598 iha_exec_scb(sc, pScb)
2599 struct iha_softc *sc;
2600 struct iha_scb *pScb;
2601 {
2602 bus_space_handle_t ioh;
2603 bus_space_tag_t iot;
2604 int s;
2605
2606 s = splbio();
2607
2608 if (((pScb->SCB_Flags & SCSI_RESET) != 0)
2609 || (pScb->SCB_CDB[0] == REQUEST_SENSE))
2610 iha_push_pend_scb(sc, pScb); /* Insert SCB at head of Pend */
2611 else
2612 iha_append_pend_scb(sc, pScb); /* Append SCB to tail of Pend */
2613
2614 /*
2615 * Run through iha_main() to ensure something is active, if
2616 * only this new SCB.
2617 */
2618 if (sc->HCS_Semaph != SEMAPH_IN_MAIN) {
2619 iot = sc->sc_iot;
2620 ioh = sc->sc_ioh;
2621
2622 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL);
2623 sc->HCS_Semaph = SEMAPH_IN_MAIN;
2624
2625 splx(s);
2626 iha_main(sc, iot, ioh);
2627 s = splbio();
2628
2629 sc->HCS_Semaph = ~SEMAPH_IN_MAIN;
2630 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP));
2631 }
2632
2633 splx(s);
2634 }
2635
2636
2637 /*
2638 * iha_set_ssig - read the current scsi signal mask, then write a new
2639 * one which turns off/on the specified signals.
2640 */
2641 void
iha_set_ssig(iot,ioh,offsigs,onsigs)2642 iha_set_ssig( iot, ioh, offsigs, onsigs)
2643 bus_space_tag_t iot;
2644 bus_space_handle_t ioh;
2645 u_int8_t offsigs, onsigs;
2646 {
2647 u_int8_t currsigs;
2648
2649 currsigs = bus_space_read_1(iot, ioh, TUL_SSIGI);
2650 bus_space_write_1(iot, ioh, TUL_SSIGO, (currsigs & ~offsigs) | onsigs);
2651 }
2652
2653 void
iha_print_info(sc,target)2654 iha_print_info(sc, target)
2655 struct iha_softc *sc;
2656 int target;
2657 {
2658 u_int8_t period = sc->HCS_Tcs[target].TCS_JS_Period;
2659 u_int8_t config = sc->HCS_Tcs[target].TCS_SConfig0;
2660 int rate;
2661
2662 printf("%s: target %d using %d bit ", sc->sc_dev.dv_xname, target,
2663 (period & PERIOD_WIDE_SCSI) ? 16 : 8);
2664
2665 if ((period & PERIOD_SYOFS) == 0)
2666 printf("async ");
2667 else {
2668 rate = (period & PERIOD_SYXPD) >> 4;
2669 if ((config & ALTPD) == 0)
2670 rate = 100 + rate * 50;
2671 else
2672 rate = 50 + rate * 25;
2673 rate = 1000000000 / rate;
2674 printf("%d.%d MHz %d REQ/ACK offset ", rate / 1000000,
2675 (rate % 1000000 + 99999) / 100000, period & PERIOD_SYOFS);
2676 }
2677
2678 printf("xfers\n");
2679 }
2680
2681
2682 /*
2683 * iha_alloc_scbs - allocate and map the SCB's for the supplied iha_softc
2684 */
2685 int
iha_alloc_scbs(sc)2686 iha_alloc_scbs(sc)
2687 struct iha_softc *sc;
2688 {
2689 bus_dma_segment_t seg;
2690 int error, rseg;
2691
2692 /*
2693 * Allocate dma-safe memory for the SCB's
2694 */
2695 if ((error = bus_dmamem_alloc(sc->sc_dmat,
2696 sizeof(struct iha_scb)*IHA_MAX_SCB,
2697 NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT))
2698 != 0) {
2699 printf("%s: unable to allocate SCBs,"
2700 " error = %d\n", sc->sc_dev.dv_xname, error);
2701 return (error);
2702 }
2703 if ((error = bus_dmamem_map(sc->sc_dmat,
2704 &seg, rseg, sizeof(struct iha_scb)*IHA_MAX_SCB,
2705 (caddr_t *)&sc->HCS_Scb, BUS_DMA_NOWAIT | BUS_DMA_COHERENT))
2706 != 0) {
2707 printf("%s: unable to map SCBs, error = %d\n",
2708 sc->sc_dev.dv_xname, error);
2709 return (error);
2710 }
2711 bzero(sc->HCS_Scb, sizeof(struct iha_scb)*IHA_MAX_SCB);
2712
2713 return (0);
2714 }
2715
2716 /*
2717 * iha_read_eeprom - read contents of serial EEPROM into iha_nvram pointed at
2718 * by parameter nvram.
2719 */
2720 void
iha_read_eeprom(iot,ioh,nvram)2721 iha_read_eeprom(iot, ioh, nvram)
2722 bus_space_tag_t iot;
2723 bus_space_handle_t ioh;
2724 struct iha_nvram *nvram;
2725 {
2726 u_int32_t chksum;
2727 u_int16_t *np;
2728 u_int8_t gctrl, addr;
2729
2730 const int chksum_addr = offsetof(struct iha_nvram, NVM_CheckSum) / 2;
2731
2732 /* Enable EEProm programming */
2733 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) | EEPRG;
2734 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl);
2735
2736 /* Read EEProm */
2737 np = (u_int16_t *)nvram;
2738 for (addr=0, chksum=0; addr < chksum_addr; addr++, np++) {
2739 *np = iha_se2_rd(iot, ioh, addr);
2740 chksum += *np;
2741 }
2742
2743 chksum &= 0x0000ffff;
2744 nvram->NVM_CheckSum = iha_se2_rd(iot, ioh, chksum_addr);
2745
2746 /* Disable EEProm programming */
2747 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) & ~EEPRG;
2748 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl);
2749
2750 if ((nvram->NVM_Signature != SIGNATURE)
2751 ||
2752 (nvram->NVM_CheckSum != chksum))
2753 panic("iha: invalid EEPROM, bad signature or checksum");
2754 }
2755
2756 /*
2757 * iha_se2_rd - read & return the 16 bit value at the specified
2758 * offset in the Serial E2PROM
2759 *
2760 */
2761 u_int16_t
iha_se2_rd(iot,ioh,addr)2762 iha_se2_rd(iot, ioh, addr)
2763 bus_space_tag_t iot;
2764 bus_space_handle_t ioh;
2765 u_int8_t addr;
2766 {
2767 u_int16_t readWord;
2768 u_int8_t bit;
2769 int i;
2770
2771 /* Send 'READ' instruction == address | READ bit */
2772 iha_se2_instr(iot, ioh, (addr | NVREAD));
2773
2774 readWord = 0;
2775 for (i = 15; i >= 0; i--) {
2776 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK);
2777 DELAY(5);
2778
2779 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS);
2780 DELAY(5);
2781
2782 /* sample data after the following edge of clock */
2783 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI;
2784 DELAY(5);
2785
2786 readWord += bit << i;
2787 }
2788
2789 bus_space_write_1(iot, ioh, TUL_NVRAM, 0);
2790 DELAY(5);
2791
2792 return (readWord);
2793 }
2794
2795 /*
2796 * iha_se2_instr - write an octet to serial E2PROM one bit at a time
2797 */
2798 void
iha_se2_instr(iot,ioh,instr)2799 iha_se2_instr(iot, ioh, instr)
2800 bus_space_tag_t iot;
2801 bus_space_handle_t ioh;
2802 u_int8_t instr;
2803 {
2804 u_int8_t b;
2805 int i;
2806
2807 b = NVRCS | NVRDO; /* Write the start bit (== 1) */
2808
2809 bus_space_write_1(iot, ioh, TUL_NVRAM, b);
2810 DELAY(5);
2811 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK);
2812 DELAY(5);
2813
2814 for (i = 0; i < 8; i++, instr <<= 1) {
2815 if (instr & 0x80)
2816 b = NVRCS | NVRDO; /* Write a 1 bit */
2817 else
2818 b = NVRCS; /* Write a 0 bit */
2819
2820 bus_space_write_1(iot, ioh, TUL_NVRAM, b);
2821 DELAY(5);
2822 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK);
2823 DELAY(5);
2824 }
2825
2826 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS);
2827 DELAY(5);
2828
2829 return;
2830 }
2831
2832 /*
2833 * iha_reset_tcs - reset the target control structure pointed
2834 * to by pTcs to default values. TCS_Flags
2835 * only has the negotiation done bits reset as
2836 * the other bits are fixed at initialization.
2837 */
2838 void
iha_reset_tcs(pTcs,config0)2839 iha_reset_tcs(pTcs, config0)
2840 struct tcs *pTcs;
2841 u_int8_t config0;
2842 {
2843 pTcs->TCS_Flags &= ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE);
2844 pTcs->TCS_JS_Period = 0;
2845 pTcs->TCS_SConfig0 = config0;
2846 pTcs->TCS_TagCnt = 0;
2847 pTcs->TCS_NonTagScb = NULL;
2848 }
2849