1 /* $OpenBSD: com.c,v 1.96 2004/05/03 15:18:21 drahn Exp $ */
2 /* $NetBSD: com.c,v 1.82.4.1 1996/06/02 09:08:00 mrg Exp $ */
3
4 /*
5 * Copyright (c) 1997 - 1999, Jason Downs. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR(S) ``AS IS'' AND ANY EXPRESS
17 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR(S) BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28 /*-
29 * Copyright (c) 1993, 1994, 1995, 1996
30 * Charles M. Hannum. All rights reserved.
31 * Copyright (c) 1991 The Regents of the University of California.
32 * All rights reserved.
33 *
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
36 * are met:
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. Neither the name of the University nor the names of its contributors
43 * may be used to endorse or promote products derived from this software
44 * without specific prior written permission.
45 *
46 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
47 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
50 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
51 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
52 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
55 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 * SUCH DAMAGE.
57 *
58 * @(#)com.c 7.5 (Berkeley) 5/16/91
59 */
60
61 /*
62 * COM driver, based on HP dca driver
63 * uses National Semiconductor NS16450/NS16550AF UART
64 */
65 #include <sys/param.h>
66 #include <sys/systm.h>
67 #include <sys/ioctl.h>
68 #include <sys/select.h>
69 #include <sys/tty.h>
70 #include <sys/proc.h>
71 #include <sys/user.h>
72 #include <sys/conf.h>
73 #include <sys/file.h>
74 #include <sys/uio.h>
75 #include <sys/kernel.h>
76 #include <sys/syslog.h>
77 #include <sys/types.h>
78 #include <sys/device.h>
79 #include <sys/vnode.h>
80 #ifdef DDB
81 #include <ddb/db_var.h>
82 #endif
83
84 #include <machine/bus.h>
85 #include <machine/intr.h>
86
87 #include <dev/cons.h>
88
89 #include <dev/ic/comreg.h>
90 #include <dev/ic/comvar.h>
91 #include <dev/ic/ns16550reg.h>
92 #define com_lcr com_cfcr
93
94 #include "com.h"
95
96 /* XXX: These belong elsewhere */
97 cdev_decl(com);
98
99 static u_char tiocm_xxx2mcr(int);
100
101 void compwroff(struct com_softc *);
102 void com_enable_debugport(struct com_softc *);
103
104 struct cfdriver com_cd = {
105 NULL, "com", DV_TTY
106 };
107
108 int comdefaultrate = TTYDEF_SPEED;
109 int comconsinit;
110 int comconsaddr;
111 int comconsattached;
112 bus_space_tag_t comconsiot;
113 bus_space_handle_t comconsioh;
114 tcflag_t comconscflag = TTYDEF_CFLAG;
115
116 int commajor;
117
118 #ifdef KGDB
119 #include <sys/kgdb.h>
120
121 int com_kgdb_addr;
122 bus_space_tag_t com_kgdb_iot;
123 bus_space_handle_t com_kgdb_ioh;
124
125 int com_kgdb_getc(void *);
126 void com_kgdb_putc(void *, int);
127 #endif /* KGDB */
128
129 #define DEVUNIT(x) (minor(x) & 0x7f)
130 #define DEVCUA(x) (minor(x) & 0x80)
131
132 int
comspeed(freq,speed)133 comspeed(freq, speed)
134 long freq;
135 long speed;
136 {
137 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
138
139 int x, err;
140
141 if (speed == 0)
142 return 0;
143 if (speed < 0)
144 return -1;
145 x = divrnd((freq / 16), speed);
146 if (x <= 0)
147 return -1;
148 err = divrnd((freq / 16) * 1000, speed * x) - 1000;
149 if (err < 0)
150 err = -err;
151 if (err > COM_TOLERANCE)
152 return -1;
153 return x;
154
155 #undef divrnd
156 }
157
158 int
comprobe1(iot,ioh)159 comprobe1(iot, ioh)
160 bus_space_tag_t iot;
161 bus_space_handle_t ioh;
162 {
163 int i, k;
164
165 /* force access to id reg */
166 bus_space_write_1(iot, ioh, com_lcr, 0);
167 bus_space_write_1(iot, ioh, com_iir, 0);
168 for (i = 0; i < 32; i++) {
169 k = bus_space_read_1(iot, ioh, com_iir);
170 if (k & 0x38) {
171 bus_space_read_1(iot, ioh, com_data); /* cleanup */
172 } else
173 break;
174 }
175 if (i >= 32)
176 return 0;
177
178 return 1;
179 }
180
181 void
com_attach_subr(sc)182 com_attach_subr(sc)
183 struct com_softc *sc;
184 {
185 bus_space_tag_t iot = sc->sc_iot;
186 bus_space_handle_t ioh = sc->sc_ioh;
187 u_int8_t lcr;
188
189 sc->sc_ier = 0;
190 /* disable interrupts */
191 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
192
193 if (sc->sc_iobase == comconsaddr) {
194 comconsattached = 1;
195
196 /*
197 * Need to reset baud rate, etc. of next print so reset
198 * comconsinit. Also make sure console is always "hardwired".
199 */
200 delay(10000); /* wait for output to finish */
201 SET(sc->sc_hwflags, COM_HW_CONSOLE);
202 SET(sc->sc_swflags, COM_SW_SOFTCAR);
203 }
204
205 /*
206 * Probe for all known forms of UART.
207 */
208 lcr = bus_space_read_1(iot, ioh, com_lcr);
209 bus_space_write_1(iot, ioh, com_lcr, 0xbf);
210 bus_space_write_1(iot, ioh, com_efr, 0);
211 bus_space_write_1(iot, ioh, com_lcr, 0);
212
213 bus_space_write_1(iot, ioh, com_fifo, FIFO_ENABLE);
214 delay(100);
215
216 switch(bus_space_read_1(iot, ioh, com_iir) >> 6) {
217 case 0:
218 sc->sc_uarttype = COM_UART_16450;
219 break;
220 case 2:
221 sc->sc_uarttype = COM_UART_16550;
222 break;
223 case 3:
224 sc->sc_uarttype = COM_UART_16550A;
225 break;
226 default:
227 sc->sc_uarttype = COM_UART_UNKNOWN;
228 break;
229 }
230
231 if (sc->sc_uarttype == COM_UART_16550A) { /* Probe for ST16650s */
232 bus_space_write_1(iot, ioh, com_lcr, lcr | LCR_DLAB);
233 if (bus_space_read_1(iot, ioh, com_efr) == 0) {
234 sc->sc_uarttype = COM_UART_ST16650;
235 } else {
236 bus_space_write_1(iot, ioh, com_lcr, 0xbf);
237 if (bus_space_read_1(iot, ioh, com_efr) == 0)
238 sc->sc_uarttype = COM_UART_ST16650V2;
239 }
240 }
241
242 if (sc->sc_uarttype == COM_UART_16550A) { /* Probe for TI16750s */
243 bus_space_write_1(iot, ioh, com_lcr, lcr | LCR_DLAB);
244 bus_space_write_1(iot, ioh, com_fifo,
245 FIFO_ENABLE | FIFO_ENABLE_64BYTE);
246 if ((bus_space_read_1(iot, ioh, com_iir) >> 5) == 7) {
247 #if 0
248 bus_space_write_1(iot, ioh, com_lcr, 0);
249 if ((bus_space_read_1(iot, ioh, com_iir) >> 5) == 6)
250 #endif
251 sc->sc_uarttype = COM_UART_TI16750;
252 }
253 bus_space_write_1(iot, ioh, com_fifo, FIFO_ENABLE);
254 }
255 bus_space_write_1(iot, ioh, com_lcr, lcr);
256 if (sc->sc_uarttype == COM_UART_16450) { /* Probe for 8250 */
257 u_int8_t scr0, scr1, scr2;
258
259 scr0 = bus_space_read_1(iot, ioh, com_scratch);
260 bus_space_write_1(iot, ioh, com_scratch, 0xa5);
261 scr1 = bus_space_read_1(iot, ioh, com_scratch);
262 bus_space_write_1(iot, ioh, com_scratch, 0x5a);
263 scr2 = bus_space_read_1(iot, ioh, com_scratch);
264 bus_space_write_1(iot, ioh, com_scratch, scr0);
265
266 if ((scr1 != 0xa5) || (scr2 != 0x5a))
267 sc->sc_uarttype = COM_UART_8250;
268 }
269
270 /*
271 * Print UART type and initialize ourself.
272 */
273 sc->sc_fifolen = 1; /* default */
274 switch (sc->sc_uarttype) {
275 case COM_UART_UNKNOWN:
276 printf(": unknown uart\n");
277 break;
278 case COM_UART_8250:
279 printf(": ns8250, no fifo\n");
280 break;
281 case COM_UART_16450:
282 printf(": ns16450, no fifo\n");
283 break;
284 case COM_UART_16550:
285 printf(": ns16550, no working fifo\n");
286 break;
287 case COM_UART_16550A:
288 printf(": ns16550a, 16 byte fifo\n");
289 SET(sc->sc_hwflags, COM_HW_FIFO);
290 sc->sc_fifolen = 16;
291 break;
292 case COM_UART_ST16650:
293 printf(": st16650, no working fifo\n");
294 break;
295 case COM_UART_ST16650V2:
296 printf(": st16650, 32 byte fifo\n");
297 SET(sc->sc_hwflags, COM_HW_FIFO);
298 sc->sc_fifolen = 32;
299 break;
300 case COM_UART_TI16750:
301 printf(": ti16750, 64 byte fifo\n");
302 SET(sc->sc_hwflags, COM_HW_FIFO);
303 sc->sc_fifolen = 64;
304 break;
305 default:
306 panic("comattach: bad fifo type");
307 }
308
309 /* clear and disable fifo */
310 bus_space_write_1(iot, ioh, com_fifo, FIFO_RCV_RST | FIFO_XMT_RST);
311 (void)bus_space_read_1(iot, ioh, com_data);
312 bus_space_write_1(iot, ioh, com_fifo, 0);
313
314 sc->sc_mcr = 0;
315 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
316
317 #ifdef KGDB
318 /*
319 * Allow kgdb to "take over" this port. If this is
320 * the kgdb device, it has exclusive use.
321 */
322
323 if (iot == com_kgdb_iot && sc->sc_iobase == com_kgdb_addr &&
324 !ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
325 printf("%s: kgdb\n", sc->sc_dev.dv_xname);
326 SET(sc->sc_hwflags, COM_HW_KGDB);
327 }
328 #endif /* KGDB */
329
330 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
331 int maj;
332
333 /* locate the major number */
334 for (maj = 0; maj < nchrdev; maj++)
335 if (cdevsw[maj].d_open == comopen)
336 break;
337
338 if (maj < nchrdev && cn_tab->cn_dev == NODEV)
339 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
340
341 printf("%s: console\n", sc->sc_dev.dv_xname);
342 }
343
344 timeout_set(&sc->sc_diag_tmo, comdiag, sc);
345 timeout_set(&sc->sc_dtr_tmo, com_raisedtr, sc);
346 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
347 sc->sc_si = softintr_establish(IPL_TTY, comsoft, sc);
348 if (sc->sc_si == NULL)
349 panic("%s: can't establish soft interrupt.", sc->sc_dev.dv_xname);
350 #else
351 timeout_set(&sc->sc_comsoft_tmo, comsoft, sc);
352 #endif
353
354 /*
355 * If there are no enable/disable functions, assume the device
356 * is always enabled.
357 */
358 if (!sc->enable)
359 sc->enabled = 1;
360
361 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB))
362 com_enable_debugport(sc);
363 }
364
365 void
com_enable_debugport(sc)366 com_enable_debugport(sc)
367 struct com_softc *sc;
368 {
369 int s;
370
371 /* Turn on line break interrupt, set carrier. */
372 s = splhigh();
373 #ifdef KGDB
374 SET(sc->sc_ier, IER_ERXRDY);
375 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier);
376 #endif
377 SET(sc->sc_mcr, MCR_DTR | MCR_RTS | MCR_IENABLE);
378 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr);
379
380 splx(s);
381 }
382
383 int
com_detach(self,flags)384 com_detach(self, flags)
385 struct device *self;
386 int flags;
387 {
388 struct com_softc *sc = (struct com_softc *)self;
389 int maj, mn;
390
391 /* locate the major number */
392 for (maj = 0; maj < nchrdev; maj++)
393 if (cdevsw[maj].d_open == comopen)
394 break;
395
396 /* Nuke the vnodes for any open instances. */
397 mn = self->dv_unit;
398 vdevgone(maj, mn, mn, VCHR);
399
400 /* XXX a symbolic constant for the cua bit would be nicer. */
401 mn |= 0x80;
402 vdevgone(maj, mn, mn, VCHR);
403
404 /* Detach and free the tty. */
405 if (sc->sc_tty) {
406 ttyfree(sc->sc_tty);
407 }
408
409 timeout_del(&sc->sc_dtr_tmo);
410 timeout_del(&sc->sc_diag_tmo);
411 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
412 softintr_disestablish(sc->sc_si);
413 #else
414 timeout_del(&sc->sc_comsoft_tmo);
415 #endif
416
417 return (0);
418 }
419
420 int
com_activate(self,act)421 com_activate(self, act)
422 struct device *self;
423 enum devact act;
424 {
425 struct com_softc *sc = (struct com_softc *)self;
426 int s, rv = 0;
427
428 s = spltty();
429 switch (act) {
430 case DVACT_ACTIVATE:
431 rv = EOPNOTSUPP;
432 break;
433
434 case DVACT_DEACTIVATE:
435 #ifdef KGDB
436 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) {
437 #else
438 if (sc->sc_hwflags & COM_HW_CONSOLE) {
439 #endif /* KGDB */
440 rv = EBUSY;
441 break;
442 }
443
444 if (sc->disable != NULL && sc->enabled != 0) {
445 (*sc->disable)(sc);
446 sc->enabled = 0;
447 }
448 break;
449 }
450 splx(s);
451 return (rv);
452 }
453
454 int
comopen(dev,flag,mode,p)455 comopen(dev, flag, mode, p)
456 dev_t dev;
457 int flag, mode;
458 struct proc *p;
459 {
460 int unit = DEVUNIT(dev);
461 struct com_softc *sc;
462 bus_space_tag_t iot;
463 bus_space_handle_t ioh;
464 struct tty *tp;
465 int s;
466 int error = 0;
467
468 if (unit >= com_cd.cd_ndevs)
469 return ENXIO;
470 sc = com_cd.cd_devs[unit];
471 if (!sc)
472 return ENXIO;
473
474 #ifdef KGDB
475 /*
476 * If this is the kgdb port, no other use is permitted.
477 */
478 if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
479 return (EBUSY);
480 #endif /* KGDB */
481
482 s = spltty();
483 if (!sc->sc_tty) {
484 tp = sc->sc_tty = ttymalloc();
485 } else
486 tp = sc->sc_tty;
487 splx(s);
488
489 tp->t_oproc = comstart;
490 tp->t_param = comparam;
491 tp->t_dev = dev;
492 if (!ISSET(tp->t_state, TS_ISOPEN)) {
493 SET(tp->t_state, TS_WOPEN);
494 ttychars(tp);
495 tp->t_iflag = TTYDEF_IFLAG;
496 tp->t_oflag = TTYDEF_OFLAG;
497 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
498 tp->t_cflag = comconscflag;
499 else
500 tp->t_cflag = TTYDEF_CFLAG;
501 if (ISSET(sc->sc_swflags, COM_SW_CLOCAL))
502 SET(tp->t_cflag, CLOCAL);
503 if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS))
504 SET(tp->t_cflag, CRTSCTS);
505 if (ISSET(sc->sc_swflags, COM_SW_MDMBUF))
506 SET(tp->t_cflag, MDMBUF);
507 tp->t_lflag = TTYDEF_LFLAG;
508 tp->t_ispeed = tp->t_ospeed = comdefaultrate;
509
510 s = spltty();
511
512 sc->sc_initialize = 1;
513 comparam(tp, &tp->t_termios);
514 ttsetwater(tp);
515
516 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
517 timeout_add(&sc->sc_comsoft_tmo, 1);
518 #endif
519
520 sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0];
521 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
522 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
523
524 iot = sc->sc_iot;
525 ioh = sc->sc_ioh;
526
527 /*
528 * Wake up the sleepy heads.
529 */
530 switch (sc->sc_uarttype) {
531 case COM_UART_ST16650:
532 case COM_UART_ST16650V2:
533 bus_space_write_1(iot, ioh, com_lcr, 0xbf);
534 bus_space_write_1(iot, ioh, com_efr, EFR_ECB);
535 bus_space_write_1(iot, ioh, com_ier, 0);
536 bus_space_write_1(iot, ioh, com_efr, 0);
537 bus_space_write_1(iot, ioh, com_lcr, 0);
538 break;
539 case COM_UART_TI16750:
540 bus_space_write_1(iot, ioh, com_ier, 0);
541 break;
542 }
543
544 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
545 u_int8_t fifo = FIFO_ENABLE|FIFO_RCV_RST|FIFO_XMT_RST;
546 u_int8_t lcr;
547
548 if (tp->t_ispeed <= 1200)
549 fifo |= FIFO_TRIGGER_1;
550 else
551 fifo |= FIFO_TRIGGER_8;
552 if (sc->sc_uarttype == COM_UART_TI16750) {
553 fifo |= FIFO_ENABLE_64BYTE;
554 lcr = bus_space_read_1(iot, ioh, com_lcr);
555 bus_space_write_1(iot, ioh, com_lcr,
556 lcr | LCR_DLAB);
557 }
558
559 /*
560 * (Re)enable and drain FIFOs.
561 *
562 * Certain SMC chips cause problems if the FIFOs are
563 * enabled while input is ready. Turn off the FIFO
564 * if necessary to clear the input. Test the input
565 * ready bit after enabling the FIFOs to handle races
566 * between enabling and fresh input.
567 *
568 * Set the FIFO threshold based on the receive speed.
569 */
570 for (;;) {
571 bus_space_write_1(iot, ioh, com_fifo, 0);
572 delay(100);
573 (void) bus_space_read_1(iot, ioh, com_data);
574 bus_space_write_1(iot, ioh, com_fifo, fifo |
575 FIFO_RCV_RST | FIFO_XMT_RST);
576 delay(100);
577 if(!ISSET(bus_space_read_1(iot, ioh,
578 com_lsr), LSR_RXRDY))
579 break;
580 }
581 if (sc->sc_uarttype == COM_UART_TI16750)
582 bus_space_write_1(iot, ioh, com_lcr, lcr);
583 }
584
585 /* flush any pending I/O */
586 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
587 (void) bus_space_read_1(iot, ioh, com_data);
588 /* you turn me on, baby */
589 sc->sc_mcr = MCR_DTR | MCR_RTS;
590 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
591 SET(sc->sc_mcr, MCR_IENABLE);
592 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
593 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC;
594 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
595
596 sc->sc_msr = bus_space_read_1(iot, ioh, com_msr);
597 if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || DEVCUA(dev) ||
598 ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF))
599 SET(tp->t_state, TS_CARR_ON);
600 else
601 CLR(tp->t_state, TS_CARR_ON);
602 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0)
603 return EBUSY;
604 else
605 s = spltty();
606
607 if (DEVCUA(dev)) {
608 if (ISSET(tp->t_state, TS_ISOPEN)) {
609 /* Ah, but someone already is dialed in... */
610 splx(s);
611 return EBUSY;
612 }
613 sc->sc_cua = 1; /* We go into CUA mode */
614 } else {
615 /* tty (not cua) device; wait for carrier if necessary */
616 if (ISSET(flag, O_NONBLOCK)) {
617 if (sc->sc_cua) {
618 /* Opening TTY non-blocking... but the CUA is busy */
619 splx(s);
620 return EBUSY;
621 }
622 } else {
623 while (sc->sc_cua ||
624 (!ISSET(tp->t_cflag, CLOCAL) &&
625 !ISSET(tp->t_state, TS_CARR_ON))) {
626 SET(tp->t_state, TS_WOPEN);
627 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, ttopen, 0);
628 /*
629 * If TS_WOPEN has been reset, that means the cua device
630 * has been closed. We don't want to fail in that case,
631 * so just go around again.
632 */
633 if (error && ISSET(tp->t_state, TS_WOPEN)) {
634 CLR(tp->t_state, TS_WOPEN);
635 if (!sc->sc_cua && !ISSET(tp->t_state, TS_ISOPEN))
636 compwroff(sc);
637 splx(s);
638 return error;
639 }
640 }
641 }
642 }
643 splx(s);
644
645 return (*linesw[tp->t_line].l_open)(dev, tp);
646 }
647
648 int
comclose(dev,flag,mode,p)649 comclose(dev, flag, mode, p)
650 dev_t dev;
651 int flag, mode;
652 struct proc *p;
653 {
654 int unit = DEVUNIT(dev);
655 struct com_softc *sc = com_cd.cd_devs[unit];
656 bus_space_tag_t iot = sc->sc_iot;
657 bus_space_handle_t ioh = sc->sc_ioh;
658 struct tty *tp = sc->sc_tty;
659 int s;
660
661 /* XXX This is for cons.c. */
662 if (!ISSET(tp->t_state, TS_ISOPEN))
663 return 0;
664
665 (*linesw[tp->t_line].l_close)(tp, flag);
666 s = spltty();
667 if (ISSET(tp->t_state, TS_WOPEN)) {
668 /* tty device is waiting for carrier; drop dtr then re-raise */
669 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
670 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
671 timeout_add(&sc->sc_dtr_tmo, hz * 2);
672 } else {
673 /* no one else waiting; turn off the uart */
674 compwroff(sc);
675 }
676 CLR(tp->t_state, TS_BUSY | TS_FLUSH);
677 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
678 timeout_del(&sc->sc_comsoft_tmo);
679 #endif
680 sc->sc_cua = 0;
681 splx(s);
682 ttyclose(tp);
683
684 #ifdef notyet /* XXXX */
685 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
686 ttyfree(tp);
687 sc->sc_tty = 0;
688 }
689 #endif
690 return 0;
691 }
692
693 void
compwroff(sc)694 compwroff(sc)
695 struct com_softc *sc;
696 {
697 bus_space_tag_t iot = sc->sc_iot;
698 bus_space_handle_t ioh = sc->sc_ioh;
699 struct tty *tp = sc->sc_tty;
700
701 CLR(sc->sc_lcr, LCR_SBREAK);
702 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
703 bus_space_write_1(iot, ioh, com_ier, 0);
704 if (ISSET(tp->t_cflag, HUPCL) &&
705 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) {
706 /* XXX perhaps only clear DTR */
707 sc->sc_mcr = 0;
708 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
709 }
710
711 /*
712 * Turn FIFO off; enter sleep mode if possible.
713 */
714 bus_space_write_1(iot, ioh, com_fifo, 0);
715 delay(100);
716 (void) bus_space_read_1(iot, ioh, com_data);
717 delay(100);
718 bus_space_write_1(iot, ioh, com_fifo,
719 FIFO_RCV_RST | FIFO_XMT_RST);
720
721 switch (sc->sc_uarttype) {
722 case COM_UART_ST16650:
723 case COM_UART_ST16650V2:
724 bus_space_write_1(iot, ioh, com_lcr, 0xbf);
725 bus_space_write_1(iot, ioh, com_efr, EFR_ECB);
726 bus_space_write_1(iot, ioh, com_ier, IER_SLEEP);
727 bus_space_write_1(iot, ioh, com_lcr, 0);
728 break;
729 case COM_UART_TI16750:
730 bus_space_write_1(iot, ioh, com_ier, IER_SLEEP);
731 break;
732 }
733 }
734
735 void
com_raisedtr(arg)736 com_raisedtr(arg)
737 void *arg;
738 {
739 struct com_softc *sc = arg;
740
741 SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
742 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr);
743 }
744
745 int
comread(dev,uio,flag)746 comread(dev, uio, flag)
747 dev_t dev;
748 struct uio *uio;
749 int flag;
750 {
751 struct com_softc *sc = com_cd.cd_devs[DEVUNIT(dev)];
752 struct tty *tp = sc->sc_tty;
753
754 return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
755 }
756
757 int
comwrite(dev,uio,flag)758 comwrite(dev, uio, flag)
759 dev_t dev;
760 struct uio *uio;
761 int flag;
762 {
763 struct com_softc *sc = com_cd.cd_devs[DEVUNIT(dev)];
764 struct tty *tp = sc->sc_tty;
765
766 return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
767 }
768
769 struct tty *
comtty(dev)770 comtty(dev)
771 dev_t dev;
772 {
773 struct com_softc *sc = com_cd.cd_devs[DEVUNIT(dev)];
774 struct tty *tp = sc->sc_tty;
775
776 return (tp);
777 }
778
779 static u_char
tiocm_xxx2mcr(data)780 tiocm_xxx2mcr(data)
781 int data;
782 {
783 u_char m = 0;
784
785 if (ISSET(data, TIOCM_DTR))
786 SET(m, MCR_DTR);
787 if (ISSET(data, TIOCM_RTS))
788 SET(m, MCR_RTS);
789 return m;
790 }
791
792 int
comioctl(dev,cmd,data,flag,p)793 comioctl(dev, cmd, data, flag, p)
794 dev_t dev;
795 u_long cmd;
796 caddr_t data;
797 int flag;
798 struct proc *p;
799 {
800 int unit = DEVUNIT(dev);
801 struct com_softc *sc = com_cd.cd_devs[unit];
802 struct tty *tp = sc->sc_tty;
803 bus_space_tag_t iot = sc->sc_iot;
804 bus_space_handle_t ioh = sc->sc_ioh;
805 int error;
806
807 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
808 if (error >= 0)
809 return error;
810 error = ttioctl(tp, cmd, data, flag, p);
811 if (error >= 0)
812 return error;
813
814 switch (cmd) {
815 case TIOCSBRK:
816 SET(sc->sc_lcr, LCR_SBREAK);
817 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
818 break;
819 case TIOCCBRK:
820 CLR(sc->sc_lcr, LCR_SBREAK);
821 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
822 break;
823 case TIOCSDTR:
824 SET(sc->sc_mcr, sc->sc_dtr);
825 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
826 break;
827 case TIOCCDTR:
828 CLR(sc->sc_mcr, sc->sc_dtr);
829 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
830 break;
831 case TIOCMSET:
832 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
833 case TIOCMBIS:
834 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
835 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
836 break;
837 case TIOCMBIC:
838 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
839 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
840 break;
841 case TIOCMGET: {
842 u_char m;
843 int bits = 0;
844
845 m = sc->sc_mcr;
846 if (ISSET(m, MCR_DTR))
847 SET(bits, TIOCM_DTR);
848 if (ISSET(m, MCR_RTS))
849 SET(bits, TIOCM_RTS);
850 m = sc->sc_msr;
851 if (ISSET(m, MSR_DCD))
852 SET(bits, TIOCM_CD);
853 if (ISSET(m, MSR_CTS))
854 SET(bits, TIOCM_CTS);
855 if (ISSET(m, MSR_DSR))
856 SET(bits, TIOCM_DSR);
857 if (ISSET(m, MSR_RI | MSR_TERI))
858 SET(bits, TIOCM_RI);
859 if (bus_space_read_1(iot, ioh, com_ier))
860 SET(bits, TIOCM_LE);
861 *(int *)data = bits;
862 break;
863 }
864 case TIOCGFLAGS: {
865 int driverbits, userbits = 0;
866
867 driverbits = sc->sc_swflags;
868 if (ISSET(driverbits, COM_SW_SOFTCAR))
869 SET(userbits, TIOCFLAG_SOFTCAR);
870 if (ISSET(driverbits, COM_SW_CLOCAL))
871 SET(userbits, TIOCFLAG_CLOCAL);
872 if (ISSET(driverbits, COM_SW_CRTSCTS))
873 SET(userbits, TIOCFLAG_CRTSCTS);
874 if (ISSET(driverbits, COM_SW_MDMBUF))
875 SET(userbits, TIOCFLAG_MDMBUF);
876 if (ISSET(driverbits, COM_SW_PPS))
877 SET(userbits, TIOCFLAG_PPS);
878
879 *(int *)data = userbits;
880 break;
881 }
882 case TIOCSFLAGS: {
883 int userbits, driverbits = 0;
884
885 error = suser(p, 0);
886 if (error != 0)
887 return(EPERM);
888
889 userbits = *(int *)data;
890 if (ISSET(userbits, TIOCFLAG_SOFTCAR) ||
891 ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
892 SET(driverbits, COM_SW_SOFTCAR);
893 if (ISSET(userbits, TIOCFLAG_CLOCAL))
894 SET(driverbits, COM_SW_CLOCAL);
895 if (ISSET(userbits, TIOCFLAG_CRTSCTS))
896 SET(driverbits, COM_SW_CRTSCTS);
897 if (ISSET(userbits, TIOCFLAG_MDMBUF))
898 SET(driverbits, COM_SW_MDMBUF);
899 if (ISSET(userbits, TIOCFLAG_PPS))
900 SET(driverbits, COM_SW_PPS);
901
902 sc->sc_swflags = driverbits;
903 break;
904 }
905 default:
906 return ENOTTY;
907 }
908
909 return 0;
910 }
911
912 /* already called at spltty */
913 int
comparam(tp,t)914 comparam(tp, t)
915 struct tty *tp;
916 struct termios *t;
917 {
918 struct com_softc *sc = com_cd.cd_devs[DEVUNIT(tp->t_dev)];
919 bus_space_tag_t iot = sc->sc_iot;
920 bus_space_handle_t ioh = sc->sc_ioh;
921 int ospeed = comspeed(sc->sc_frequency, t->c_ospeed);
922 u_char lcr;
923 tcflag_t oldcflag;
924
925 /* check requested parameters */
926 if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
927 return EINVAL;
928
929 lcr = ISSET(sc->sc_lcr, LCR_SBREAK);
930
931 switch (ISSET(t->c_cflag, CSIZE)) {
932 case CS5:
933 SET(lcr, LCR_5BITS);
934 break;
935 case CS6:
936 SET(lcr, LCR_6BITS);
937 break;
938 case CS7:
939 SET(lcr, LCR_7BITS);
940 break;
941 case CS8:
942 SET(lcr, LCR_8BITS);
943 break;
944 }
945 if (ISSET(t->c_cflag, PARENB)) {
946 SET(lcr, LCR_PENAB);
947 if (!ISSET(t->c_cflag, PARODD))
948 SET(lcr, LCR_PEVEN);
949 }
950 if (ISSET(t->c_cflag, CSTOPB))
951 SET(lcr, LCR_STOPB);
952
953 sc->sc_lcr = lcr;
954
955 if (ospeed == 0) {
956 CLR(sc->sc_mcr, MCR_DTR);
957 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
958 }
959
960 /*
961 * Set the FIFO threshold based on the receive speed, if we are
962 * changing it.
963 */
964 if (sc->sc_initialize || (tp->t_ispeed != t->c_ispeed)) {
965 sc->sc_initialize = 0;
966
967 if (ospeed != 0) {
968 /*
969 * Make sure the transmit FIFO is empty before
970 * proceeding. If we don't do this, some revisions
971 * of the UART will hang. Interestingly enough,
972 * even if we do this while the last character is
973 * still being pushed out, they don't hang. This
974 * seems good enough.
975 */
976 while (ISSET(tp->t_state, TS_BUSY)) {
977 int error;
978
979 ++sc->sc_halt;
980 error = ttysleep(tp, &tp->t_outq,
981 TTOPRI | PCATCH, "comprm", 0);
982 --sc->sc_halt;
983 if (error) {
984 comstart(tp);
985 return (error);
986 }
987 }
988
989 bus_space_write_1(iot, ioh, com_lcr, lcr | LCR_DLAB);
990 bus_space_write_1(iot, ioh, com_dlbl, ospeed);
991 bus_space_write_1(iot, ioh, com_dlbh, ospeed >> 8);
992 bus_space_write_1(iot, ioh, com_lcr, lcr);
993 SET(sc->sc_mcr, MCR_DTR);
994 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
995 } else
996 bus_space_write_1(iot, ioh, com_lcr, lcr);
997
998 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
999 if (sc->sc_uarttype == COM_UART_TI16750) {
1000 bus_space_write_1(iot, ioh, com_lcr,
1001 lcr | LCR_DLAB);
1002 bus_space_write_1(iot, ioh, com_fifo,
1003 FIFO_ENABLE | FIFO_ENABLE_64BYTE |
1004 (t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8));
1005 bus_space_write_1(iot, ioh, com_lcr, lcr);
1006 } else
1007 bus_space_write_1(iot, ioh, com_fifo,
1008 FIFO_ENABLE |
1009 (t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8));
1010 }
1011 } else
1012 bus_space_write_1(iot, ioh, com_lcr, lcr);
1013
1014 /* When not using CRTSCTS, RTS follows DTR. */
1015 if (!ISSET(t->c_cflag, CRTSCTS)) {
1016 if (ISSET(sc->sc_mcr, MCR_DTR)) {
1017 if (!ISSET(sc->sc_mcr, MCR_RTS)) {
1018 SET(sc->sc_mcr, MCR_RTS);
1019 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
1020 }
1021 } else {
1022 if (ISSET(sc->sc_mcr, MCR_RTS)) {
1023 CLR(sc->sc_mcr, MCR_RTS);
1024 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
1025 }
1026 }
1027 sc->sc_dtr = MCR_DTR | MCR_RTS;
1028 } else
1029 sc->sc_dtr = MCR_DTR;
1030
1031 /* and copy to tty */
1032 tp->t_ispeed = t->c_ispeed;
1033 tp->t_ospeed = t->c_ospeed;
1034 oldcflag = tp->t_cflag;
1035 tp->t_cflag = t->c_cflag;
1036
1037 /*
1038 * If DCD is off and MDMBUF is changed, ask the tty layer if we should
1039 * stop the device.
1040 */
1041 if (!ISSET(sc->sc_msr, MSR_DCD) &&
1042 !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) &&
1043 ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) &&
1044 (*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
1045 CLR(sc->sc_mcr, sc->sc_dtr);
1046 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
1047 }
1048
1049 /* Just to be sure... */
1050 comstart(tp);
1051 return 0;
1052 }
1053
1054 void
comstart(tp)1055 comstart(tp)
1056 struct tty *tp;
1057 {
1058 struct com_softc *sc = com_cd.cd_devs[DEVUNIT(tp->t_dev)];
1059 bus_space_tag_t iot = sc->sc_iot;
1060 bus_space_handle_t ioh = sc->sc_ioh;
1061 int s;
1062
1063 s = spltty();
1064 if (ISSET(tp->t_state, TS_BUSY))
1065 goto out;
1066 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP) || sc->sc_halt > 0)
1067 goto stopped;
1068 if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS))
1069 goto stopped;
1070 if (tp->t_outq.c_cc <= tp->t_lowat) {
1071 if (ISSET(tp->t_state, TS_ASLEEP)) {
1072 CLR(tp->t_state, TS_ASLEEP);
1073 wakeup(&tp->t_outq);
1074 }
1075 if (tp->t_outq.c_cc == 0)
1076 goto stopped;
1077 selwakeup(&tp->t_wsel);
1078 }
1079 SET(tp->t_state, TS_BUSY);
1080
1081 /* Enable transmit completion interrupts. */
1082 if (!ISSET(sc->sc_ier, IER_ETXRDY)) {
1083 SET(sc->sc_ier, IER_ETXRDY);
1084 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
1085 }
1086
1087 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
1088 u_char buffer[64]; /* XXX: largest fifo */
1089
1090 int n = q_to_b(&tp->t_outq, buffer, sc->sc_fifolen);
1091 int i;
1092
1093 for (i = 0; i < n; i++) {
1094 bus_space_write_1(iot, ioh, com_data, buffer[i]);
1095 }
1096 } else
1097 bus_space_write_1(iot, ioh, com_data, getc(&tp->t_outq));
1098 out:
1099 splx(s);
1100 return;
1101 stopped:
1102 if (ISSET(sc->sc_ier, IER_ETXRDY)) {
1103 CLR(sc->sc_ier, IER_ETXRDY);
1104 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
1105 }
1106 splx(s);
1107 }
1108
1109 /*
1110 * Stop output on a line.
1111 */
1112 int
comstop(tp,flag)1113 comstop(tp, flag)
1114 struct tty *tp;
1115 int flag;
1116 {
1117 int s;
1118
1119 s = spltty();
1120 if (ISSET(tp->t_state, TS_BUSY))
1121 if (!ISSET(tp->t_state, TS_TTSTOP))
1122 SET(tp->t_state, TS_FLUSH);
1123 splx(s);
1124 return 0;
1125 }
1126
1127 void
comdiag(arg)1128 comdiag(arg)
1129 void *arg;
1130 {
1131 struct com_softc *sc = arg;
1132 int overflows, floods;
1133 int s;
1134
1135 s = spltty();
1136 sc->sc_errors = 0;
1137 overflows = sc->sc_overflows;
1138 sc->sc_overflows = 0;
1139 floods = sc->sc_floods;
1140 sc->sc_floods = 0;
1141 splx(s);
1142 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf overflow%s\n",
1143 sc->sc_dev.dv_xname,
1144 overflows, overflows == 1 ? "" : "s",
1145 floods, floods == 1 ? "" : "s");
1146 }
1147
1148 void
comsoft(arg)1149 comsoft(arg)
1150 void *arg;
1151 {
1152 struct com_softc *sc = (struct com_softc *)arg;
1153 struct tty *tp;
1154 register u_char *ibufp;
1155 u_char *ibufend;
1156 register int c;
1157 int s;
1158 static int lsrmap[8] = {
1159 0, TTY_PE,
1160 TTY_FE, TTY_PE|TTY_FE,
1161 TTY_FE, TTY_PE|TTY_FE,
1162 TTY_FE, TTY_PE|TTY_FE
1163 };
1164
1165 if (sc == NULL || sc->sc_ibufp == sc->sc_ibuf)
1166 goto out;
1167
1168 tp = sc->sc_tty;
1169
1170 s = spltty();
1171
1172 ibufp = sc->sc_ibuf;
1173 ibufend = sc->sc_ibufp;
1174
1175 if (ibufp == ibufend) {
1176 splx(s);
1177 goto out;
1178 }
1179
1180 sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ?
1181 sc->sc_ibufs[1] : sc->sc_ibufs[0];
1182 sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
1183 sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
1184
1185 if (tp == NULL || !ISSET(tp->t_state, TS_ISOPEN)) {
1186 splx(s);
1187 goto out;
1188 }
1189
1190 if (ISSET(tp->t_cflag, CRTSCTS) &&
1191 !ISSET(sc->sc_mcr, MCR_RTS)) {
1192 /* XXX */
1193 SET(sc->sc_mcr, MCR_RTS);
1194 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr,
1195 sc->sc_mcr);
1196 }
1197
1198 splx(s);
1199
1200 while (ibufp < ibufend) {
1201 c = *ibufp++;
1202 if (ISSET(*ibufp, LSR_OE)) {
1203 sc->sc_overflows++;
1204 if (sc->sc_errors++ == 0)
1205 timeout_add(&sc->sc_diag_tmo, 60 * hz);
1206 }
1207 /* This is ugly, but fast. */
1208 c |= lsrmap[(*ibufp++ & (LSR_BI|LSR_FE|LSR_PE)) >> 2];
1209 (*linesw[tp->t_line].l_rint)(c, tp);
1210 }
1211
1212 out:
1213 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
1214 timeout_add(&sc->sc_comsoft_tmo, 1);
1215 #else
1216 ;
1217 #endif
1218 }
1219
1220 #ifdef KGDB
1221
1222 /*
1223 * If a line break is set, or data matches one of the characters
1224 * gdb uses to signal a connection, then start up kgdb. Just gobble
1225 * any other data. Done in a stand alone function because comintr
1226 * does tty stuff and we don't have one.
1227 */
1228
1229 int
kgdbintr(arg)1230 kgdbintr(arg)
1231 void *arg;
1232 {
1233 struct com_softc *sc = arg;
1234 bus_space_tag_t iot = sc->sc_iot;
1235 bus_space_handle_t ioh = sc->sc_ioh;
1236 u_char lsr, data, msr, delta;
1237
1238 if (!ISSET(sc->sc_hwflags, COM_HW_KGDB))
1239 return(0);
1240
1241 for (;;) {
1242 lsr = bus_space_read_1(iot, ioh, com_lsr);
1243 if (ISSET(lsr, LSR_RXRDY)) {
1244 do {
1245 data = bus_space_read_1(iot, ioh, com_data);
1246 if (data == 3 || data == '$' || data == '+' ||
1247 ISSET(lsr, LSR_BI)) {
1248 kgdb_connect(1);
1249 data = 0;
1250 }
1251 lsr = bus_space_read_1(iot, ioh, com_lsr);
1252 } while (ISSET(lsr, LSR_RXRDY));
1253
1254 }
1255 if (ISSET(lsr, LSR_BI|LSR_FE|LSR_PE|LSR_OE))
1256 printf("weird lsr %02x\n", lsr);
1257
1258 msr = bus_space_read_1(iot, ioh, com_msr);
1259
1260 if (msr != sc->sc_msr) {
1261 delta = msr ^ sc->sc_msr;
1262 sc->sc_msr = msr;
1263 if (ISSET(delta, MSR_DCD)) {
1264 if (!ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) {
1265 CLR(sc->sc_mcr, sc->sc_dtr);
1266 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
1267 }
1268 }
1269 }
1270 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_NOPEND))
1271 return (1);
1272 }
1273 }
1274 #endif /* KGDB */
1275
1276 int
comintr(arg)1277 comintr(arg)
1278 void *arg;
1279 {
1280 struct com_softc *sc = arg;
1281 bus_space_tag_t iot = sc->sc_iot;
1282 bus_space_handle_t ioh = sc->sc_ioh;
1283 struct tty *tp;
1284 u_char lsr, data, msr, delta;
1285
1286 if (!sc->sc_tty)
1287 return (0); /* can't do squat. */
1288
1289 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_NOPEND))
1290 return (0);
1291
1292 tp = sc->sc_tty;
1293
1294 for (;;) {
1295 lsr = bus_space_read_1(iot, ioh, com_lsr);
1296
1297 if (ISSET(lsr, LSR_RXRDY)) {
1298 register u_char *p = sc->sc_ibufp;
1299
1300 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1301 softintr_schedule(sc->sc_si);
1302 #endif
1303 do {
1304 data = bus_space_read_1(iot, ioh, com_data);
1305 if (ISSET(lsr, LSR_BI)) {
1306 #ifdef DDB
1307 if (ISSET(sc->sc_hwflags,
1308 COM_HW_CONSOLE)) {
1309 if (db_console)
1310 Debugger();
1311 goto next;
1312 }
1313 #endif
1314 data = 0;
1315 }
1316 if (p >= sc->sc_ibufend) {
1317 sc->sc_floods++;
1318 if (sc->sc_errors++ == 0)
1319 timeout_add(&sc->sc_diag_tmo, 60 * hz);
1320 } else {
1321 *p++ = data;
1322 *p++ = lsr;
1323 if (p == sc->sc_ibufhigh &&
1324 ISSET(tp->t_cflag, CRTSCTS)) {
1325 /* XXX */
1326 CLR(sc->sc_mcr, MCR_RTS);
1327 bus_space_write_1(iot, ioh, com_mcr,
1328 sc->sc_mcr);
1329 }
1330 }
1331 #ifdef DDB
1332 next:
1333 #endif
1334 lsr = bus_space_read_1(iot, ioh, com_lsr);
1335 } while (ISSET(lsr, LSR_RXRDY));
1336
1337 sc->sc_ibufp = p;
1338 }
1339 msr = bus_space_read_1(iot, ioh, com_msr);
1340
1341 if (msr != sc->sc_msr) {
1342 delta = msr ^ sc->sc_msr;
1343 sc->sc_msr = msr;
1344 if (ISSET(delta, MSR_DCD)) {
1345 if (!ISSET(sc->sc_swflags, COM_SW_SOFTCAR) &&
1346 (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) {
1347 CLR(sc->sc_mcr, sc->sc_dtr);
1348 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
1349 }
1350 }
1351 if (ISSET(delta & msr, MSR_CTS) &&
1352 ISSET(tp->t_cflag, CRTSCTS)) {
1353 /* the line is up and we want to do rts/cts flow control */
1354 (*linesw[tp->t_line].l_start)(tp);
1355 }
1356 }
1357
1358 if (ISSET(lsr, LSR_TXRDY) && ISSET(tp->t_state, TS_BUSY)) {
1359 CLR(tp->t_state, TS_BUSY | TS_FLUSH);
1360 if (sc->sc_halt > 0)
1361 wakeup(&tp->t_outq);
1362 (*linesw[tp->t_line].l_start)(tp);
1363 }
1364
1365 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_NOPEND))
1366 return (1);
1367 }
1368 }
1369
1370 /*
1371 * Following are all routines needed for COM to act as console
1372 */
1373
1374 #if defined(arc)
1375 #undef CONADDR
1376 extern int CONADDR;
1377 #endif
1378
1379 /*
1380 * The following functions are polled getc and putc routines, shared
1381 * by the console and kgdb glue.
1382 */
1383
1384 int
com_common_getc(iot,ioh)1385 com_common_getc(iot, ioh)
1386 bus_space_tag_t iot;
1387 bus_space_handle_t ioh;
1388 {
1389 int s = splhigh();
1390 u_char stat, c;
1391
1392 /* block until a character becomes available */
1393 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
1394 continue;
1395
1396 c = bus_space_read_1(iot, ioh, com_data);
1397 /* clear any interrupts generated by this transmission */
1398 stat = bus_space_read_1(iot, ioh, com_iir);
1399 splx(s);
1400 return (c);
1401 }
1402
1403 void
com_common_putc(iot,ioh,c)1404 com_common_putc(iot, ioh, c)
1405 bus_space_tag_t iot;
1406 bus_space_handle_t ioh;
1407 int c;
1408 {
1409 int s = spltty();
1410 int timo;
1411
1412 /* wait for any pending transmission to finish */
1413 timo = 2000;
1414 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo)
1415 delay(1);
1416
1417 bus_space_write_1(iot, ioh, com_data, c);
1418 bus_space_barrier(iot, ioh, 0, COM_NPORTS,
1419 (BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE));
1420
1421 /* wait for this transmission to complete */
1422 timo = 2000;
1423 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo)
1424 delay(1);
1425
1426 splx(s);
1427 }
1428
1429 /*
1430 * Following are all routines needed for COM to act as console
1431 */
1432 void
cominit(iot,ioh,rate)1433 cominit(iot, ioh, rate)
1434 bus_space_tag_t iot;
1435 bus_space_handle_t ioh;
1436 int rate;
1437 {
1438 int s = splhigh();
1439 u_char stat;
1440
1441 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB);
1442 rate = comspeed(COM_FREQ, rate); /* XXX not comdefaultrate? */
1443 bus_space_write_1(iot, ioh, com_dlbl, rate);
1444 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8);
1445 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS);
1446 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS);
1447 bus_space_write_1(iot, ioh, com_ier, 0); /* Make sure they are off */
1448 bus_space_write_1(iot, ioh, com_fifo,
1449 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
1450 stat = bus_space_read_1(iot, ioh, com_iir);
1451 splx(s);
1452 }
1453
1454 void
comcnprobe(cp)1455 comcnprobe(cp)
1456 struct consdev *cp;
1457 {
1458 /* XXX NEEDS TO BE FIXED XXX */
1459 #if defined(arc)
1460 bus_space_tag_t iot = &arc_bus_io;
1461 #elif defined(hppa)
1462 bus_space_tag_t iot = &hppa_bustag;
1463 #else
1464 bus_space_tag_t iot = 0;
1465 #endif
1466 bus_space_handle_t ioh;
1467 int found;
1468
1469 if(CONADDR == 0) {
1470 cp->cn_pri = CN_DEAD;
1471 return;
1472 }
1473
1474 comconsiot = iot;
1475 if (bus_space_map(iot, CONADDR, COM_NPORTS, 0, &ioh)) {
1476 cp->cn_pri = CN_DEAD;
1477 return;
1478 }
1479 #ifdef __hppa__
1480 found = 1;
1481 #else
1482 found = comprobe1(iot, ioh);
1483 #endif
1484 bus_space_unmap(iot, ioh, COM_NPORTS);
1485 if (!found) {
1486 cp->cn_pri = CN_DEAD;
1487 return;
1488 }
1489
1490 /* locate the major number */
1491 for (commajor = 0; commajor < nchrdev; commajor++)
1492 if (cdevsw[commajor].d_open == comopen)
1493 break;
1494
1495 /* initialize required fields */
1496 cp->cn_dev = makedev(commajor, CONUNIT);
1497 cp->cn_pri = CN_REMOTE;
1498 }
1499
1500 void
comcninit(cp)1501 comcninit(cp)
1502 struct consdev *cp;
1503 {
1504 comconsaddr = CONADDR;
1505
1506 if (bus_space_map(comconsiot, comconsaddr, COM_NPORTS, 0, &comconsioh))
1507 panic("comcninit: mapping failed");
1508
1509 cominit(comconsiot, comconsioh, comdefaultrate);
1510 comconsinit = 0;
1511 }
1512
1513
1514 int
comcnattach(iot,iobase,rate,frequency,cflag)1515 comcnattach(iot, iobase, rate, frequency, cflag)
1516 bus_space_tag_t iot;
1517 int iobase;
1518 int rate, frequency;
1519 tcflag_t cflag;
1520 {
1521 static struct consdev comcons = {
1522 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL,
1523 NODEV, CN_NORMAL
1524 };
1525
1526 #ifndef __sparc64__
1527 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &comconsioh))
1528 return ENOMEM;
1529 #endif
1530
1531 cominit(iot, comconsioh, rate);
1532
1533 cn_tab = &comcons;
1534
1535 comconsiot = iot;
1536 comconsaddr = iobase;
1537 comconscflag = cflag;
1538
1539 return (0);
1540 }
1541
1542 int
comcngetc(dev)1543 comcngetc(dev)
1544 dev_t dev;
1545 {
1546 return (com_common_getc(comconsiot, comconsioh));
1547 }
1548
1549 /*
1550 * Console kernel output character routine.
1551 */
1552 void
comcnputc(dev,c)1553 comcnputc(dev, c)
1554 dev_t dev;
1555 int c;
1556 {
1557 com_common_putc(comconsiot, comconsioh, c);
1558 }
1559
1560 void
comcnpollc(dev,on)1561 comcnpollc(dev, on)
1562 dev_t dev;
1563 int on;
1564 {
1565
1566 }
1567
1568 #ifdef KGDB
1569 int
com_kgdb_attach(iot,iobase,rate,frequency,cflag)1570 com_kgdb_attach(iot, iobase, rate, frequency, cflag)
1571 bus_space_tag_t iot;
1572 int iobase;
1573 int rate, frequency;
1574 tcflag_t cflag;
1575 {
1576 if (iot == comconsiot && iobase == comconsaddr) {
1577 return (EBUSY); /* cannot share with console */
1578 }
1579
1580 com_kgdb_iot = iot;
1581 com_kgdb_addr = iobase;
1582
1583 if (bus_space_map(com_kgdb_iot, com_kgdb_addr, COM_NPORTS, 0,
1584 &com_kgdb_ioh))
1585 panic("com_kgdb_attach: mapping failed");
1586
1587 /* XXX We currently don't respect KGDBMODE? */
1588 cominit(com_kgdb_iot, com_kgdb_ioh, rate);
1589
1590 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL);
1591 kgdb_dev = 123; /* unneeded, only to satisfy some tests */
1592
1593 return (0);
1594 }
1595
1596 /* ARGSUSED */
1597 int
com_kgdb_getc(arg)1598 com_kgdb_getc(arg)
1599 void *arg;
1600 {
1601
1602 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh));
1603 }
1604
1605 /* ARGSUSED */
1606 void
com_kgdb_putc(arg,c)1607 com_kgdb_putc(arg, c)
1608 void *arg;
1609 int c;
1610 {
1611
1612 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c));
1613 }
1614 #endif /* KGDB */
1615