1 /* $MirOS: src/sys/dev/ic/aacreg.h,v 1.2 2013/10/31 20:06:52 tg Exp $ */ 2 /* $OpenBSD: aacreg.h,v 1.5 2003/11/16 20:30:06 avsm Exp $ */ 3 4 /*- 5 * Copyright © 2013 6 * Thorsten “mirabilos” Glaser <tg@mirbsd.org> 7 * Copyright (c) 2000 Michael Smith 8 * Copyright (c) 2000 Scott Long 9 * Copyright (c) 2000 BSDi 10 * Copyright (c) 2000 Niklas Hallqvist 11 * All rights reserved. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * $FreeBSD: /c/ncvs/src/sys/dev/aac/aacreg.h,v 1.1 2000/09/13 03:20:34 msmith Exp $ 35 */ 36 37 /* 38 * Data structures defining the interface between the driver and the Adaptec 39 * 'FSA' adapters. Note that many field names and comments here are taken 40 * verbatim from the Adaptec driver source in order to make comparing the 41 * two slightly easier. 42 */ 43 44 /* 45 * Misc. magic numbers. 46 */ 47 #define AAC_MAX_CONTAINERS 64 48 #define AAC_BLOCK_SIZE 512 49 50 /* 51 * Communications interface. 52 * 53 * Where datastructure layouts are closely parallel to the Adaptec sample code, 54 * retain their naming conventions (for now) to aid in cross-referencing. 55 */ 56 57 /* 58 * We establish 4 command queues and matching response queues. Queues must 59 * be 16-byte aligned, and are sized as follows: 60 */ 61 #define AAC_HOST_NORM_CMD_ENTRIES 8 /* cmd adapter->host, normal pri */ 62 #define AAC_HOST_HIGH_CMD_ENTRIES 4 /* cmd adapter->host, high pri */ 63 #define AAC_ADAP_NORM_CMD_ENTRIES 512 /* cmd host->adapter, normal pri */ 64 #define AAC_ADAP_HIGH_CMD_ENTRIES 4 /* cmd host->adapter, high pri */ 65 #define AAC_HOST_NORM_RESP_ENTRIES 512 /* resp, adapter->host, normal pri */ 66 #define AAC_HOST_HIGH_RESP_ENTRIES 4 /* resp, adapter->host, high pri */ 67 #define AAC_ADAP_NORM_RESP_ENTRIES 8 /* resp, host->adapter, normal pri */ 68 #define AAC_ADAP_HIGH_RESP_ENTRIES 4 /* resp, host->adapter, high pri */ 69 70 #define AAC_TOTALQ_LENGTH \ 71 (AAC_HOST_HIGH_CMD_ENTRIES + AAC_HOST_NORM_CMD_ENTRIES + \ 72 AAC_ADAP_HIGH_CMD_ENTRIES + AAC_ADAP_NORM_CMD_ENTRIES + \ 73 AAC_HOST_HIGH_RESP_ENTRIES + AAC_HOST_NORM_RESP_ENTRIES + \ 74 AAC_ADAP_HIGH_RESP_ENTRIES + AAC_ADAP_NORM_RESP_ENTRIES) 75 76 #define AAC_QUEUE_COUNT 8 77 #define AAC_QUEUE_ALIGN 16 78 79 struct aac_queue_entry { 80 u_int32_t aq_fib_size; /* FIB size in bytes */ 81 u_int32_t aq_fib_addr; /* receiver-space address of the FIB */ 82 } __attribute__((__packed__)); 83 84 #define AAC_PRODUCER_INDEX 0 85 #define AAC_CONSUMER_INDEX 1 86 87 /* 88 * Table of queue indices and queues used to communicate with the 89 * controller. This structure must be aligned to AAC_QUEUE_ALIGN 90 */ 91 struct aac_queue_table { 92 /* queue consumer/producer indexes (layout mandated by adapter) */ 93 u_int32_t qt_qindex[AAC_QUEUE_COUNT][2]; 94 95 /* queue entry structures (layout mandated by adapter) */ 96 struct aac_queue_entry qt_HostNormCmdQueue[AAC_HOST_NORM_CMD_ENTRIES]; 97 struct aac_queue_entry qt_HostHighCmdQueue[AAC_HOST_HIGH_CMD_ENTRIES]; 98 struct aac_queue_entry qt_AdapNormCmdQueue[AAC_ADAP_NORM_CMD_ENTRIES]; 99 struct aac_queue_entry qt_AdapHighCmdQueue[AAC_ADAP_HIGH_CMD_ENTRIES]; 100 struct aac_queue_entry 101 qt_HostNormRespQueue[AAC_HOST_NORM_RESP_ENTRIES]; 102 struct aac_queue_entry 103 qt_HostHighRespQueue[AAC_HOST_HIGH_RESP_ENTRIES]; 104 struct aac_queue_entry 105 qt_AdapNormRespQueue[AAC_ADAP_NORM_RESP_ENTRIES]; 106 struct aac_queue_entry 107 qt_AdapHighRespQueue[AAC_ADAP_HIGH_RESP_ENTRIES]; 108 } __attribute__((__packed__)); 109 110 /* 111 * Adapter Init Structure: this is passed to the adapter with the 112 * AAC_MONKER_INITSTRUCT command to point it at our control structures. 113 */ 114 struct aac_adapter_init { 115 u_int32_t InitStructRevision; 116 #define AAC_INIT_STRUCT_REVISION 3 117 u_int32_t MiniPortRevision; 118 u_int32_t FilesystemRevision; 119 u_int32_t CommHeaderAddress; 120 u_int32_t FastIoCommAreaAddress; 121 u_int32_t AdapterFibsPhysicalAddress; 122 void *AdapterFibsVirtualAddress; 123 u_int32_t AdapterFibsSize; 124 u_int32_t AdapterFibAlign; 125 u_int32_t PrintfBufferAddress; 126 u_int32_t PrintfBufferSize; 127 u_int32_t HostPhysMemPages; 128 u_int32_t HostElapsedSeconds; 129 } __packed; 130 131 /* 132 * Shared data types 133 */ 134 135 /* 136 * Container types 137 */ 138 typedef enum { 139 CT_NONE = 0, 140 CT_VOLUME, 141 CT_MIRROR, 142 CT_STRIPE, 143 CT_RAID5, 144 CT_SSRW, 145 CT_SSRO, 146 CT_MORPH, 147 CT_PASSTHRU, 148 CT_RAID4, 149 CT_RAID10, /* stripe of mirror */ 150 CT_RAID00, /* stripe of stripe */ 151 CT_VOLUME_OF_MIRRORS, /* volume of mirror */ 152 CT_PSEUDO_RAID3 /* really raid4 */ 153 } AAC_FSAVolType; 154 155 /* 156 * Host-addressable object types 157 */ 158 typedef enum { 159 FT_REG = 1, /* regular file */ 160 FT_DIR, /* directory */ 161 FT_BLK, /* "block" device - reserved */ 162 FT_CHR, /* "character special" device - reserved */ 163 FT_LNK, /* symbolic link */ 164 FT_SOCK, /* socket */ 165 FT_FIFO, /* fifo */ 166 FT_FILESYS, /* ADAPTEC's "FSA"(tm) filesystem */ 167 FT_DRIVE, /* phys disk - addressable in scsi by bus/target/lun */ 168 FT_SLICE, /* virtual disk - raw volume - slice */ 169 FT_PARTITION, /* FSA part, inside slice, container building block */ 170 FT_VOLUME, /* Container - Volume Set */ 171 FT_STRIPE, /* Container - Stripe Set */ 172 FT_MIRROR, /* Container - Mirror Set */ 173 FT_RAID5, /* Container - Raid 5 Set */ 174 FT_DATABASE /* Storage object with "foreign" content manager */ 175 } AAC_FType; 176 177 /* 178 * Host-side scatter/gather list for 32-bit commands. 179 */ 180 struct aac_sg_entry { 181 u_int32_t SgAddress; 182 u_int32_t SgByteCount; 183 } __attribute__((__packed__)); 184 185 struct aac_sg_table { 186 u_int32_t SgCount; 187 struct aac_sg_entry SgEntry[0]; 188 } __attribute__((__packed__)); 189 190 /* 191 * Host-side scatter/gather list for 64-bit commands. 192 */ 193 struct aac_sg_table64 { 194 u_int8_t SgCount; 195 u_int8_t SgSectorsPerPage; 196 u_int16_t SgByteOffset; 197 u_int64_t SgEntry[0]; 198 } __attribute__((__packed__)); 199 200 /* 201 * Container creation data 202 */ 203 struct aac_container_creation { 204 u_int8_t ViaBuildNumber; 205 u_int8_t MicroSecond; 206 u_int8_t Via; /* 1 = FSU, 2 = API, etc. */ 207 u_int8_t YearsSince1900; 208 u_int32_t Month:4; /* 1-12 */ 209 u_int32_t Day:6; /* 1-32 */ 210 u_int32_t Hour:6; /* 0-23 */ 211 u_int32_t Minute:6; /* 0-59 */ 212 u_int32_t Second:6; /* 0-59 */ 213 u_int64_t ViaAdapterSerialNumber; 214 } __attribute__((__packed__)); 215 216 struct FsaRevision { 217 union { 218 struct { 219 u_int8_t dash; 220 u_int8_t type; 221 u_int8_t minor; 222 u_int8_t major; 223 } comp; 224 u_int32_t ul; 225 } external; 226 u_int32_t buildNumber; 227 } __packed; 228 229 /* 230 * Adapter Information 231 */ 232 233 typedef enum { 234 CPU_NTSIM = 1, 235 CPU_I960, 236 CPU_ARM, 237 CPU_SPARC, 238 CPU_POWERPC, 239 CPU_ALPHA, 240 CPU_P7, 241 CPU_I960_RX, 242 CPU__last 243 } AAC_CpuType; 244 245 typedef enum { 246 CPUI960_JX = 1, 247 CPUI960_CX, 248 CPUI960_HX, 249 CPUI960_RX, 250 CPUARM_SA110, 251 CPUARM_xxx, 252 CPUPPC_603e, 253 CPUPPC_xxx, 254 CPUSUBTYPE__last 255 } AAC_CpuSubType; 256 257 typedef enum { 258 PLAT_NTSIM = 1, 259 PLAT_V3ADU, 260 PLAT_CYCLONE, 261 PLAT_CYCLONE_HD, 262 PLAT_BATBOARD, 263 PLAT_BATBOARD_HD, 264 PLAT_YOLO, 265 PLAT_COBRA, 266 PLAT_ANAHEIM, 267 PLAT_JALAPENO, 268 PLAT_QUEENS, 269 PLAT_JALAPENO_DELL, 270 PLAT_POBLANO, 271 PLAT_POBLANO_OPAL, 272 PLAT_POBLANO_SL0, 273 PLAT_POBLANO_SL1, 274 PLAT_POBLANO_SL2, 275 PLAT_POBLANO_XXX, 276 PLAT_JALAPENO_P2, 277 PLAT_HABANERO, 278 PLAT__last 279 } AAC_Platform; 280 281 typedef enum { 282 OEM_FLAVOR_ADAPTEC = 1, 283 OEM_FLAVOR_DELL, 284 OEM_FLAVOR_HP, 285 OEM_FLAVOR_IBM, 286 OEM_FLAVOR_CPQ, 287 OEM_FLAVOR_BRAND_X, 288 OEM_FLAVOR_BRAND_Y, 289 OEM_FLAVOR_BRAND_Z, 290 OEM_FLAVOR__last 291 } AAC_OemFlavor; 292 293 /* 294 * XXX the aac-2622 with no battery present reports PLATFORM_BAT_OPT_PRESENT 295 */ 296 typedef enum { 297 PLATFORM_BAT_REQ_PRESENT = 1, /* BATTERY REQUIRED AND PRESENT */ 298 PLATFORM_BAT_REQ_NOTPRESENT, /* BATTERY REQUIRED AND NOT PRESENT */ 299 PLATFORM_BAT_OPT_PRESENT, /* BATTERY OPTIONAL AND PRESENT */ 300 PLATFORM_BAT_OPT_NOTPRESENT, /* BATTERY OPTIONAL AND NOT PRESENT */ 301 PLATFORM_BAT_NOT_SUPPORTED /* BATTERY NOT SUPPORTED */ 302 } AAC_BatteryPlatform; 303 304 /* 305 * Structure used to respond to a RequestAdapterInfo fib. 306 */ 307 struct aac_adapter_info { 308 AAC_Platform PlatformBase; /* adapter type */ 309 AAC_CpuType CpuArchitecture; /* adapter CPU type */ 310 AAC_CpuSubType CpuVariant; /* adapter CPU subtype */ 311 u_int32_t ClockSpeed; /* adapter CPU clockspeed */ 312 u_int32_t ExecutionMem; /* adapter Execution Memory size */ 313 u_int32_t BufferMem; /* adapter Data Memory */ 314 u_int32_t TotalMem; /* adapter Total Memory */ 315 struct FsaRevision KernelRevision; /* adapter Kernel SW Revision */ 316 struct FsaRevision MonitorRevision; /* adapter Monitor/Diag SW Rev */ 317 struct FsaRevision HardwareRevision; /* TDB */ 318 struct FsaRevision BIOSRevision; /* adapter BIOS Revision */ 319 u_int32_t ClusteringEnabled; 320 u_int32_t ClusterChannelMask; 321 u_int64_t SerialNumber; 322 AAC_BatteryPlatform batteryPlatform; 323 u_int32_t SupportedOptions; /* supported features of this ctrlr */ 324 AAC_OemFlavor OemVariant; 325 } __packed; 326 327 /* 328 * Monitor/Kernel interface. 329 */ 330 331 /* 332 * Synchronous commands to the monitor/kernel. 333 */ 334 #define AAC_MONKER_INITSTRUCT 0x05 335 #define AAC_MONKER_SYNCFIB 0x0c 336 337 /* 338 * Command status values 339 */ 340 typedef enum { 341 ST_OK = 0, 342 ST_PERM = 1, 343 ST_NOENT = 2, 344 ST_IO = 5, 345 ST_NXIO = 6, 346 ST_E2BIG = 7, 347 ST_ACCES = 13, 348 ST_EXIST = 17, 349 ST_XDEV = 18, 350 ST_NODEV = 19, 351 ST_NOTDIR = 20, 352 ST_ISDIR = 21, 353 ST_INVAL = 22, 354 ST_FBIG = 27, 355 ST_NOSPC = 28, 356 ST_ROFS = 30, 357 ST_MLINK = 31, 358 ST_WOULDBLOCK = 35, 359 ST_NAMETOOLONG = 63, 360 ST_NOTEMPTY = 66, 361 ST_DQUOT = 69, 362 ST_STALE = 70, 363 ST_REMOTE = 71, 364 ST_BADHANDLE = 10001, 365 ST_NOT_SYNC = 10002, 366 ST_BAD_COOKIE = 10003, 367 ST_NOTSUPP = 10004, 368 ST_TOOSMALL = 10005, 369 ST_SERVERFAULT = 10006, 370 ST_BADTYPE = 10007, 371 ST_JUKEBOX = 10008, 372 ST_NOTMOUNTED = 10009, 373 ST_MAINTMODE = 10010, 374 ST_STALEACL = 10011 375 } AAC_FSAStatus; 376 377 /* 378 * Volume manager commands 379 */ 380 typedef enum _VM_COMMANDS { 381 VM_Null = 0, 382 VM_NameServe, 383 VM_ContainerConfig, 384 VM_Ioctl, 385 VM_FilesystemIoctl, 386 VM_CloseAll, 387 VM_CtBlockRead, 388 VM_CtBlockWrite, 389 VM_SliceBlockRead, /* raw access to configured "storage objects" */ 390 VM_SliceBlockWrite, 391 VM_DriveBlockRead, /* raw access to physical devices */ 392 VM_DriveBlockWrite, 393 VM_EnclosureMgt, /* enclosure management */ 394 VM_Unused, /* used to be diskset management */ 395 VM_CtBlockVerify, 396 VM_CtPerf, /* performance test */ 397 VM_CtBlockRead64, 398 VM_CtBlockWrite64, 399 VM_CtBlockVerify64, 400 } AAC_VMCommand; 401 402 /* 403 * "Mountable object" 404 */ 405 struct aac_mntobj { 406 u_int32_t ObjectId; 407 char FileSystemName[16]; 408 struct aac_container_creation CreateInfo; 409 u_int32_t Capacity; 410 AAC_FSAVolType VolType; 411 AAC_FType ObjType; 412 u_int32_t ContentState; 413 #define AAC_FSCS_READONLY 0x0002 /* XXX need more information than this */ 414 union { 415 u_int32_t pad[8]; 416 } ObjExtension; 417 u_int32_t AlterEgoId; 418 } __attribute__((__packed__)); 419 420 struct aac_mntinfo { 421 AAC_VMCommand Command; 422 AAC_FType MntType; 423 u_int32_t MntCount; 424 } __attribute__((__packed__)); 425 426 struct aac_mntinforesponse { 427 AAC_FSAStatus Status; 428 AAC_FType MntType; 429 u_int32_t MntRespCount; 430 struct aac_mntobj MntTable[1]; 431 } __attribute__((__packed__)); 432 433 /* 434 * Write 'stability' options. 435 */ 436 typedef enum { 437 CSTABLE = 1, 438 CUNSTABLE 439 } AAC_CacheLevel; 440 441 /* 442 * Commit level response for a write request. 443 */ 444 typedef enum { 445 CMFILE_SYNC_NVRAM = 1, 446 CMDATA_SYNC_NVRAM, 447 CMFILE_SYNC, 448 CMDATA_SYNC, 449 CMUNSTABLE 450 } AAC_CommitLevel; 451 452 /* 453 * Block read/write operations. 454 * These structures are packed into the 'data' area in the FIB. 455 */ 456 457 struct aac_blockread { 458 AAC_VMCommand Command; /* not FSACommand! */ 459 u_int32_t ContainerId; 460 u_int32_t BlockNumber; 461 u_int32_t ByteCount; 462 struct aac_sg_table SgMap; /* variable size */ 463 } __attribute__((__packed__)); 464 465 struct aac_blockread_response { 466 AAC_FSAStatus Status; 467 u_int32_t ByteCount; 468 } __attribute__((__packed__)); 469 470 struct aac_blockwrite { 471 AAC_VMCommand Command; /* not FSACommand! */ 472 u_int32_t ContainerId; 473 u_int32_t BlockNumber; 474 u_int32_t ByteCount; 475 AAC_CacheLevel Stable; 476 struct aac_sg_table SgMap; /* variable size */ 477 } __attribute__((__packed__)); 478 479 struct aac_blockwrite_response { 480 AAC_FSAStatus Status; 481 u_int32_t ByteCount; 482 AAC_CommitLevel Committed; 483 } __attribute__((__packed__)); 484 485 /* 486 * Register definitions for the Adaptec AAC-364 'Jalapeno I/II' adapters, based 487 * on the SA110 'StrongArm'. 488 */ 489 490 #define AAC_REGSIZE 0x100 491 492 /* doorbell 0 (adapter->host) */ 493 #define AAC_SA_DOORBELL0_CLEAR 0x98 494 #define AAC_SA_DOORBELL0_SET 0x9c 495 #define AAC_SA_DOORBELL0 0x9c 496 #define AAC_SA_MASK0_CLEAR 0xa0 497 #define AAC_SA_MASK0_SET 0xa4 498 499 /* doorbell 1 (host->adapter) */ 500 #define AAC_SA_DOORBELL1_CLEAR 0x9a 501 #define AAC_SA_DOORBELL1_SET 0x9e 502 #define AAC_SA_MASK1_CLEAR 0xa2 503 #define AAC_SA_MASK1_SET 0xa6 504 505 /* mailbox (20 bytes) */ 506 #define AAC_SA_MAILBOX 0xa8 507 #define AAC_SA_FWSTATUS 0xc4 508 509 /* 510 * Register definitions for the Adaptec 'Pablano' adapters, based on the 511 * i960Rx, and other related adapters. 512 */ 513 514 #define AAC_RX_IDBR 0x20 /* inbound doorbell */ 515 #define AAC_RX_IISR 0x24 /* inbound interrupt status */ 516 #define AAC_RX_IIMR 0x28 /* inbound interrupt mask */ 517 #define AAC_RX_ODBR 0x2c /* outbound doorbell */ 518 #define AAC_RX_OISR 0x30 /* outbound interrupt status */ 519 #define AAC_RX_OIMR 0x34 /* outbound interrupt mask */ 520 521 #define AAC_RX_MAILBOX 0x50 /* mailbox (20 bytes) */ 522 #define AAC_RX_FWSTATUS 0x6c 523 524 /* 525 * Common bit definitions for the doorbell registers. 526 */ 527 528 /* 529 * Status bits in the doorbell registers. 530 */ 531 #define AAC_DB_SYNC_COMMAND (1<<0) /* send/completed synchronous FIB */ 532 #define AAC_DB_COMMAND_READY (1<<1) /* posted one or more commands */ 533 #define AAC_DB_RESPONSE_READY (1<<2) /* one or more commands complete */ 534 #define AAC_DB_COMMAND_NOT_FULL (1<<3) /* command queue not full */ 535 #define AAC_DB_RESPONSE_NOT_FULL (1<<4) /* response queue not full */ 536 537 /* 538 * The adapter can request the host print a message by setting the 539 * DB_PRINTF flag in DOORBELL0. The driver responds by collecting the 540 * message from the printf buffer, clearing the DB_PRINTF flag in 541 * DOORBELL0 and setting it in DOORBELL1. 542 * (ODBR and IDBR respectively for the i960Rx adapters) 543 */ 544 #define AAC_DB_PRINTF (1<<5) 545 546 /* 547 * Mask containing the interrupt bits we care about. We don't anticipate 548 * (or want) interrupts not in this mask. 549 */ 550 #define AAC_DB_INTERRUPTS \ 551 (AAC_DB_COMMAND_READY | AAC_DB_RESPONSE_READY | AAC_DB_PRINTF) 552 553 /* 554 * Queue names 555 * 556 * Note that we base these at 0 in order to use them as array indices. Adaptec 557 * used base 1 for some unknown reason, and sorted them in a different order. 558 */ 559 #define AAC_HOST_NORM_CMD_QUEUE 0 560 #define AAC_HOST_HIGH_CMD_QUEUE 1 561 #define AAC_ADAP_NORM_CMD_QUEUE 2 562 #define AAC_ADAP_HIGH_CMD_QUEUE 3 563 #define AAC_HOST_NORM_RESP_QUEUE 4 564 #define AAC_HOST_HIGH_RESP_QUEUE 5 565 #define AAC_ADAP_NORM_RESP_QUEUE 6 566 #define AAC_ADAP_HIGH_RESP_QUEUE 7 567 568 /* 569 * List structure used to chain FIBs (used by the adapter - we hang FIBs off 570 * our private command structure and don't touch these) 571 */ 572 struct aac_fib_list_entry { 573 struct fib_list_entry *Flink; 574 struct fib_list_entry *Blink; 575 } __packed; 576 577 /* 578 * FIB (FSA Interface Block?); this is the datastructure passed between the 579 * host and adapter. 580 */ 581 struct aac_fib_header { 582 u_int32_t XferState; 583 u_int16_t Command; 584 u_int8_t StructType; 585 u_int8_t Flags; 586 u_int16_t Size; 587 u_int16_t SenderSize; 588 u_int32_t SenderFibAddress; 589 u_int32_t ReceiverFibAddress; 590 u_int32_t SenderData; 591 union { 592 struct { 593 u_int32_t ReceiverTimeStart; 594 u_int32_t ReceiverTimeDone; 595 } _s; 596 struct aac_fib_list_entry FibLinks; 597 } _u; 598 } __packed; 599 600 #define AAC_FIB_DATASIZE (512 - sizeof(struct aac_fib_header)) 601 602 struct aac_fib { 603 struct aac_fib_header Header; 604 u_int8_t data[AAC_FIB_DATASIZE]; 605 } __packed; 606 607 /* 608 * FIB commands 609 */ 610 typedef enum { 611 TestCommandResponse = 1, 612 TestAdapterCommand = 2, 613 614 /* lowlevel and comm commands */ 615 LastTestCommand = 100, 616 ReinitHostNormCommandQueue = 101, 617 ReinitHostHighCommandQueue = 102, 618 ReinitHostHighRespQueue = 103, 619 ReinitHostNormRespQueue = 104, 620 ReinitAdapNormCommandQueue = 105, 621 ReinitAdapHighCommandQueue = 107, 622 ReinitAdapHighRespQueue = 108, 623 ReinitAdapNormRespQueue = 109, 624 InterfaceShutdown = 110, 625 DmaCommandFib = 120, 626 StartProfile = 121, 627 TermProfile = 122, 628 SpeedTest = 123, 629 TakeABreakPt = 124, 630 RequestPerfData = 125, 631 SetInterruptDefTimer= 126, 632 SetInterruptDefCount= 127, 633 GetInterruptDefStatus= 128, 634 LastCommCommand = 129, 635 636 /* filesystem commands */ 637 NuFileSystem = 300, 638 UFS = 301, 639 HostFileSystem = 302, 640 LastFileSystemCommand = 303, 641 642 /* Container Commands */ 643 ContainerCommand = 500, 644 ContainerCommand64 = 501, 645 646 /* Cluster Commands */ 647 ClusterCommand = 550, 648 649 /* Scsi Port commands (scsi passthrough) */ 650 ScsiPortCommand = 600, 651 652 /* misc house keeping and generic adapter initiated commands */ 653 AifRequest = 700, 654 CheckRevision = 701, 655 FsaHostShutdown = 702, 656 RequestAdapterInfo = 703, 657 IsAdapterPaused = 704, 658 SendHostTime = 705, 659 LastMiscCommand = 706 660 } AAC_FibCommands; 661 662 /* 663 * FIB types 664 */ 665 #define AAC_FIBTYPE_TFIB 1 666 #define AAC_FIBTYPE_TQE 2 667 #define AAC_FIBTYPE_TCTPERF 3 668 669 /* 670 * FIB transfer state 671 */ 672 #define AAC_FIBSTATE_HOSTOWNED (1<<0) /* owned by the host */ 673 #define AAC_FIBSTATE_ADAPTEROWNED (1<<1) /* owned by the adapter */ 674 #define AAC_FIBSTATE_INITIALISED (1<<2) /* initialised */ 675 #define AAC_FIBSTATE_EMPTY (1<<3) /* empty */ 676 #define AAC_FIBSTATE_FROMPOOL (1<<4) /* allocated from pool */ 677 #define AAC_FIBSTATE_FROMHOST (1<<5) /* sent from the host */ 678 #define AAC_FIBSTATE_FROMADAP (1<<6) /* sent from the adapter */ 679 #define AAC_FIBSTATE_REXPECTED (1<<7) /* response is expected */ 680 #define AAC_FIBSTATE_RNOTEXPECTED (1<<8) /* response is not expected */ 681 #define AAC_FIBSTATE_DONEADAP (1<<9) /* processed by the adapter */ 682 #define AAC_FIBSTATE_DONEHOST (1<<10) /* processed by the host */ 683 #define AAC_FIBSTATE_HIGH (1<<11) /* high priority */ 684 #define AAC_FIBSTATE_NORM (1<<12) /* normal priority */ 685 #define AAC_FIBSTATE_ASYNC (1<<13) 686 #define AAC_FIBSTATE_ASYNCIO (1<<13) /* to be removed */ 687 #define AAC_FIBSTATE_PAGEFILEIO (1<<14) /* to be removed */ 688 #define AAC_FIBSTATE_SHUTDOWN (1<<15) 689 #define AAC_FIBSTATE_LAZYWRITE (1<<16) /* to be removed */ 690 #define AAC_FIBSTATE_ADAPMICROFIB (1<<17) 691 #define AAC_FIBSTATE_BIOSFIB (1<<18) 692 #define AAC_FIBSTATE_FAST_RESPONSE (1<<19) /* fast response capable */ 693 #define AAC_FIBSTATE_APIFIB (1<<20) 694 695 /* 696 * FIB error values 697 */ 698 #define AAC_ERROR_NORMAL 0x00 699 #define AAC_ERROR_PENDING 0x01 700 #define AAC_ERROR_FATAL 0x02 701 #define AAC_ERROR_INVALID_QUEUE 0x03 702 #define AAC_ERROR_NOENTRIES 0x04 703 #define AAC_ERROR_SENDFAILED 0x05 704 #define AAC_ERROR_INVALID_QUEUE_PRIORITY 0x06 705 #define AAC_ERROR_FIB_ALLOCATION_FAILED 0x07 706 #define AAC_ERROR_FIB_DEALLOCATION_FAILED 0x08 707 708 /* 709 * Adapter Status Register 710 * 711 * Phase Staus mailbox is 32bits: 712 * <31:16> = Phase Status 713 * <15:0> = Phase 714 * 715 * The adapter reports its present state through the phase. Only 716 * a single phase should be ever be set. Each phase can have multiple 717 * phase status bits to provide more detailed information about the 718 * state of the adapter. 719 */ 720 #define AAC_SELF_TEST_FAILED 0x00000004 721 #define AAC_UP_AND_RUNNING 0x00000080 722 #define AAC_KERNEL_PANIC 0x00000100 723