1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20
21 /* The main tables describing the instructions is essentially a copy
22 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
23 Programmers Manual. Usually, there is a capital letter, followed
24 by a small letter. The capital letter tell the addressing mode,
25 and the small letter tells about the operand size. Refer to
26 the Intel manual for details. */
27
28 #include "dis-asm.h"
29 #include "sysdep.h"
30 #include "opintl.h"
31
32 #define MAXLEN 20
33
34 #include <setjmp.h>
35
36 #ifndef UNIXWARE_COMPAT
37 /* Set non-zero for broken, compatible instructions. Set to zero for
38 non-broken opcodes. */
39 #define UNIXWARE_COMPAT 1
40 #endif
41
42 static int fetch_data (struct disassemble_info *, bfd_byte *);
43 static void ckprefix (void);
44 static const char *prefix_name (int, int);
45 static int print_insn (bfd_vma, disassemble_info *);
46 static void dofloat (int);
47 static void OP_ST (int, int);
48 static void OP_STi (int, int);
49 static int putop (const char *, int);
50 static void oappend (const char *);
51 static void append_seg (void);
52 static void OP_indirE (int, int);
53 static void print_operand_value (char *, int, bfd_vma);
54 static void OP_E (int, int);
55 static void OP_G (int, int);
56 static bfd_vma get64 (void);
57 static bfd_signed_vma get32 (void);
58 static bfd_signed_vma get32s (void);
59 static int get16 (void);
60 static void set_op (bfd_vma, int);
61 static void OP_REG (int, int);
62 static void OP_IMREG (int, int);
63 static void OP_I (int, int);
64 static void OP_I64 (int, int);
65 static void OP_sI (int, int);
66 static void OP_J (int, int);
67 static void OP_SEG (int, int);
68 static void OP_DIR (int, int);
69 static void OP_OFF (int, int);
70 static void OP_OFF64 (int, int);
71 static void ptr_reg (int, int);
72 static void OP_ESreg (int, int);
73 static void OP_DSreg (int, int);
74 static void OP_C (int, int);
75 static void OP_D (int, int);
76 static void OP_T (int, int);
77 static void OP_Rd (int, int);
78 static void OP_MMX (int, int);
79 static void OP_XMM (int, int);
80 static void OP_EM (int, int);
81 static void OP_EX (int, int);
82 static void OP_MS (int, int);
83 static void OP_XS (int, int);
84 static void OP_M (int, int);
85 static void OP_0fae (int, int);
86 static void OP_0f07 (int, int);
87 static void NOP_Fixup (int, int);
88 static void OP_3DNowSuffix (int, int);
89 static void OP_SIMD_Suffix (int, int);
90 static void SIMD_Fixup (int, int);
91 static void PNI_Fixup (int, int);
92 static void SVME_Fixup (int, int);
93 static void INVLPG_Fixup (int, int);
94 static void BadOp (void);
95 static void SEG_Fixup (int, int);
96
97 struct dis_private {
98 /* Points to first byte not fetched. */
99 bfd_byte *max_fetched;
100 bfd_byte the_buffer[MAXLEN];
101 bfd_vma insn_start;
102 int orig_sizeflag;
103 jmp_buf bailout;
104 };
105
106 /* The opcode for the fwait instruction, which we treat as a prefix
107 when we can. */
108 #define FWAIT_OPCODE (0x9b)
109
110 /* Set to 1 for 64bit mode disassembly. */
111 static int mode_64bit;
112
113 /* Flags for the prefixes for the current instruction. See below. */
114 static int prefixes;
115
116 /* REX prefix the current instruction. See below. */
117 static int rex;
118 /* Bits of REX we've already used. */
119 static int rex_used;
120 #define REX_MODE64 8
121 #define REX_EXTX 4
122 #define REX_EXTY 2
123 #define REX_EXTZ 1
124 /* Mark parts used in the REX prefix. When we are testing for
125 empty prefix (for 8bit register REX extension), just mask it
126 out. Otherwise test for REX bit is excuse for existence of REX
127 only in case value is nonzero. */
128 #define USED_REX(value) \
129 { \
130 if (value) \
131 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
132 else \
133 rex_used |= 0x40; \
134 }
135
136 /* Flags for prefixes which we somehow handled when printing the
137 current instruction. */
138 static int used_prefixes;
139
140 /* Flags stored in PREFIXES. */
141 #define PREFIX_REPZ 1
142 #define PREFIX_REPNZ 2
143 #define PREFIX_LOCK 4
144 #define PREFIX_CS 8
145 #define PREFIX_SS 0x10
146 #define PREFIX_DS 0x20
147 #define PREFIX_ES 0x40
148 #define PREFIX_FS 0x80
149 #define PREFIX_GS 0x100
150 #define PREFIX_DATA 0x200
151 #define PREFIX_ADDR 0x400
152 #define PREFIX_FWAIT 0x800
153
154 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
155 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
156 on error. */
157 #define FETCH_DATA(info, addr) \
158 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
159 ? 1 : fetch_data ((info), (addr)))
160
161 static int
fetch_data(struct disassemble_info * info,bfd_byte * addr)162 fetch_data (struct disassemble_info *info, bfd_byte *addr)
163 {
164 int status;
165 struct dis_private *priv = (struct dis_private *) info->private_data;
166 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
167
168 status = (*info->read_memory_func) (start,
169 priv->max_fetched,
170 addr - priv->max_fetched,
171 info);
172 if (status != 0)
173 {
174 /* If we did manage to read at least one byte, then
175 print_insn_i386 will do something sensible. Otherwise, print
176 an error. We do that here because this is where we know
177 STATUS. */
178 if (priv->max_fetched == priv->the_buffer)
179 (*info->memory_error_func) (status, start, info);
180 longjmp (priv->bailout, 1);
181 }
182 else
183 priv->max_fetched = addr;
184 return 1;
185 }
186
187 #define XX NULL, 0
188
189 #define Eb OP_E, b_mode
190 #define Ev OP_E, v_mode
191 #define Ed OP_E, d_mode
192 #define Eq OP_E, q_mode
193 #define Edq OP_E, dq_mode
194 #define Edqw OP_E, dqw_mode
195 #define indirEv OP_indirE, branch_v_mode
196 #define indirEp OP_indirE, f_mode
197 #define Ew OP_E, w_mode
198 #define Ma OP_E, v_mode
199 #define M OP_M, 0 /* lea, lgdt, etc. */
200 #define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
201 #define Gb OP_G, b_mode
202 #define Gv OP_G, v_mode
203 #define Gd OP_G, d_mode
204 #define Gdq OP_G, dq_mode
205 #define Gw OP_G, w_mode
206 #define Rd OP_Rd, d_mode
207 #define Rm OP_Rd, m_mode
208 #define Ib OP_I, b_mode
209 #define sIb OP_sI, b_mode /* sign extened byte */
210 #define Iv OP_I, v_mode
211 #define Iq OP_I, q_mode
212 #define Iv64 OP_I64, v_mode
213 #define Iw OP_I, w_mode
214 #define I1 OP_I, const_1_mode
215 #define Jb OP_J, b_mode
216 #define Jv OP_J, v_mode
217 #define Cm OP_C, m_mode
218 #define Dm OP_D, m_mode
219 #define Td OP_T, d_mode
220 #define Sv SEG_Fixup, v_mode
221
222 #define RMeAX OP_REG, eAX_reg
223 #define RMeBX OP_REG, eBX_reg
224 #define RMeCX OP_REG, eCX_reg
225 #define RMeDX OP_REG, eDX_reg
226 #define RMeSP OP_REG, eSP_reg
227 #define RMeBP OP_REG, eBP_reg
228 #define RMeSI OP_REG, eSI_reg
229 #define RMeDI OP_REG, eDI_reg
230 #define RMrAX OP_REG, rAX_reg
231 #define RMrBX OP_REG, rBX_reg
232 #define RMrCX OP_REG, rCX_reg
233 #define RMrDX OP_REG, rDX_reg
234 #define RMrSP OP_REG, rSP_reg
235 #define RMrBP OP_REG, rBP_reg
236 #define RMrSI OP_REG, rSI_reg
237 #define RMrDI OP_REG, rDI_reg
238 #define RMAL OP_REG, al_reg
239 #define RMAL OP_REG, al_reg
240 #define RMCL OP_REG, cl_reg
241 #define RMDL OP_REG, dl_reg
242 #define RMBL OP_REG, bl_reg
243 #define RMAH OP_REG, ah_reg
244 #define RMCH OP_REG, ch_reg
245 #define RMDH OP_REG, dh_reg
246 #define RMBH OP_REG, bh_reg
247 #define RMAX OP_REG, ax_reg
248 #define RMDX OP_REG, dx_reg
249
250 #define eAX OP_IMREG, eAX_reg
251 #define eBX OP_IMREG, eBX_reg
252 #define eCX OP_IMREG, eCX_reg
253 #define eDX OP_IMREG, eDX_reg
254 #define eSP OP_IMREG, eSP_reg
255 #define eBP OP_IMREG, eBP_reg
256 #define eSI OP_IMREG, eSI_reg
257 #define eDI OP_IMREG, eDI_reg
258 #define AL OP_IMREG, al_reg
259 #define AL OP_IMREG, al_reg
260 #define CL OP_IMREG, cl_reg
261 #define DL OP_IMREG, dl_reg
262 #define BL OP_IMREG, bl_reg
263 #define AH OP_IMREG, ah_reg
264 #define CH OP_IMREG, ch_reg
265 #define DH OP_IMREG, dh_reg
266 #define BH OP_IMREG, bh_reg
267 #define AX OP_IMREG, ax_reg
268 #define DX OP_IMREG, dx_reg
269 #define indirDX OP_IMREG, indir_dx_reg
270
271 #define Sw OP_SEG, w_mode
272 #define Ap OP_DIR, 0
273 #define Ob OP_OFF, b_mode
274 #define Ob64 OP_OFF64, b_mode
275 #define Ov OP_OFF, v_mode
276 #define Ov64 OP_OFF64, v_mode
277 #define Xb OP_DSreg, eSI_reg
278 #define Xv OP_DSreg, eSI_reg
279 #define Yb OP_ESreg, eDI_reg
280 #define Yv OP_ESreg, eDI_reg
281 #define DSBX OP_DSreg, eBX_reg
282
283 #define es OP_REG, es_reg
284 #define ss OP_REG, ss_reg
285 #define cs OP_REG, cs_reg
286 #define ds OP_REG, ds_reg
287 #define fs OP_REG, fs_reg
288 #define gs OP_REG, gs_reg
289
290 #define MX OP_MMX, 0
291 #define XM OP_XMM, 0
292 #define EM OP_EM, v_mode
293 #define EX OP_EX, v_mode
294 #define MS OP_MS, v_mode
295 #define XS OP_XS, v_mode
296 #define OPSUF OP_3DNowSuffix, 0
297 #define OPSIMD OP_SIMD_Suffix, 0
298
299 #define cond_jump_flag NULL, cond_jump_mode
300 #define loop_jcxz_flag NULL, loop_jcxz_mode
301
302 /* bits in sizeflag */
303 #define SUFFIX_ALWAYS 4
304 #define AFLAG 2
305 #define DFLAG 1
306
307 #define b_mode 1 /* byte operand */
308 #define v_mode 2 /* operand size depends on prefixes */
309 #define w_mode 3 /* word operand */
310 #define d_mode 4 /* double word operand */
311 #define q_mode 5 /* quad word operand */
312 #define t_mode 6 /* ten-byte operand */
313 #define x_mode 7 /* 16-byte XMM operand */
314 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
315 #define cond_jump_mode 9
316 #define loop_jcxz_mode 10
317 #define dq_mode 11 /* operand size depends on REX prefixes. */
318 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
319 #define f_mode 13 /* 4- or 6-byte pointer operand */
320 #define const_1_mode 14
321 #define branch_v_mode 15 /* v_mode for branch. */
322
323 #define es_reg 100
324 #define cs_reg 101
325 #define ss_reg 102
326 #define ds_reg 103
327 #define fs_reg 104
328 #define gs_reg 105
329
330 #define eAX_reg 108
331 #define eCX_reg 109
332 #define eDX_reg 110
333 #define eBX_reg 111
334 #define eSP_reg 112
335 #define eBP_reg 113
336 #define eSI_reg 114
337 #define eDI_reg 115
338
339 #define al_reg 116
340 #define cl_reg 117
341 #define dl_reg 118
342 #define bl_reg 119
343 #define ah_reg 120
344 #define ch_reg 121
345 #define dh_reg 122
346 #define bh_reg 123
347
348 #define ax_reg 124
349 #define cx_reg 125
350 #define dx_reg 126
351 #define bx_reg 127
352 #define sp_reg 128
353 #define bp_reg 129
354 #define si_reg 130
355 #define di_reg 131
356
357 #define rAX_reg 132
358 #define rCX_reg 133
359 #define rDX_reg 134
360 #define rBX_reg 135
361 #define rSP_reg 136
362 #define rBP_reg 137
363 #define rSI_reg 138
364 #define rDI_reg 139
365
366 #define indir_dx_reg 150
367
368 #define FLOATCODE 1
369 #define USE_GROUPS 2
370 #define USE_PREFIX_USER_TABLE 3
371 #define X86_64_SPECIAL 4
372
373 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
374
375 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
376 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
377 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
378 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
379 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
380 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
381 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
382 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
383 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
384 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
385 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
386 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
387 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
388 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
389 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
390 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
391 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
392 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
393 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
394 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
395 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
396 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
397 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
398 #define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
399 #define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0
400
401 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
402 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
403 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
404 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
405 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
406 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
407 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
408 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
409 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
410 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
411 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
412 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
413 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
414 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
415 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
416 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
417 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
418 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
419 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
420 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
421 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
422 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
423 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
424 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
425 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
426 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
427 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
428 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
429 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
430 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
431 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
432 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
433 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
434
435 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
436
437 typedef void (*op_rtn) (int bytemode, int sizeflag);
438
439 struct dis386 {
440 const char *name;
441 op_rtn op1;
442 int bytemode1;
443 op_rtn op2;
444 int bytemode2;
445 op_rtn op3;
446 int bytemode3;
447 };
448
449 /* Upper case letters in the instruction names here are macros.
450 'A' => print 'b' if no register operands or suffix_always is true
451 'B' => print 'b' if suffix_always is true
452 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
453 . size prefix
454 'E' => print 'e' if 32-bit form of jcxz
455 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
456 'H' => print ",pt" or ",pn" branch hint
457 'I' => honor following macro letter even in Intel mode (implemented only
458 . for some of the macro letters)
459 'J' => print 'l'
460 'L' => print 'l' if suffix_always is true
461 'N' => print 'n' if instruction has no wait "prefix"
462 'O' => print 'd', or 'o'
463 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
464 . or suffix_always is true. print 'q' if rex prefix is present.
465 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
466 . is true
467 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
468 'S' => print 'w', 'l' or 'q' if suffix_always is true
469 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
470 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
471 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
472 'X' => print 's', 'd' depending on data16 prefix (for XMM)
473 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
474
475 Many of the above letters print nothing in Intel mode. See "putop"
476 for the details.
477
478 Braces '{' and '}', and vertical bars '|', indicate alternative
479 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
480 modes. In cases where there are only two alternatives, the X86_64
481 instruction is reserved, and "(bad)" is printed.
482 */
483
484 static const struct dis386 dis386[] = {
485 /* 00 */
486 { "addB", Eb, Gb, XX },
487 { "addS", Ev, Gv, XX },
488 { "addB", Gb, Eb, XX },
489 { "addS", Gv, Ev, XX },
490 { "addB", AL, Ib, XX },
491 { "addS", eAX, Iv, XX },
492 { "push{T|}", es, XX, XX },
493 { "pop{T|}", es, XX, XX },
494 /* 08 */
495 { "orB", Eb, Gb, XX },
496 { "orS", Ev, Gv, XX },
497 { "orB", Gb, Eb, XX },
498 { "orS", Gv, Ev, XX },
499 { "orB", AL, Ib, XX },
500 { "orS", eAX, Iv, XX },
501 { "push{T|}", cs, XX, XX },
502 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
503 /* 10 */
504 { "adcB", Eb, Gb, XX },
505 { "adcS", Ev, Gv, XX },
506 { "adcB", Gb, Eb, XX },
507 { "adcS", Gv, Ev, XX },
508 { "adcB", AL, Ib, XX },
509 { "adcS", eAX, Iv, XX },
510 { "push{T|}", ss, XX, XX },
511 { "popT|}", ss, XX, XX },
512 /* 18 */
513 { "sbbB", Eb, Gb, XX },
514 { "sbbS", Ev, Gv, XX },
515 { "sbbB", Gb, Eb, XX },
516 { "sbbS", Gv, Ev, XX },
517 { "sbbB", AL, Ib, XX },
518 { "sbbS", eAX, Iv, XX },
519 { "push{T|}", ds, XX, XX },
520 { "pop{T|}", ds, XX, XX },
521 /* 20 */
522 { "andB", Eb, Gb, XX },
523 { "andS", Ev, Gv, XX },
524 { "andB", Gb, Eb, XX },
525 { "andS", Gv, Ev, XX },
526 { "andB", AL, Ib, XX },
527 { "andS", eAX, Iv, XX },
528 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
529 { "daa{|}", XX, XX, XX },
530 /* 28 */
531 { "subB", Eb, Gb, XX },
532 { "subS", Ev, Gv, XX },
533 { "subB", Gb, Eb, XX },
534 { "subS", Gv, Ev, XX },
535 { "subB", AL, Ib, XX },
536 { "subS", eAX, Iv, XX },
537 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
538 { "das{|}", XX, XX, XX },
539 /* 30 */
540 { "xorB", Eb, Gb, XX },
541 { "xorS", Ev, Gv, XX },
542 { "xorB", Gb, Eb, XX },
543 { "xorS", Gv, Ev, XX },
544 { "xorB", AL, Ib, XX },
545 { "xorS", eAX, Iv, XX },
546 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
547 { "aaa{|}", XX, XX, XX },
548 /* 38 */
549 { "cmpB", Eb, Gb, XX },
550 { "cmpS", Ev, Gv, XX },
551 { "cmpB", Gb, Eb, XX },
552 { "cmpS", Gv, Ev, XX },
553 { "cmpB", AL, Ib, XX },
554 { "cmpS", eAX, Iv, XX },
555 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
556 { "aas{|}", XX, XX, XX },
557 /* 40 */
558 { "inc{S|}", RMeAX, XX, XX },
559 { "inc{S|}", RMeCX, XX, XX },
560 { "inc{S|}", RMeDX, XX, XX },
561 { "inc{S|}", RMeBX, XX, XX },
562 { "inc{S|}", RMeSP, XX, XX },
563 { "inc{S|}", RMeBP, XX, XX },
564 { "inc{S|}", RMeSI, XX, XX },
565 { "inc{S|}", RMeDI, XX, XX },
566 /* 48 */
567 { "dec{S|}", RMeAX, XX, XX },
568 { "dec{S|}", RMeCX, XX, XX },
569 { "dec{S|}", RMeDX, XX, XX },
570 { "dec{S|}", RMeBX, XX, XX },
571 { "dec{S|}", RMeSP, XX, XX },
572 { "dec{S|}", RMeBP, XX, XX },
573 { "dec{S|}", RMeSI, XX, XX },
574 { "dec{S|}", RMeDI, XX, XX },
575 /* 50 */
576 { "pushS", RMrAX, XX, XX },
577 { "pushS", RMrCX, XX, XX },
578 { "pushS", RMrDX, XX, XX },
579 { "pushS", RMrBX, XX, XX },
580 { "pushS", RMrSP, XX, XX },
581 { "pushS", RMrBP, XX, XX },
582 { "pushS", RMrSI, XX, XX },
583 { "pushS", RMrDI, XX, XX },
584 /* 58 */
585 { "popS", RMrAX, XX, XX },
586 { "popS", RMrCX, XX, XX },
587 { "popS", RMrDX, XX, XX },
588 { "popS", RMrBX, XX, XX },
589 { "popS", RMrSP, XX, XX },
590 { "popS", RMrBP, XX, XX },
591 { "popS", RMrSI, XX, XX },
592 { "popS", RMrDI, XX, XX },
593 /* 60 */
594 { "pusha{P|}", XX, XX, XX },
595 { "popa{P|}", XX, XX, XX },
596 { "bound{S|}", Gv, Ma, XX },
597 { X86_64_0 },
598 { "(bad)", XX, XX, XX }, /* seg fs */
599 { "(bad)", XX, XX, XX }, /* seg gs */
600 { "(bad)", XX, XX, XX }, /* op size prefix */
601 { "(bad)", XX, XX, XX }, /* adr size prefix */
602 /* 68 */
603 { "pushT", Iq, XX, XX },
604 { "imulS", Gv, Ev, Iv },
605 { "pushT", sIb, XX, XX },
606 { "imulS", Gv, Ev, sIb },
607 { "ins{b||b|}", Yb, indirDX, XX },
608 { "ins{R||R|}", Yv, indirDX, XX },
609 { "outs{b||b|}", indirDX, Xb, XX },
610 { "outs{R||R|}", indirDX, Xv, XX },
611 /* 70 */
612 { "joH", Jb, XX, cond_jump_flag },
613 { "jnoH", Jb, XX, cond_jump_flag },
614 { "jbH", Jb, XX, cond_jump_flag },
615 { "jaeH", Jb, XX, cond_jump_flag },
616 { "jeH", Jb, XX, cond_jump_flag },
617 { "jneH", Jb, XX, cond_jump_flag },
618 { "jbeH", Jb, XX, cond_jump_flag },
619 { "jaH", Jb, XX, cond_jump_flag },
620 /* 78 */
621 { "jsH", Jb, XX, cond_jump_flag },
622 { "jnsH", Jb, XX, cond_jump_flag },
623 { "jpH", Jb, XX, cond_jump_flag },
624 { "jnpH", Jb, XX, cond_jump_flag },
625 { "jlH", Jb, XX, cond_jump_flag },
626 { "jgeH", Jb, XX, cond_jump_flag },
627 { "jleH", Jb, XX, cond_jump_flag },
628 { "jgH", Jb, XX, cond_jump_flag },
629 /* 80 */
630 { GRP1b },
631 { GRP1S },
632 { "(bad)", XX, XX, XX },
633 { GRP1Ss },
634 { "testB", Eb, Gb, XX },
635 { "testS", Ev, Gv, XX },
636 { "xchgB", Eb, Gb, XX },
637 { "xchgS", Ev, Gv, XX },
638 /* 88 */
639 { "movB", Eb, Gb, XX },
640 { "movS", Ev, Gv, XX },
641 { "movB", Gb, Eb, XX },
642 { "movS", Gv, Ev, XX },
643 { "movQ", Sv, Sw, XX },
644 { "leaS", Gv, M, XX },
645 { "movQ", Sw, Sv, XX },
646 { "popU", Ev, XX, XX },
647 /* 90 */
648 { "nop", NOP_Fixup, 0, XX, XX },
649 { "xchgS", RMeCX, eAX, XX },
650 { "xchgS", RMeDX, eAX, XX },
651 { "xchgS", RMeBX, eAX, XX },
652 { "xchgS", RMeSP, eAX, XX },
653 { "xchgS", RMeBP, eAX, XX },
654 { "xchgS", RMeSI, eAX, XX },
655 { "xchgS", RMeDI, eAX, XX },
656 /* 98 */
657 { "cW{tR||tR|}", XX, XX, XX },
658 { "cR{tO||tO|}", XX, XX, XX },
659 { "Jcall{T|}", Ap, XX, XX },
660 { "(bad)", XX, XX, XX }, /* fwait */
661 { "pushfT", XX, XX, XX },
662 { "popfT", XX, XX, XX },
663 { "sahf{|}", XX, XX, XX },
664 { "lahf{|}", XX, XX, XX },
665 /* a0 */
666 { "movB", AL, Ob64, XX },
667 { "movS", eAX, Ov64, XX },
668 { "movB", Ob64, AL, XX },
669 { "movS", Ov64, eAX, XX },
670 { "movs{b||b|}", Yb, Xb, XX },
671 { "movs{R||R|}", Yv, Xv, XX },
672 { "cmps{b||b|}", Xb, Yb, XX },
673 { "cmps{R||R|}", Xv, Yv, XX },
674 /* a8 */
675 { "testB", AL, Ib, XX },
676 { "testS", eAX, Iv, XX },
677 { "stosB", Yb, AL, XX },
678 { "stosS", Yv, eAX, XX },
679 { "lodsB", AL, Xb, XX },
680 { "lodsS", eAX, Xv, XX },
681 { "scasB", AL, Yb, XX },
682 { "scasS", eAX, Yv, XX },
683 /* b0 */
684 { "movB", RMAL, Ib, XX },
685 { "movB", RMCL, Ib, XX },
686 { "movB", RMDL, Ib, XX },
687 { "movB", RMBL, Ib, XX },
688 { "movB", RMAH, Ib, XX },
689 { "movB", RMCH, Ib, XX },
690 { "movB", RMDH, Ib, XX },
691 { "movB", RMBH, Ib, XX },
692 /* b8 */
693 { "movS", RMeAX, Iv64, XX },
694 { "movS", RMeCX, Iv64, XX },
695 { "movS", RMeDX, Iv64, XX },
696 { "movS", RMeBX, Iv64, XX },
697 { "movS", RMeSP, Iv64, XX },
698 { "movS", RMeBP, Iv64, XX },
699 { "movS", RMeSI, Iv64, XX },
700 { "movS", RMeDI, Iv64, XX },
701 /* c0 */
702 { GRP2b },
703 { GRP2S },
704 { "retT", Iw, XX, XX },
705 { "retT", XX, XX, XX },
706 { "les{S|}", Gv, Mp, XX },
707 { "ldsS", Gv, Mp, XX },
708 { "movA", Eb, Ib, XX },
709 { "movQ", Ev, Iv, XX },
710 /* c8 */
711 { "enterT", Iw, Ib, XX },
712 { "leaveT", XX, XX, XX },
713 { "lretP", Iw, XX, XX },
714 { "lretP", XX, XX, XX },
715 { "int3", XX, XX, XX },
716 { "int", Ib, XX, XX },
717 { "into{|}", XX, XX, XX },
718 { "iretP", XX, XX, XX },
719 /* d0 */
720 { GRP2b_one },
721 { GRP2S_one },
722 { GRP2b_cl },
723 { GRP2S_cl },
724 { "aam{|}", sIb, XX, XX },
725 { "aad{|}", sIb, XX, XX },
726 { "(bad)", XX, XX, XX },
727 { "xlat", DSBX, XX, XX },
728 /* d8 */
729 { FLOAT },
730 { FLOAT },
731 { FLOAT },
732 { FLOAT },
733 { FLOAT },
734 { FLOAT },
735 { FLOAT },
736 { FLOAT },
737 /* e0 */
738 { "loopneFH", Jb, XX, loop_jcxz_flag },
739 { "loopeFH", Jb, XX, loop_jcxz_flag },
740 { "loopFH", Jb, XX, loop_jcxz_flag },
741 { "jEcxzH", Jb, XX, loop_jcxz_flag },
742 { "inB", AL, Ib, XX },
743 { "inS", eAX, Ib, XX },
744 { "outB", Ib, AL, XX },
745 { "outS", Ib, eAX, XX },
746 /* e8 */
747 { "callT", Jv, XX, XX },
748 { "jmpT", Jv, XX, XX },
749 { "Jjmp{T|}", Ap, XX, XX },
750 { "jmp", Jb, XX, XX },
751 { "inB", AL, indirDX, XX },
752 { "inS", eAX, indirDX, XX },
753 { "outB", indirDX, AL, XX },
754 { "outS", indirDX, eAX, XX },
755 /* f0 */
756 { "(bad)", XX, XX, XX }, /* lock prefix */
757 { "icebp", XX, XX, XX },
758 { "(bad)", XX, XX, XX }, /* repne */
759 { "(bad)", XX, XX, XX }, /* repz */
760 { "hlt", XX, XX, XX },
761 { "cmc", XX, XX, XX },
762 { GRP3b },
763 { GRP3S },
764 /* f8 */
765 { "clc", XX, XX, XX },
766 { "stc", XX, XX, XX },
767 { "cli", XX, XX, XX },
768 { "sti", XX, XX, XX },
769 { "cld", XX, XX, XX },
770 { "std", XX, XX, XX },
771 { GRP4 },
772 { GRP5 },
773 };
774
775 static const struct dis386 dis386_twobyte[] = {
776 /* 00 */
777 { GRP6 },
778 { GRP7 },
779 { "larS", Gv, Ew, XX },
780 { "lslS", Gv, Ew, XX },
781 { "(bad)", XX, XX, XX },
782 { "syscall", XX, XX, XX },
783 { "clts", XX, XX, XX },
784 { "sysretP", XX, XX, XX },
785 /* 08 */
786 { "invd", XX, XX, XX },
787 { "wbinvd", XX, XX, XX },
788 { "(bad)", XX, XX, XX },
789 { "ud2a", XX, XX, XX },
790 { "(bad)", XX, XX, XX },
791 { GRPAMD },
792 { "femms", XX, XX, XX },
793 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
794 /* 10 */
795 { PREGRP8 },
796 { PREGRP9 },
797 { PREGRP30 },
798 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
799 { "unpcklpX", XM, EX, XX },
800 { "unpckhpX", XM, EX, XX },
801 { PREGRP31 },
802 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
803 /* 18 */
804 { GRP14 },
805 { "(bad)", XX, XX, XX },
806 { "(bad)", XX, XX, XX },
807 { "(bad)", XX, XX, XX },
808 { "(bad)", XX, XX, XX },
809 { "(bad)", XX, XX, XX },
810 { "(bad)", XX, XX, XX },
811 { "(bad)", XX, XX, XX },
812 /* 20 */
813 { "movL", Rm, Cm, XX },
814 { "movL", Rm, Dm, XX },
815 { "movL", Cm, Rm, XX },
816 { "movL", Dm, Rm, XX },
817 { "movL", Rd, Td, XX },
818 { "(bad)", XX, XX, XX },
819 { "movL", Td, Rd, XX },
820 { "(bad)", XX, XX, XX },
821 /* 28 */
822 { "movapX", XM, EX, XX },
823 { "movapX", EX, XM, XX },
824 { PREGRP2 },
825 { "movntpX", Ev, XM, XX },
826 { PREGRP4 },
827 { PREGRP3 },
828 { "ucomisX", XM,EX, XX },
829 { "comisX", XM,EX, XX },
830 /* 30 */
831 { "wrmsr", XX, XX, XX },
832 { "rdtsc", XX, XX, XX },
833 { "rdmsr", XX, XX, XX },
834 { "rdpmc", XX, XX, XX },
835 { "sysenter", XX, XX, XX },
836 { "sysexit", XX, XX, XX },
837 { "(bad)", XX, XX, XX },
838 { "(bad)", XX, XX, XX },
839 /* 38 */
840 { "(bad)", XX, XX, XX },
841 { "(bad)", XX, XX, XX },
842 { "(bad)", XX, XX, XX },
843 { "(bad)", XX, XX, XX },
844 { "(bad)", XX, XX, XX },
845 { "(bad)", XX, XX, XX },
846 { "(bad)", XX, XX, XX },
847 { "(bad)", XX, XX, XX },
848 /* 40 */
849 { "cmovo", Gv, Ev, XX },
850 { "cmovno", Gv, Ev, XX },
851 { "cmovb", Gv, Ev, XX },
852 { "cmovae", Gv, Ev, XX },
853 { "cmove", Gv, Ev, XX },
854 { "cmovne", Gv, Ev, XX },
855 { "cmovbe", Gv, Ev, XX },
856 { "cmova", Gv, Ev, XX },
857 /* 48 */
858 { "cmovs", Gv, Ev, XX },
859 { "cmovns", Gv, Ev, XX },
860 { "cmovp", Gv, Ev, XX },
861 { "cmovnp", Gv, Ev, XX },
862 { "cmovl", Gv, Ev, XX },
863 { "cmovge", Gv, Ev, XX },
864 { "cmovle", Gv, Ev, XX },
865 { "cmovg", Gv, Ev, XX },
866 /* 50 */
867 { "movmskpX", Gdq, XS, XX },
868 { PREGRP13 },
869 { PREGRP12 },
870 { PREGRP11 },
871 { "andpX", XM, EX, XX },
872 { "andnpX", XM, EX, XX },
873 { "orpX", XM, EX, XX },
874 { "xorpX", XM, EX, XX },
875 /* 58 */
876 { PREGRP0 },
877 { PREGRP10 },
878 { PREGRP17 },
879 { PREGRP16 },
880 { PREGRP14 },
881 { PREGRP7 },
882 { PREGRP5 },
883 { PREGRP6 },
884 /* 60 */
885 { "punpcklbw", MX, EM, XX },
886 { "punpcklwd", MX, EM, XX },
887 { "punpckldq", MX, EM, XX },
888 { "packsswb", MX, EM, XX },
889 { "pcmpgtb", MX, EM, XX },
890 { "pcmpgtw", MX, EM, XX },
891 { "pcmpgtd", MX, EM, XX },
892 { "packuswb", MX, EM, XX },
893 /* 68 */
894 { "punpckhbw", MX, EM, XX },
895 { "punpckhwd", MX, EM, XX },
896 { "punpckhdq", MX, EM, XX },
897 { "packssdw", MX, EM, XX },
898 { PREGRP26 },
899 { PREGRP24 },
900 { "movd", MX, Edq, XX },
901 { PREGRP19 },
902 /* 70 */
903 { PREGRP22 },
904 { GRP10 },
905 { GRP11 },
906 { GRP12 },
907 { "pcmpeqb", MX, EM, XX },
908 { "pcmpeqw", MX, EM, XX },
909 { "pcmpeqd", MX, EM, XX },
910 { "emms", XX, XX, XX },
911 /* 78 */
912 { "(bad)", XX, XX, XX },
913 { "(bad)", XX, XX, XX },
914 { "(bad)", XX, XX, XX },
915 { "(bad)", XX, XX, XX },
916 { PREGRP28 },
917 { PREGRP29 },
918 { PREGRP23 },
919 { PREGRP20 },
920 /* 80 */
921 { "joH", Jv, XX, cond_jump_flag },
922 { "jnoH", Jv, XX, cond_jump_flag },
923 { "jbH", Jv, XX, cond_jump_flag },
924 { "jaeH", Jv, XX, cond_jump_flag },
925 { "jeH", Jv, XX, cond_jump_flag },
926 { "jneH", Jv, XX, cond_jump_flag },
927 { "jbeH", Jv, XX, cond_jump_flag },
928 { "jaH", Jv, XX, cond_jump_flag },
929 /* 88 */
930 { "jsH", Jv, XX, cond_jump_flag },
931 { "jnsH", Jv, XX, cond_jump_flag },
932 { "jpH", Jv, XX, cond_jump_flag },
933 { "jnpH", Jv, XX, cond_jump_flag },
934 { "jlH", Jv, XX, cond_jump_flag },
935 { "jgeH", Jv, XX, cond_jump_flag },
936 { "jleH", Jv, XX, cond_jump_flag },
937 { "jgH", Jv, XX, cond_jump_flag },
938 /* 90 */
939 { "seto", Eb, XX, XX },
940 { "setno", Eb, XX, XX },
941 { "setb", Eb, XX, XX },
942 { "setae", Eb, XX, XX },
943 { "sete", Eb, XX, XX },
944 { "setne", Eb, XX, XX },
945 { "setbe", Eb, XX, XX },
946 { "seta", Eb, XX, XX },
947 /* 98 */
948 { "sets", Eb, XX, XX },
949 { "setns", Eb, XX, XX },
950 { "setp", Eb, XX, XX },
951 { "setnp", Eb, XX, XX },
952 { "setl", Eb, XX, XX },
953 { "setge", Eb, XX, XX },
954 { "setle", Eb, XX, XX },
955 { "setg", Eb, XX, XX },
956 /* a0 */
957 { "pushT", fs, XX, XX },
958 { "popT", fs, XX, XX },
959 { "cpuid", XX, XX, XX },
960 { "btS", Ev, Gv, XX },
961 { "shldS", Ev, Gv, Ib },
962 { "shldS", Ev, Gv, CL },
963 { GRPPADLCK2 },
964 { GRPPADLCK1 },
965 /* a8 */
966 { "pushT", gs, XX, XX },
967 { "popT", gs, XX, XX },
968 { "rsm", XX, XX, XX },
969 { "btsS", Ev, Gv, XX },
970 { "shrdS", Ev, Gv, Ib },
971 { "shrdS", Ev, Gv, CL },
972 { GRP13 },
973 { "imulS", Gv, Ev, XX },
974 /* b0 */
975 { "cmpxchgB", Eb, Gb, XX },
976 { "cmpxchgS", Ev, Gv, XX },
977 { "lssS", Gv, Mp, XX },
978 { "btrS", Ev, Gv, XX },
979 { "lfsS", Gv, Mp, XX },
980 { "lgsS", Gv, Mp, XX },
981 { "movz{bR|x|bR|x}", Gv, Eb, XX },
982 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
983 /* b8 */
984 { "(bad)", XX, XX, XX },
985 { "ud2b", XX, XX, XX },
986 { GRP8 },
987 { "btcS", Ev, Gv, XX },
988 { "bsfS", Gv, Ev, XX },
989 { "bsrS", Gv, Ev, XX },
990 { "movs{bR|x|bR|x}", Gv, Eb, XX },
991 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
992 /* c0 */
993 { "xaddB", Eb, Gb, XX },
994 { "xaddS", Ev, Gv, XX },
995 { PREGRP1 },
996 { "movntiS", Ev, Gv, XX },
997 { "pinsrw", MX, Edqw, Ib },
998 { "pextrw", Gdq, MS, Ib },
999 { "shufpX", XM, EX, Ib },
1000 { GRP9 },
1001 /* c8 */
1002 { "bswap", RMeAX, XX, XX },
1003 { "bswap", RMeCX, XX, XX },
1004 { "bswap", RMeDX, XX, XX },
1005 { "bswap", RMeBX, XX, XX },
1006 { "bswap", RMeSP, XX, XX },
1007 { "bswap", RMeBP, XX, XX },
1008 { "bswap", RMeSI, XX, XX },
1009 { "bswap", RMeDI, XX, XX },
1010 /* d0 */
1011 { PREGRP27 },
1012 { "psrlw", MX, EM, XX },
1013 { "psrld", MX, EM, XX },
1014 { "psrlq", MX, EM, XX },
1015 { "paddq", MX, EM, XX },
1016 { "pmullw", MX, EM, XX },
1017 { PREGRP21 },
1018 { "pmovmskb", Gdq, MS, XX },
1019 /* d8 */
1020 { "psubusb", MX, EM, XX },
1021 { "psubusw", MX, EM, XX },
1022 { "pminub", MX, EM, XX },
1023 { "pand", MX, EM, XX },
1024 { "paddusb", MX, EM, XX },
1025 { "paddusw", MX, EM, XX },
1026 { "pmaxub", MX, EM, XX },
1027 { "pandn", MX, EM, XX },
1028 /* e0 */
1029 { "pavgb", MX, EM, XX },
1030 { "psraw", MX, EM, XX },
1031 { "psrad", MX, EM, XX },
1032 { "pavgw", MX, EM, XX },
1033 { "pmulhuw", MX, EM, XX },
1034 { "pmulhw", MX, EM, XX },
1035 { PREGRP15 },
1036 { PREGRP25 },
1037 /* e8 */
1038 { "psubsb", MX, EM, XX },
1039 { "psubsw", MX, EM, XX },
1040 { "pminsw", MX, EM, XX },
1041 { "por", MX, EM, XX },
1042 { "paddsb", MX, EM, XX },
1043 { "paddsw", MX, EM, XX },
1044 { "pmaxsw", MX, EM, XX },
1045 { "pxor", MX, EM, XX },
1046 /* f0 */
1047 { PREGRP32 },
1048 { "psllw", MX, EM, XX },
1049 { "pslld", MX, EM, XX },
1050 { "psllq", MX, EM, XX },
1051 { "pmuludq", MX, EM, XX },
1052 { "pmaddwd", MX, EM, XX },
1053 { "psadbw", MX, EM, XX },
1054 { PREGRP18 },
1055 /* f8 */
1056 { "psubb", MX, EM, XX },
1057 { "psubw", MX, EM, XX },
1058 { "psubd", MX, EM, XX },
1059 { "psubq", MX, EM, XX },
1060 { "paddb", MX, EM, XX },
1061 { "paddw", MX, EM, XX },
1062 { "paddd", MX, EM, XX },
1063 { "(bad)", XX, XX, XX }
1064 };
1065
1066 static const unsigned char onebyte_has_modrm[256] = {
1067 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1068 /* ------------------------------- */
1069 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1070 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1071 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1072 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1073 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1074 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1075 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1076 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1077 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1078 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1079 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1080 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1081 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1082 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1083 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1084 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1085 /* ------------------------------- */
1086 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1087 };
1088
1089 static const unsigned char twobyte_has_modrm[256] = {
1090 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1091 /* ------------------------------- */
1092 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1093 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1094 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1095 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1096 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1097 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1098 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1099 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */
1100 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1101 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1102 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1103 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1104 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1105 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1106 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1107 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1108 /* ------------------------------- */
1109 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1110 };
1111
1112 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1113 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1114 /* ------------------------------- */
1115 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1116 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1117 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1118 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1119 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1120 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1121 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1122 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1123 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1124 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1125 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1126 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1127 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1128 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1129 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1130 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1131 /* ------------------------------- */
1132 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1133 };
1134
1135 static char obuf[100];
1136 static char *obufp;
1137 static char scratchbuf[100];
1138 static unsigned char *start_codep;
1139 static unsigned char *insn_codep;
1140 static unsigned char *codep;
1141 static disassemble_info *the_info;
1142 static int mod;
1143 static int rm;
1144 static int reg;
1145 static unsigned char need_modrm;
1146
1147 /* If we are accessing mod/rm/reg without need_modrm set, then the
1148 values are stale. Hitting this abort likely indicates that you
1149 need to update onebyte_has_modrm or twobyte_has_modrm. */
1150 #define MODRM_CHECK if (!need_modrm) abort ()
1151
1152 static const char **names64;
1153 static const char **names32;
1154 static const char **names16;
1155 static const char **names8;
1156 static const char **names8rex;
1157 static const char **names_seg;
1158 static const char **index16;
1159
1160 static const char *intel_names64[] = {
1161 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1162 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1163 };
1164 static const char *intel_names32[] = {
1165 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1166 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1167 };
1168 static const char *intel_names16[] = {
1169 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1170 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1171 };
1172 static const char *intel_names8[] = {
1173 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1174 };
1175 static const char *intel_names8rex[] = {
1176 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1177 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1178 };
1179 static const char *intel_names_seg[] = {
1180 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1181 };
1182 static const char *intel_index16[] = {
1183 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1184 };
1185
1186 static const char *att_names64[] = {
1187 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1188 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1189 };
1190 static const char *att_names32[] = {
1191 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1192 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1193 };
1194 static const char *att_names16[] = {
1195 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1196 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1197 };
1198 static const char *att_names8[] = {
1199 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1200 };
1201 static const char *att_names8rex[] = {
1202 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1203 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1204 };
1205 static const char *att_names_seg[] = {
1206 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1207 };
1208 static const char *att_index16[] = {
1209 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1210 };
1211
1212 static const struct dis386 grps[][8] = {
1213 /* GRP1b */
1214 {
1215 { "addA", Eb, Ib, XX },
1216 { "orA", Eb, Ib, XX },
1217 { "adcA", Eb, Ib, XX },
1218 { "sbbA", Eb, Ib, XX },
1219 { "andA", Eb, Ib, XX },
1220 { "subA", Eb, Ib, XX },
1221 { "xorA", Eb, Ib, XX },
1222 { "cmpA", Eb, Ib, XX }
1223 },
1224 /* GRP1S */
1225 {
1226 { "addQ", Ev, Iv, XX },
1227 { "orQ", Ev, Iv, XX },
1228 { "adcQ", Ev, Iv, XX },
1229 { "sbbQ", Ev, Iv, XX },
1230 { "andQ", Ev, Iv, XX },
1231 { "subQ", Ev, Iv, XX },
1232 { "xorQ", Ev, Iv, XX },
1233 { "cmpQ", Ev, Iv, XX }
1234 },
1235 /* GRP1Ss */
1236 {
1237 { "addQ", Ev, sIb, XX },
1238 { "orQ", Ev, sIb, XX },
1239 { "adcQ", Ev, sIb, XX },
1240 { "sbbQ", Ev, sIb, XX },
1241 { "andQ", Ev, sIb, XX },
1242 { "subQ", Ev, sIb, XX },
1243 { "xorQ", Ev, sIb, XX },
1244 { "cmpQ", Ev, sIb, XX }
1245 },
1246 /* GRP2b */
1247 {
1248 { "rolA", Eb, Ib, XX },
1249 { "rorA", Eb, Ib, XX },
1250 { "rclA", Eb, Ib, XX },
1251 { "rcrA", Eb, Ib, XX },
1252 { "shlA", Eb, Ib, XX },
1253 { "shrA", Eb, Ib, XX },
1254 { "(bad)", XX, XX, XX },
1255 { "sarA", Eb, Ib, XX },
1256 },
1257 /* GRP2S */
1258 {
1259 { "rolQ", Ev, Ib, XX },
1260 { "rorQ", Ev, Ib, XX },
1261 { "rclQ", Ev, Ib, XX },
1262 { "rcrQ", Ev, Ib, XX },
1263 { "shlQ", Ev, Ib, XX },
1264 { "shrQ", Ev, Ib, XX },
1265 { "(bad)", XX, XX, XX },
1266 { "sarQ", Ev, Ib, XX },
1267 },
1268 /* GRP2b_one */
1269 {
1270 { "rolA", Eb, I1, XX },
1271 { "rorA", Eb, I1, XX },
1272 { "rclA", Eb, I1, XX },
1273 { "rcrA", Eb, I1, XX },
1274 { "shlA", Eb, I1, XX },
1275 { "shrA", Eb, I1, XX },
1276 { "(bad)", XX, XX, XX },
1277 { "sarA", Eb, I1, XX },
1278 },
1279 /* GRP2S_one */
1280 {
1281 { "rolQ", Ev, I1, XX },
1282 { "rorQ", Ev, I1, XX },
1283 { "rclQ", Ev, I1, XX },
1284 { "rcrQ", Ev, I1, XX },
1285 { "shlQ", Ev, I1, XX },
1286 { "shrQ", Ev, I1, XX },
1287 { "(bad)", XX, XX, XX},
1288 { "sarQ", Ev, I1, XX },
1289 },
1290 /* GRP2b_cl */
1291 {
1292 { "rolA", Eb, CL, XX },
1293 { "rorA", Eb, CL, XX },
1294 { "rclA", Eb, CL, XX },
1295 { "rcrA", Eb, CL, XX },
1296 { "shlA", Eb, CL, XX },
1297 { "shrA", Eb, CL, XX },
1298 { "(bad)", XX, XX, XX },
1299 { "sarA", Eb, CL, XX },
1300 },
1301 /* GRP2S_cl */
1302 {
1303 { "rolQ", Ev, CL, XX },
1304 { "rorQ", Ev, CL, XX },
1305 { "rclQ", Ev, CL, XX },
1306 { "rcrQ", Ev, CL, XX },
1307 { "shlQ", Ev, CL, XX },
1308 { "shrQ", Ev, CL, XX },
1309 { "(bad)", XX, XX, XX },
1310 { "sarQ", Ev, CL, XX }
1311 },
1312 /* GRP3b */
1313 {
1314 { "testA", Eb, Ib, XX },
1315 { "(bad)", Eb, XX, XX },
1316 { "notA", Eb, XX, XX },
1317 { "negA", Eb, XX, XX },
1318 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1319 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1320 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1321 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1322 },
1323 /* GRP3S */
1324 {
1325 { "testQ", Ev, Iv, XX },
1326 { "(bad)", XX, XX, XX },
1327 { "notQ", Ev, XX, XX },
1328 { "negQ", Ev, XX, XX },
1329 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1330 { "imulQ", Ev, XX, XX },
1331 { "divQ", Ev, XX, XX },
1332 { "idivQ", Ev, XX, XX },
1333 },
1334 /* GRP4 */
1335 {
1336 { "incA", Eb, XX, XX },
1337 { "decA", Eb, XX, XX },
1338 { "(bad)", XX, XX, XX },
1339 { "(bad)", XX, XX, XX },
1340 { "(bad)", XX, XX, XX },
1341 { "(bad)", XX, XX, XX },
1342 { "(bad)", XX, XX, XX },
1343 { "(bad)", XX, XX, XX },
1344 },
1345 /* GRP5 */
1346 {
1347 { "incQ", Ev, XX, XX },
1348 { "decQ", Ev, XX, XX },
1349 { "callT", indirEv, XX, XX },
1350 { "JcallT", indirEp, XX, XX },
1351 { "jmpT", indirEv, XX, XX },
1352 { "JjmpT", indirEp, XX, XX },
1353 { "pushU", Ev, XX, XX },
1354 { "(bad)", XX, XX, XX },
1355 },
1356 /* GRP6 */
1357 {
1358 { "sldtQ", Ev, XX, XX },
1359 { "strQ", Ev, XX, XX },
1360 { "lldt", Ew, XX, XX },
1361 { "ltr", Ew, XX, XX },
1362 { "verr", Ew, XX, XX },
1363 { "verw", Ew, XX, XX },
1364 { "(bad)", XX, XX, XX },
1365 { "(bad)", XX, XX, XX }
1366 },
1367 /* GRP7 */
1368 {
1369 { "sgdtIQ", M, XX, XX },
1370 { "sidtIQ", PNI_Fixup, 0, XX, XX },
1371 { "lgdt{Q|Q||}", M, XX, XX },
1372 { "lidt{Q|Q||}", SVME_Fixup, 0, XX, XX },
1373 { "smswQ", Ev, XX, XX },
1374 { "(bad)", XX, XX, XX },
1375 { "lmsw", Ew, XX, XX },
1376 { "invlpg", INVLPG_Fixup, w_mode, XX, XX },
1377 },
1378 /* GRP8 */
1379 {
1380 { "(bad)", XX, XX, XX },
1381 { "(bad)", XX, XX, XX },
1382 { "(bad)", XX, XX, XX },
1383 { "(bad)", XX, XX, XX },
1384 { "btQ", Ev, Ib, XX },
1385 { "btsQ", Ev, Ib, XX },
1386 { "btrQ", Ev, Ib, XX },
1387 { "btcQ", Ev, Ib, XX },
1388 },
1389 /* GRP9 */
1390 {
1391 { "(bad)", XX, XX, XX },
1392 { "cmpxchg8b", Eq, XX, XX },
1393 { "(bad)", XX, XX, XX },
1394 { "(bad)", XX, XX, XX },
1395 { "(bad)", XX, XX, XX },
1396 { "(bad)", XX, XX, XX },
1397 { "(bad)", XX, XX, XX },
1398 { "(bad)", XX, XX, XX },
1399 },
1400 /* GRP10 */
1401 {
1402 { "(bad)", XX, XX, XX },
1403 { "(bad)", XX, XX, XX },
1404 { "psrlw", MS, Ib, XX },
1405 { "(bad)", XX, XX, XX },
1406 { "psraw", MS, Ib, XX },
1407 { "(bad)", XX, XX, XX },
1408 { "psllw", MS, Ib, XX },
1409 { "(bad)", XX, XX, XX },
1410 },
1411 /* GRP11 */
1412 {
1413 { "(bad)", XX, XX, XX },
1414 { "(bad)", XX, XX, XX },
1415 { "psrld", MS, Ib, XX },
1416 { "(bad)", XX, XX, XX },
1417 { "psrad", MS, Ib, XX },
1418 { "(bad)", XX, XX, XX },
1419 { "pslld", MS, Ib, XX },
1420 { "(bad)", XX, XX, XX },
1421 },
1422 /* GRP12 */
1423 {
1424 { "(bad)", XX, XX, XX },
1425 { "(bad)", XX, XX, XX },
1426 { "psrlq", MS, Ib, XX },
1427 { "psrldq", MS, Ib, XX },
1428 { "(bad)", XX, XX, XX },
1429 { "(bad)", XX, XX, XX },
1430 { "psllq", MS, Ib, XX },
1431 { "pslldq", MS, Ib, XX },
1432 },
1433 /* GRP13 */
1434 {
1435 { "fxsave", Ev, XX, XX },
1436 { "fxrstor", Ev, XX, XX },
1437 { "ldmxcsr", Ev, XX, XX },
1438 { "stmxcsr", Ev, XX, XX },
1439 { "(bad)", XX, XX, XX },
1440 { "lfence", OP_0fae, 0, XX, XX },
1441 { "mfence", OP_0fae, 0, XX, XX },
1442 { "clflush", OP_0fae, 0, XX, XX },
1443 },
1444 /* GRP14 */
1445 {
1446 { "prefetchnta", Ev, XX, XX },
1447 { "prefetcht0", Ev, XX, XX },
1448 { "prefetcht1", Ev, XX, XX },
1449 { "prefetcht2", Ev, XX, XX },
1450 { "(bad)", XX, XX, XX },
1451 { "(bad)", XX, XX, XX },
1452 { "(bad)", XX, XX, XX },
1453 { "(bad)", XX, XX, XX },
1454 },
1455 /* GRPAMD */
1456 {
1457 { "prefetch", Eb, XX, XX },
1458 { "prefetchw", Eb, XX, XX },
1459 { "(bad)", XX, XX, XX },
1460 { "(bad)", XX, XX, XX },
1461 { "(bad)", XX, XX, XX },
1462 { "(bad)", XX, XX, XX },
1463 { "(bad)", XX, XX, XX },
1464 { "(bad)", XX, XX, XX },
1465 },
1466 /* GRPPADLCK1 */
1467 {
1468 { "xstore-rng", OP_0f07, 0, XX, XX },
1469 { "xcrypt-ecb", OP_0f07, 0, XX, XX },
1470 { "xcrypt-cbc", OP_0f07, 0, XX, XX },
1471 { "xcrypt-ctr", OP_0f07, 0, XX, XX },
1472 { "xcrypt-cfb", OP_0f07, 0, XX, XX },
1473 { "xcrypt-ofb", OP_0f07, 0, XX, XX },
1474 { "(bad)", OP_0f07, 0, XX, XX },
1475 { "(bad)", OP_0f07, 0, XX, XX },
1476 },
1477 /* GRPPADLCK2 */
1478 {
1479 { "montmul", OP_0f07, 0, XX, XX },
1480 { "xsha1", OP_0f07, 0, XX, XX },
1481 { "xsha256", OP_0f07, 0, XX, XX },
1482 { "(bad)", OP_0f07, 0, XX, XX },
1483 { "(bad)", OP_0f07, 0, XX, XX },
1484 { "(bad)", OP_0f07, 0, XX, XX },
1485 { "(bad)", OP_0f07, 0, XX, XX },
1486 { "(bad)", OP_0f07, 0, XX, XX },
1487 }
1488 };
1489
1490 static const struct dis386 prefix_user_table[][4] = {
1491 /* PREGRP0 */
1492 {
1493 { "addps", XM, EX, XX },
1494 { "addss", XM, EX, XX },
1495 { "addpd", XM, EX, XX },
1496 { "addsd", XM, EX, XX },
1497 },
1498 /* PREGRP1 */
1499 {
1500 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1501 { "", XM, EX, OPSIMD },
1502 { "", XM, EX, OPSIMD },
1503 { "", XM, EX, OPSIMD },
1504 },
1505 /* PREGRP2 */
1506 {
1507 { "cvtpi2ps", XM, EM, XX },
1508 { "cvtsi2ssY", XM, Ev, XX },
1509 { "cvtpi2pd", XM, EM, XX },
1510 { "cvtsi2sdY", XM, Ev, XX },
1511 },
1512 /* PREGRP3 */
1513 {
1514 { "cvtps2pi", MX, EX, XX },
1515 { "cvtss2siY", Gv, EX, XX },
1516 { "cvtpd2pi", MX, EX, XX },
1517 { "cvtsd2siY", Gv, EX, XX },
1518 },
1519 /* PREGRP4 */
1520 {
1521 { "cvttps2pi", MX, EX, XX },
1522 { "cvttss2siY", Gv, EX, XX },
1523 { "cvttpd2pi", MX, EX, XX },
1524 { "cvttsd2siY", Gv, EX, XX },
1525 },
1526 /* PREGRP5 */
1527 {
1528 { "divps", XM, EX, XX },
1529 { "divss", XM, EX, XX },
1530 { "divpd", XM, EX, XX },
1531 { "divsd", XM, EX, XX },
1532 },
1533 /* PREGRP6 */
1534 {
1535 { "maxps", XM, EX, XX },
1536 { "maxss", XM, EX, XX },
1537 { "maxpd", XM, EX, XX },
1538 { "maxsd", XM, EX, XX },
1539 },
1540 /* PREGRP7 */
1541 {
1542 { "minps", XM, EX, XX },
1543 { "minss", XM, EX, XX },
1544 { "minpd", XM, EX, XX },
1545 { "minsd", XM, EX, XX },
1546 },
1547 /* PREGRP8 */
1548 {
1549 { "movups", XM, EX, XX },
1550 { "movss", XM, EX, XX },
1551 { "movupd", XM, EX, XX },
1552 { "movsd", XM, EX, XX },
1553 },
1554 /* PREGRP9 */
1555 {
1556 { "movups", EX, XM, XX },
1557 { "movss", EX, XM, XX },
1558 { "movupd", EX, XM, XX },
1559 { "movsd", EX, XM, XX },
1560 },
1561 /* PREGRP10 */
1562 {
1563 { "mulps", XM, EX, XX },
1564 { "mulss", XM, EX, XX },
1565 { "mulpd", XM, EX, XX },
1566 { "mulsd", XM, EX, XX },
1567 },
1568 /* PREGRP11 */
1569 {
1570 { "rcpps", XM, EX, XX },
1571 { "rcpss", XM, EX, XX },
1572 { "(bad)", XM, EX, XX },
1573 { "(bad)", XM, EX, XX },
1574 },
1575 /* PREGRP12 */
1576 {
1577 { "rsqrtps", XM, EX, XX },
1578 { "rsqrtss", XM, EX, XX },
1579 { "(bad)", XM, EX, XX },
1580 { "(bad)", XM, EX, XX },
1581 },
1582 /* PREGRP13 */
1583 {
1584 { "sqrtps", XM, EX, XX },
1585 { "sqrtss", XM, EX, XX },
1586 { "sqrtpd", XM, EX, XX },
1587 { "sqrtsd", XM, EX, XX },
1588 },
1589 /* PREGRP14 */
1590 {
1591 { "subps", XM, EX, XX },
1592 { "subss", XM, EX, XX },
1593 { "subpd", XM, EX, XX },
1594 { "subsd", XM, EX, XX },
1595 },
1596 /* PREGRP15 */
1597 {
1598 { "(bad)", XM, EX, XX },
1599 { "cvtdq2pd", XM, EX, XX },
1600 { "cvttpd2dq", XM, EX, XX },
1601 { "cvtpd2dq", XM, EX, XX },
1602 },
1603 /* PREGRP16 */
1604 {
1605 { "cvtdq2ps", XM, EX, XX },
1606 { "cvttps2dq",XM, EX, XX },
1607 { "cvtps2dq",XM, EX, XX },
1608 { "(bad)", XM, EX, XX },
1609 },
1610 /* PREGRP17 */
1611 {
1612 { "cvtps2pd", XM, EX, XX },
1613 { "cvtss2sd", XM, EX, XX },
1614 { "cvtpd2ps", XM, EX, XX },
1615 { "cvtsd2ss", XM, EX, XX },
1616 },
1617 /* PREGRP18 */
1618 {
1619 { "maskmovq", MX, MS, XX },
1620 { "(bad)", XM, EX, XX },
1621 { "maskmovdqu", XM, EX, XX },
1622 { "(bad)", XM, EX, XX },
1623 },
1624 /* PREGRP19 */
1625 {
1626 { "movq", MX, EM, XX },
1627 { "movdqu", XM, EX, XX },
1628 { "movdqa", XM, EX, XX },
1629 { "(bad)", XM, EX, XX },
1630 },
1631 /* PREGRP20 */
1632 {
1633 { "movq", EM, MX, XX },
1634 { "movdqu", EX, XM, XX },
1635 { "movdqa", EX, XM, XX },
1636 { "(bad)", EX, XM, XX },
1637 },
1638 /* PREGRP21 */
1639 {
1640 { "(bad)", EX, XM, XX },
1641 { "movq2dq", XM, MS, XX },
1642 { "movq", EX, XM, XX },
1643 { "movdq2q", MX, XS, XX },
1644 },
1645 /* PREGRP22 */
1646 {
1647 { "pshufw", MX, EM, Ib },
1648 { "pshufhw", XM, EX, Ib },
1649 { "pshufd", XM, EX, Ib },
1650 { "pshuflw", XM, EX, Ib },
1651 },
1652 /* PREGRP23 */
1653 {
1654 { "movd", Edq, MX, XX },
1655 { "movq", XM, EX, XX },
1656 { "movd", Edq, XM, XX },
1657 { "(bad)", Ed, XM, XX },
1658 },
1659 /* PREGRP24 */
1660 {
1661 { "(bad)", MX, EX, XX },
1662 { "(bad)", XM, EX, XX },
1663 { "punpckhqdq", XM, EX, XX },
1664 { "(bad)", XM, EX, XX },
1665 },
1666 /* PREGRP25 */
1667 {
1668 { "movntq", EM, MX, XX },
1669 { "(bad)", EM, XM, XX },
1670 { "movntdq", EM, XM, XX },
1671 { "(bad)", EM, XM, XX },
1672 },
1673 /* PREGRP26 */
1674 {
1675 { "(bad)", MX, EX, XX },
1676 { "(bad)", XM, EX, XX },
1677 { "punpcklqdq", XM, EX, XX },
1678 { "(bad)", XM, EX, XX },
1679 },
1680 /* PREGRP27 */
1681 {
1682 { "(bad)", MX, EX, XX },
1683 { "(bad)", XM, EX, XX },
1684 { "addsubpd", XM, EX, XX },
1685 { "addsubps", XM, EX, XX },
1686 },
1687 /* PREGRP28 */
1688 {
1689 { "(bad)", MX, EX, XX },
1690 { "(bad)", XM, EX, XX },
1691 { "haddpd", XM, EX, XX },
1692 { "haddps", XM, EX, XX },
1693 },
1694 /* PREGRP29 */
1695 {
1696 { "(bad)", MX, EX, XX },
1697 { "(bad)", XM, EX, XX },
1698 { "hsubpd", XM, EX, XX },
1699 { "hsubps", XM, EX, XX },
1700 },
1701 /* PREGRP30 */
1702 {
1703 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1704 { "movsldup", XM, EX, XX },
1705 { "movlpd", XM, EX, XX },
1706 { "movddup", XM, EX, XX },
1707 },
1708 /* PREGRP31 */
1709 {
1710 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1711 { "movshdup", XM, EX, XX },
1712 { "movhpd", XM, EX, XX },
1713 { "(bad)", XM, EX, XX },
1714 },
1715 /* PREGRP32 */
1716 {
1717 { "(bad)", XM, EX, XX },
1718 { "(bad)", XM, EX, XX },
1719 { "(bad)", XM, EX, XX },
1720 { "lddqu", XM, M, XX },
1721 },
1722 };
1723
1724 static const struct dis386 x86_64_table[][2] = {
1725 {
1726 { "arpl", Ew, Gw, XX },
1727 { "movs{||lq|xd}", Gv, Ed, XX },
1728 },
1729 };
1730
1731 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1732
1733 static void
ckprefix(void)1734 ckprefix (void)
1735 {
1736 int newrex;
1737 rex = 0;
1738 prefixes = 0;
1739 used_prefixes = 0;
1740 rex_used = 0;
1741 while (1)
1742 {
1743 FETCH_DATA (the_info, codep + 1);
1744 newrex = 0;
1745 switch (*codep)
1746 {
1747 /* REX prefixes family. */
1748 case 0x40:
1749 case 0x41:
1750 case 0x42:
1751 case 0x43:
1752 case 0x44:
1753 case 0x45:
1754 case 0x46:
1755 case 0x47:
1756 case 0x48:
1757 case 0x49:
1758 case 0x4a:
1759 case 0x4b:
1760 case 0x4c:
1761 case 0x4d:
1762 case 0x4e:
1763 case 0x4f:
1764 if (mode_64bit)
1765 newrex = *codep;
1766 else
1767 return;
1768 break;
1769 case 0xf3:
1770 prefixes |= PREFIX_REPZ;
1771 break;
1772 case 0xf2:
1773 prefixes |= PREFIX_REPNZ;
1774 break;
1775 case 0xf0:
1776 prefixes |= PREFIX_LOCK;
1777 break;
1778 case 0x2e:
1779 prefixes |= PREFIX_CS;
1780 break;
1781 case 0x36:
1782 prefixes |= PREFIX_SS;
1783 break;
1784 case 0x3e:
1785 prefixes |= PREFIX_DS;
1786 break;
1787 case 0x26:
1788 prefixes |= PREFIX_ES;
1789 break;
1790 case 0x64:
1791 prefixes |= PREFIX_FS;
1792 break;
1793 case 0x65:
1794 prefixes |= PREFIX_GS;
1795 break;
1796 case 0x66:
1797 prefixes |= PREFIX_DATA;
1798 break;
1799 case 0x67:
1800 prefixes |= PREFIX_ADDR;
1801 break;
1802 case FWAIT_OPCODE:
1803 /* fwait is really an instruction. If there are prefixes
1804 before the fwait, they belong to the fwait, *not* to the
1805 following instruction. */
1806 if (prefixes)
1807 {
1808 prefixes |= PREFIX_FWAIT;
1809 codep++;
1810 return;
1811 }
1812 prefixes = PREFIX_FWAIT;
1813 break;
1814 default:
1815 return;
1816 }
1817 /* Rex is ignored when followed by another prefix. */
1818 if (rex)
1819 {
1820 oappend (prefix_name (rex, 0));
1821 oappend (" ");
1822 }
1823 rex = newrex;
1824 codep++;
1825 }
1826 }
1827
1828 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1829 prefix byte. */
1830
1831 static const char *
prefix_name(int pref,int sizeflag)1832 prefix_name (int pref, int sizeflag)
1833 {
1834 switch (pref)
1835 {
1836 /* REX prefixes family. */
1837 case 0x40:
1838 return "rex";
1839 case 0x41:
1840 return "rexZ";
1841 case 0x42:
1842 return "rexY";
1843 case 0x43:
1844 return "rexYZ";
1845 case 0x44:
1846 return "rexX";
1847 case 0x45:
1848 return "rexXZ";
1849 case 0x46:
1850 return "rexXY";
1851 case 0x47:
1852 return "rexXYZ";
1853 case 0x48:
1854 return "rex64";
1855 case 0x49:
1856 return "rex64Z";
1857 case 0x4a:
1858 return "rex64Y";
1859 case 0x4b:
1860 return "rex64YZ";
1861 case 0x4c:
1862 return "rex64X";
1863 case 0x4d:
1864 return "rex64XZ";
1865 case 0x4e:
1866 return "rex64XY";
1867 case 0x4f:
1868 return "rex64XYZ";
1869 case 0xf3:
1870 return "repz";
1871 case 0xf2:
1872 return "repnz";
1873 case 0xf0:
1874 return "lock";
1875 case 0x2e:
1876 return "cs";
1877 case 0x36:
1878 return "ss";
1879 case 0x3e:
1880 return "ds";
1881 case 0x26:
1882 return "es";
1883 case 0x64:
1884 return "fs";
1885 case 0x65:
1886 return "gs";
1887 case 0x66:
1888 return (sizeflag & DFLAG) ? "data16" : "data32";
1889 case 0x67:
1890 if (mode_64bit)
1891 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1892 else
1893 return (sizeflag & AFLAG) ? "addr16" : "addr32";
1894 case FWAIT_OPCODE:
1895 return "fwait";
1896 default:
1897 return NULL;
1898 }
1899 }
1900
1901 static char op1out[100], op2out[100], op3out[100];
1902 static int op_ad, op_index[3];
1903 static int two_source_ops;
1904 static bfd_vma op_address[3];
1905 static bfd_vma op_riprel[3];
1906 static bfd_vma start_pc;
1907
1908 /*
1909 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1910 * (see topic "Redundant prefixes" in the "Differences from 8086"
1911 * section of the "Virtual 8086 Mode" chapter.)
1912 * 'pc' should be the address of this instruction, it will
1913 * be used to print the target address if this is a relative jump or call
1914 * The function returns the length of this instruction in bytes.
1915 */
1916
1917 static char intel_syntax;
1918 static char open_char;
1919 static char close_char;
1920 static char separator_char;
1921 static char scale_char;
1922
1923 /* Here for backwards compatibility. When gdb stops using
1924 print_insn_i386_att and print_insn_i386_intel these functions can
1925 disappear, and print_insn_i386 be merged into print_insn. */
1926 int
print_insn_i386_att(bfd_vma pc,disassemble_info * info)1927 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
1928 {
1929 intel_syntax = 0;
1930
1931 return print_insn (pc, info);
1932 }
1933
1934 int
print_insn_i386_intel(bfd_vma pc,disassemble_info * info)1935 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
1936 {
1937 intel_syntax = 1;
1938
1939 return print_insn (pc, info);
1940 }
1941
1942 int
print_insn_i386(bfd_vma pc,disassemble_info * info)1943 print_insn_i386 (bfd_vma pc, disassemble_info *info)
1944 {
1945 intel_syntax = -1;
1946
1947 return print_insn (pc, info);
1948 }
1949
1950 static int
print_insn(bfd_vma pc,disassemble_info * info)1951 print_insn (bfd_vma pc, disassemble_info *info)
1952 {
1953 const struct dis386 *dp;
1954 int i;
1955 char *first, *second, *third;
1956 int needcomma;
1957 unsigned char uses_SSE_prefix, uses_LOCK_prefix;
1958 int sizeflag;
1959 const char *p;
1960 struct dis_private priv;
1961
1962 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
1963 || info->mach == bfd_mach_x86_64);
1964
1965 if (intel_syntax == (char) -1)
1966 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1967 || info->mach == bfd_mach_x86_64_intel_syntax);
1968
1969 if (info->mach == bfd_mach_i386_i386
1970 || info->mach == bfd_mach_x86_64
1971 || info->mach == bfd_mach_i386_i386_intel_syntax
1972 || info->mach == bfd_mach_x86_64_intel_syntax)
1973 priv.orig_sizeflag = AFLAG | DFLAG;
1974 else if (info->mach == bfd_mach_i386_i8086)
1975 priv.orig_sizeflag = 0;
1976 else
1977 abort ();
1978
1979 for (p = info->disassembler_options; p != NULL; )
1980 {
1981 if (strncmp (p, "x86-64", 6) == 0)
1982 {
1983 mode_64bit = 1;
1984 priv.orig_sizeflag = AFLAG | DFLAG;
1985 }
1986 else if (strncmp (p, "i386", 4) == 0)
1987 {
1988 mode_64bit = 0;
1989 priv.orig_sizeflag = AFLAG | DFLAG;
1990 }
1991 else if (strncmp (p, "i8086", 5) == 0)
1992 {
1993 mode_64bit = 0;
1994 priv.orig_sizeflag = 0;
1995 }
1996 else if (strncmp (p, "intel", 5) == 0)
1997 {
1998 intel_syntax = 1;
1999 }
2000 else if (strncmp (p, "att", 3) == 0)
2001 {
2002 intel_syntax = 0;
2003 }
2004 else if (strncmp (p, "addr", 4) == 0)
2005 {
2006 if (p[4] == '1' && p[5] == '6')
2007 priv.orig_sizeflag &= ~AFLAG;
2008 else if (p[4] == '3' && p[5] == '2')
2009 priv.orig_sizeflag |= AFLAG;
2010 }
2011 else if (strncmp (p, "data", 4) == 0)
2012 {
2013 if (p[4] == '1' && p[5] == '6')
2014 priv.orig_sizeflag &= ~DFLAG;
2015 else if (p[4] == '3' && p[5] == '2')
2016 priv.orig_sizeflag |= DFLAG;
2017 }
2018 else if (strncmp (p, "suffix", 6) == 0)
2019 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2020
2021 p = strchr (p, ',');
2022 if (p != NULL)
2023 p++;
2024 }
2025
2026 if (intel_syntax)
2027 {
2028 names64 = intel_names64;
2029 names32 = intel_names32;
2030 names16 = intel_names16;
2031 names8 = intel_names8;
2032 names8rex = intel_names8rex;
2033 names_seg = intel_names_seg;
2034 index16 = intel_index16;
2035 open_char = '[';
2036 close_char = ']';
2037 separator_char = '+';
2038 scale_char = '*';
2039 }
2040 else
2041 {
2042 names64 = att_names64;
2043 names32 = att_names32;
2044 names16 = att_names16;
2045 names8 = att_names8;
2046 names8rex = att_names8rex;
2047 names_seg = att_names_seg;
2048 index16 = att_index16;
2049 open_char = '(';
2050 close_char = ')';
2051 separator_char = ',';
2052 scale_char = ',';
2053 }
2054
2055 /* The output looks better if we put 7 bytes on a line, since that
2056 puts most long word instructions on a single line. */
2057 info->bytes_per_line = 7;
2058
2059 info->private_data = &priv;
2060 priv.max_fetched = priv.the_buffer;
2061 priv.insn_start = pc;
2062
2063 obuf[0] = 0;
2064 op1out[0] = 0;
2065 op2out[0] = 0;
2066 op3out[0] = 0;
2067
2068 op_index[0] = op_index[1] = op_index[2] = -1;
2069
2070 the_info = info;
2071 start_pc = pc;
2072 start_codep = priv.the_buffer;
2073 codep = priv.the_buffer;
2074
2075 if (setjmp (priv.bailout) != 0)
2076 {
2077 const char *name;
2078
2079 /* Getting here means we tried for data but didn't get it. That
2080 means we have an incomplete instruction of some sort. Just
2081 print the first byte as a prefix or a .byte pseudo-op. */
2082 if (codep > priv.the_buffer)
2083 {
2084 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2085 if (name != NULL)
2086 (*info->fprintf_func) (info->stream, "%s", name);
2087 else
2088 {
2089 /* Just print the first byte as a .byte instruction. */
2090 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2091 (unsigned int) priv.the_buffer[0]);
2092 }
2093
2094 return 1;
2095 }
2096
2097 return -1;
2098 }
2099
2100 obufp = obuf;
2101 ckprefix ();
2102
2103 insn_codep = codep;
2104 sizeflag = priv.orig_sizeflag;
2105
2106 FETCH_DATA (info, codep + 1);
2107 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2108
2109 if ((prefixes & PREFIX_FWAIT)
2110 && ((*codep < 0xd8) || (*codep > 0xdf)))
2111 {
2112 const char *name;
2113
2114 /* fwait not followed by floating point instruction. Print the
2115 first prefix, which is probably fwait itself. */
2116 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2117 if (name == NULL)
2118 name = INTERNAL_DISASSEMBLER_ERROR;
2119 (*info->fprintf_func) (info->stream, "%s", name);
2120 return 1;
2121 }
2122
2123 if (*codep == 0x0f)
2124 {
2125 FETCH_DATA (info, codep + 2);
2126 dp = &dis386_twobyte[*++codep];
2127 need_modrm = twobyte_has_modrm[*codep];
2128 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2129 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
2130 }
2131 else
2132 {
2133 dp = &dis386[*codep];
2134 need_modrm = onebyte_has_modrm[*codep];
2135 uses_SSE_prefix = 0;
2136 uses_LOCK_prefix = 0;
2137 }
2138 codep++;
2139
2140 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2141 {
2142 oappend ("repz ");
2143 used_prefixes |= PREFIX_REPZ;
2144 }
2145 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2146 {
2147 oappend ("repnz ");
2148 used_prefixes |= PREFIX_REPNZ;
2149 }
2150 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
2151 {
2152 oappend ("lock ");
2153 used_prefixes |= PREFIX_LOCK;
2154 }
2155
2156 if (prefixes & PREFIX_ADDR)
2157 {
2158 sizeflag ^= AFLAG;
2159 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2160 {
2161 if ((sizeflag & AFLAG) || mode_64bit)
2162 oappend ("addr32 ");
2163 else
2164 oappend ("addr16 ");
2165 used_prefixes |= PREFIX_ADDR;
2166 }
2167 }
2168
2169 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2170 {
2171 sizeflag ^= DFLAG;
2172 if (dp->bytemode3 == cond_jump_mode
2173 && dp->bytemode1 == v_mode
2174 && !intel_syntax)
2175 {
2176 if (sizeflag & DFLAG)
2177 oappend ("data32 ");
2178 else
2179 oappend ("data16 ");
2180 used_prefixes |= PREFIX_DATA;
2181 }
2182 }
2183
2184 if (need_modrm)
2185 {
2186 FETCH_DATA (info, codep + 1);
2187 mod = (*codep >> 6) & 3;
2188 reg = (*codep >> 3) & 7;
2189 rm = *codep & 7;
2190 }
2191
2192 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2193 {
2194 dofloat (sizeflag);
2195 }
2196 else
2197 {
2198 int index;
2199 if (dp->name == NULL)
2200 {
2201 switch (dp->bytemode1)
2202 {
2203 case USE_GROUPS:
2204 dp = &grps[dp->bytemode2][reg];
2205 break;
2206
2207 case USE_PREFIX_USER_TABLE:
2208 index = 0;
2209 used_prefixes |= (prefixes & PREFIX_REPZ);
2210 if (prefixes & PREFIX_REPZ)
2211 index = 1;
2212 else
2213 {
2214 used_prefixes |= (prefixes & PREFIX_DATA);
2215 if (prefixes & PREFIX_DATA)
2216 index = 2;
2217 else
2218 {
2219 used_prefixes |= (prefixes & PREFIX_REPNZ);
2220 if (prefixes & PREFIX_REPNZ)
2221 index = 3;
2222 }
2223 }
2224 dp = &prefix_user_table[dp->bytemode2][index];
2225 break;
2226
2227 case X86_64_SPECIAL:
2228 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2229 break;
2230
2231 default:
2232 oappend (INTERNAL_DISASSEMBLER_ERROR);
2233 break;
2234 }
2235 }
2236
2237 if (putop (dp->name, sizeflag) == 0)
2238 {
2239 obufp = op1out;
2240 op_ad = 2;
2241 if (dp->op1)
2242 (*dp->op1) (dp->bytemode1, sizeflag);
2243
2244 obufp = op2out;
2245 op_ad = 1;
2246 if (dp->op2)
2247 (*dp->op2) (dp->bytemode2, sizeflag);
2248
2249 obufp = op3out;
2250 op_ad = 0;
2251 if (dp->op3)
2252 (*dp->op3) (dp->bytemode3, sizeflag);
2253 }
2254 }
2255
2256 /* See if any prefixes were not used. If so, print the first one
2257 separately. If we don't do this, we'll wind up printing an
2258 instruction stream which does not precisely correspond to the
2259 bytes we are disassembling. */
2260 if ((prefixes & ~used_prefixes) != 0)
2261 {
2262 const char *name;
2263
2264 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2265 if (name == NULL)
2266 name = INTERNAL_DISASSEMBLER_ERROR;
2267 (*info->fprintf_func) (info->stream, "%s", name);
2268 return 1;
2269 }
2270 if (rex & ~rex_used)
2271 {
2272 const char *name;
2273 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2274 if (name == NULL)
2275 name = INTERNAL_DISASSEMBLER_ERROR;
2276 (*info->fprintf_func) (info->stream, "%s ", name);
2277 }
2278
2279 obufp = obuf + strlen (obuf);
2280 for (i = strlen (obuf); i < 6; i++)
2281 oappend (" ");
2282 oappend (" ");
2283 (*info->fprintf_func) (info->stream, "%s", obuf);
2284
2285 /* The enter and bound instructions are printed with operands in the same
2286 order as the intel book; everything else is printed in reverse order. */
2287 if (intel_syntax || two_source_ops)
2288 {
2289 first = op1out;
2290 second = op2out;
2291 third = op3out;
2292 op_ad = op_index[0];
2293 op_index[0] = op_index[2];
2294 op_index[2] = op_ad;
2295 }
2296 else
2297 {
2298 first = op3out;
2299 second = op2out;
2300 third = op1out;
2301 }
2302 needcomma = 0;
2303 if (*first)
2304 {
2305 if (op_index[0] != -1 && !op_riprel[0])
2306 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2307 else
2308 (*info->fprintf_func) (info->stream, "%s", first);
2309 needcomma = 1;
2310 }
2311 if (*second)
2312 {
2313 if (needcomma)
2314 (*info->fprintf_func) (info->stream, ",");
2315 if (op_index[1] != -1 && !op_riprel[1])
2316 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2317 else
2318 (*info->fprintf_func) (info->stream, "%s", second);
2319 needcomma = 1;
2320 }
2321 if (*third)
2322 {
2323 if (needcomma)
2324 (*info->fprintf_func) (info->stream, ",");
2325 if (op_index[2] != -1 && !op_riprel[2])
2326 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2327 else
2328 (*info->fprintf_func) (info->stream, "%s", third);
2329 }
2330 for (i = 0; i < 3; i++)
2331 if (op_index[i] != -1 && op_riprel[i])
2332 {
2333 (*info->fprintf_func) (info->stream, " # ");
2334 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2335 + op_address[op_index[i]]), info);
2336 }
2337 return codep - priv.the_buffer;
2338 }
2339
2340 static const char *float_mem[] = {
2341 /* d8 */
2342 "fadd{s||s|}",
2343 "fmul{s||s|}",
2344 "fcom{s||s|}",
2345 "fcomp{s||s|}",
2346 "fsub{s||s|}",
2347 "fsubr{s||s|}",
2348 "fdiv{s||s|}",
2349 "fdivr{s||s|}",
2350 /* d9 */
2351 "fld{s||s|}",
2352 "(bad)",
2353 "fst{s||s|}",
2354 "fstp{s||s|}",
2355 "fldenvIC",
2356 "fldcw",
2357 "fNstenvIC",
2358 "fNstcw",
2359 /* da */
2360 "fiadd{l||l|}",
2361 "fimul{l||l|}",
2362 "ficom{l||l|}",
2363 "ficomp{l||l|}",
2364 "fisub{l||l|}",
2365 "fisubr{l||l|}",
2366 "fidiv{l||l|}",
2367 "fidivr{l||l|}",
2368 /* db */
2369 "fild{l||l|}",
2370 "fisttp{l||l|}",
2371 "fist{l||l|}",
2372 "fistp{l||l|}",
2373 "(bad)",
2374 "fld{t||t|}",
2375 "(bad)",
2376 "fstp{t||t|}",
2377 /* dc */
2378 "fadd{l||l|}",
2379 "fmul{l||l|}",
2380 "fcom{l||l|}",
2381 "fcomp{l||l|}",
2382 "fsub{l||l|}",
2383 "fsubr{l||l|}",
2384 "fdiv{l||l|}",
2385 "fdivr{l||l|}",
2386 /* dd */
2387 "fld{l||l|}",
2388 "fisttp{ll||ll|}",
2389 "fst{l||l|}",
2390 "fstp{l||l|}",
2391 "frstorIC",
2392 "(bad)",
2393 "fNsaveIC",
2394 "fNstsw",
2395 /* de */
2396 "fiadd",
2397 "fimul",
2398 "ficom",
2399 "ficomp",
2400 "fisub",
2401 "fisubr",
2402 "fidiv",
2403 "fidivr",
2404 /* df */
2405 "fild",
2406 "fisttp",
2407 "fist",
2408 "fistp",
2409 "fbld",
2410 "fild{ll||ll|}",
2411 "fbstp",
2412 "fistp{ll||ll|}",
2413 };
2414
2415 static const unsigned char float_mem_mode[] = {
2416 /* d8 */
2417 d_mode,
2418 d_mode,
2419 d_mode,
2420 d_mode,
2421 d_mode,
2422 d_mode,
2423 d_mode,
2424 d_mode,
2425 /* d9 */
2426 d_mode,
2427 0,
2428 d_mode,
2429 d_mode,
2430 0,
2431 w_mode,
2432 0,
2433 w_mode,
2434 /* da */
2435 d_mode,
2436 d_mode,
2437 d_mode,
2438 d_mode,
2439 d_mode,
2440 d_mode,
2441 d_mode,
2442 d_mode,
2443 /* db */
2444 d_mode,
2445 d_mode,
2446 d_mode,
2447 d_mode,
2448 0,
2449 t_mode,
2450 0,
2451 t_mode,
2452 /* dc */
2453 q_mode,
2454 q_mode,
2455 q_mode,
2456 q_mode,
2457 q_mode,
2458 q_mode,
2459 q_mode,
2460 q_mode,
2461 /* dd */
2462 q_mode,
2463 q_mode,
2464 q_mode,
2465 q_mode,
2466 0,
2467 0,
2468 0,
2469 w_mode,
2470 /* de */
2471 w_mode,
2472 w_mode,
2473 w_mode,
2474 w_mode,
2475 w_mode,
2476 w_mode,
2477 w_mode,
2478 w_mode,
2479 /* df */
2480 w_mode,
2481 w_mode,
2482 w_mode,
2483 w_mode,
2484 t_mode,
2485 q_mode,
2486 t_mode,
2487 q_mode
2488 };
2489
2490 #define ST OP_ST, 0
2491 #define STi OP_STi, 0
2492
2493 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2494 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2495 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2496 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2497 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2498 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2499 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2500 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2501 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2502
2503 static const struct dis386 float_reg[][8] = {
2504 /* d8 */
2505 {
2506 { "fadd", ST, STi, XX },
2507 { "fmul", ST, STi, XX },
2508 { "fcom", STi, XX, XX },
2509 { "fcomp", STi, XX, XX },
2510 { "fsub", ST, STi, XX },
2511 { "fsubr", ST, STi, XX },
2512 { "fdiv", ST, STi, XX },
2513 { "fdivr", ST, STi, XX },
2514 },
2515 /* d9 */
2516 {
2517 { "fld", STi, XX, XX },
2518 { "fxch", STi, XX, XX },
2519 { FGRPd9_2 },
2520 { "(bad)", XX, XX, XX },
2521 { FGRPd9_4 },
2522 { FGRPd9_5 },
2523 { FGRPd9_6 },
2524 { FGRPd9_7 },
2525 },
2526 /* da */
2527 {
2528 { "fcmovb", ST, STi, XX },
2529 { "fcmove", ST, STi, XX },
2530 { "fcmovbe",ST, STi, XX },
2531 { "fcmovu", ST, STi, XX },
2532 { "(bad)", XX, XX, XX },
2533 { FGRPda_5 },
2534 { "(bad)", XX, XX, XX },
2535 { "(bad)", XX, XX, XX },
2536 },
2537 /* db */
2538 {
2539 { "fcmovnb",ST, STi, XX },
2540 { "fcmovne",ST, STi, XX },
2541 { "fcmovnbe",ST, STi, XX },
2542 { "fcmovnu",ST, STi, XX },
2543 { FGRPdb_4 },
2544 { "fucomi", ST, STi, XX },
2545 { "fcomi", ST, STi, XX },
2546 { "(bad)", XX, XX, XX },
2547 },
2548 /* dc */
2549 {
2550 { "fadd", STi, ST, XX },
2551 { "fmul", STi, ST, XX },
2552 { "(bad)", XX, XX, XX },
2553 { "(bad)", XX, XX, XX },
2554 #if UNIXWARE_COMPAT
2555 { "fsub", STi, ST, XX },
2556 { "fsubr", STi, ST, XX },
2557 { "fdiv", STi, ST, XX },
2558 { "fdivr", STi, ST, XX },
2559 #else
2560 { "fsubr", STi, ST, XX },
2561 { "fsub", STi, ST, XX },
2562 { "fdivr", STi, ST, XX },
2563 { "fdiv", STi, ST, XX },
2564 #endif
2565 },
2566 /* dd */
2567 {
2568 { "ffree", STi, XX, XX },
2569 { "(bad)", XX, XX, XX },
2570 { "fst", STi, XX, XX },
2571 { "fstp", STi, XX, XX },
2572 { "fucom", STi, XX, XX },
2573 { "fucomp", STi, XX, XX },
2574 { "(bad)", XX, XX, XX },
2575 { "(bad)", XX, XX, XX },
2576 },
2577 /* de */
2578 {
2579 { "faddp", STi, ST, XX },
2580 { "fmulp", STi, ST, XX },
2581 { "(bad)", XX, XX, XX },
2582 { FGRPde_3 },
2583 #if UNIXWARE_COMPAT
2584 { "fsubp", STi, ST, XX },
2585 { "fsubrp", STi, ST, XX },
2586 { "fdivp", STi, ST, XX },
2587 { "fdivrp", STi, ST, XX },
2588 #else
2589 { "fsubrp", STi, ST, XX },
2590 { "fsubp", STi, ST, XX },
2591 { "fdivrp", STi, ST, XX },
2592 { "fdivp", STi, ST, XX },
2593 #endif
2594 },
2595 /* df */
2596 {
2597 { "ffreep", STi, XX, XX },
2598 { "(bad)", XX, XX, XX },
2599 { "(bad)", XX, XX, XX },
2600 { "(bad)", XX, XX, XX },
2601 { FGRPdf_4 },
2602 { "fucomip",ST, STi, XX },
2603 { "fcomip", ST, STi, XX },
2604 { "(bad)", XX, XX, XX },
2605 },
2606 };
2607
2608 static char *fgrps[][8] = {
2609 /* d9_2 0 */
2610 {
2611 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2612 },
2613
2614 /* d9_4 1 */
2615 {
2616 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2617 },
2618
2619 /* d9_5 2 */
2620 {
2621 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2622 },
2623
2624 /* d9_6 3 */
2625 {
2626 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2627 },
2628
2629 /* d9_7 4 */
2630 {
2631 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2632 },
2633
2634 /* da_5 5 */
2635 {
2636 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2637 },
2638
2639 /* db_4 6 */
2640 {
2641 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2642 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2643 },
2644
2645 /* de_3 7 */
2646 {
2647 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2648 },
2649
2650 /* df_4 8 */
2651 {
2652 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2653 },
2654 };
2655
2656 static void
dofloat(int sizeflag)2657 dofloat (int sizeflag)
2658 {
2659 const struct dis386 *dp;
2660 unsigned char floatop;
2661
2662 floatop = codep[-1];
2663
2664 if (mod != 3)
2665 {
2666 int fp_indx = (floatop - 0xd8) * 8 + reg;
2667
2668 putop (float_mem[fp_indx], sizeflag);
2669 obufp = op1out;
2670 OP_E (float_mem_mode[fp_indx], sizeflag);
2671 return;
2672 }
2673 /* Skip mod/rm byte. */
2674 MODRM_CHECK;
2675 codep++;
2676
2677 dp = &float_reg[floatop - 0xd8][reg];
2678 if (dp->name == NULL)
2679 {
2680 putop (fgrps[dp->bytemode1][rm], sizeflag);
2681
2682 /* Instruction fnstsw is only one with strange arg. */
2683 if (floatop == 0xdf && codep[-1] == 0xe0)
2684 strcpy (op1out, names16[0]);
2685 }
2686 else
2687 {
2688 putop (dp->name, sizeflag);
2689
2690 obufp = op1out;
2691 if (dp->op1)
2692 (*dp->op1) (dp->bytemode1, sizeflag);
2693 obufp = op2out;
2694 if (dp->op2)
2695 (*dp->op2) (dp->bytemode2, sizeflag);
2696 }
2697 }
2698
2699 static void
OP_ST(int bytemode ATTRIBUTE_UNUSED,int sizeflag ATTRIBUTE_UNUSED)2700 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2701 {
2702 oappend ("%st");
2703 }
2704
2705 static void
OP_STi(int bytemode ATTRIBUTE_UNUSED,int sizeflag ATTRIBUTE_UNUSED)2706 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2707 {
2708 sprintf (scratchbuf, "%%st(%d)", rm);
2709 oappend (scratchbuf + intel_syntax);
2710 }
2711
2712 /* Capital letters in template are macros. */
2713 static int
putop(const char * template,int sizeflag)2714 putop (const char *template, int sizeflag)
2715 {
2716 const char *p;
2717 int alt = 0;
2718
2719 for (p = template; *p; p++)
2720 {
2721 switch (*p)
2722 {
2723 default:
2724 *obufp++ = *p;
2725 break;
2726 case '{':
2727 alt = 0;
2728 if (intel_syntax)
2729 alt += 1;
2730 if (mode_64bit)
2731 alt += 2;
2732 while (alt != 0)
2733 {
2734 while (*++p != '|')
2735 {
2736 if (*p == '}')
2737 {
2738 /* Alternative not valid. */
2739 strcpy (obuf, "(bad)");
2740 obufp = obuf + 5;
2741 return 1;
2742 }
2743 else if (*p == '\0')
2744 abort ();
2745 }
2746 alt--;
2747 }
2748 /* Fall through. */
2749 case 'I':
2750 alt = 1;
2751 continue;
2752 case '|':
2753 while (*++p != '}')
2754 {
2755 if (*p == '\0')
2756 abort ();
2757 }
2758 break;
2759 case '}':
2760 break;
2761 case 'A':
2762 if (intel_syntax)
2763 break;
2764 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2765 *obufp++ = 'b';
2766 break;
2767 case 'B':
2768 if (intel_syntax)
2769 break;
2770 if (sizeflag & SUFFIX_ALWAYS)
2771 *obufp++ = 'b';
2772 break;
2773 case 'C':
2774 if (intel_syntax && !alt)
2775 break;
2776 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
2777 {
2778 if (sizeflag & DFLAG)
2779 *obufp++ = intel_syntax ? 'd' : 'l';
2780 else
2781 *obufp++ = intel_syntax ? 'w' : 's';
2782 used_prefixes |= (prefixes & PREFIX_DATA);
2783 }
2784 break;
2785 case 'E': /* For jcxz/jecxz */
2786 if (mode_64bit)
2787 {
2788 if (sizeflag & AFLAG)
2789 *obufp++ = 'r';
2790 else
2791 *obufp++ = 'e';
2792 }
2793 else
2794 if (sizeflag & AFLAG)
2795 *obufp++ = 'e';
2796 used_prefixes |= (prefixes & PREFIX_ADDR);
2797 break;
2798 case 'F':
2799 if (intel_syntax)
2800 break;
2801 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2802 {
2803 if (sizeflag & AFLAG)
2804 *obufp++ = mode_64bit ? 'q' : 'l';
2805 else
2806 *obufp++ = mode_64bit ? 'l' : 'w';
2807 used_prefixes |= (prefixes & PREFIX_ADDR);
2808 }
2809 break;
2810 case 'H':
2811 if (intel_syntax)
2812 break;
2813 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2814 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2815 {
2816 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2817 *obufp++ = ',';
2818 *obufp++ = 'p';
2819 if (prefixes & PREFIX_DS)
2820 *obufp++ = 't';
2821 else
2822 *obufp++ = 'n';
2823 }
2824 break;
2825 case 'J':
2826 if (intel_syntax)
2827 break;
2828 *obufp++ = 'l';
2829 break;
2830 case 'L':
2831 if (intel_syntax)
2832 break;
2833 if (sizeflag & SUFFIX_ALWAYS)
2834 *obufp++ = 'l';
2835 break;
2836 case 'N':
2837 if ((prefixes & PREFIX_FWAIT) == 0)
2838 *obufp++ = 'n';
2839 else
2840 used_prefixes |= PREFIX_FWAIT;
2841 break;
2842 case 'O':
2843 USED_REX (REX_MODE64);
2844 if (rex & REX_MODE64)
2845 *obufp++ = 'o';
2846 else
2847 *obufp++ = 'd';
2848 break;
2849 case 'T':
2850 if (intel_syntax)
2851 break;
2852 if (mode_64bit)
2853 {
2854 *obufp++ = 'q';
2855 break;
2856 }
2857 /* Fall through. */
2858 case 'P':
2859 if (intel_syntax)
2860 break;
2861 if ((prefixes & PREFIX_DATA)
2862 || (rex & REX_MODE64)
2863 || (sizeflag & SUFFIX_ALWAYS))
2864 {
2865 USED_REX (REX_MODE64);
2866 if (rex & REX_MODE64)
2867 *obufp++ = 'q';
2868 else
2869 {
2870 if (sizeflag & DFLAG)
2871 *obufp++ = 'l';
2872 else
2873 *obufp++ = 'w';
2874 used_prefixes |= (prefixes & PREFIX_DATA);
2875 }
2876 }
2877 break;
2878 case 'U':
2879 if (intel_syntax)
2880 break;
2881 if (mode_64bit)
2882 {
2883 *obufp++ = 'q';
2884 break;
2885 }
2886 /* Fall through. */
2887 case 'Q':
2888 if (intel_syntax && !alt)
2889 break;
2890 USED_REX (REX_MODE64);
2891 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2892 {
2893 if (rex & REX_MODE64)
2894 *obufp++ = 'q';
2895 else
2896 {
2897 if (sizeflag & DFLAG)
2898 *obufp++ = intel_syntax ? 'd' : 'l';
2899 else
2900 *obufp++ = 'w';
2901 used_prefixes |= (prefixes & PREFIX_DATA);
2902 }
2903 }
2904 break;
2905 case 'R':
2906 USED_REX (REX_MODE64);
2907 if (intel_syntax)
2908 {
2909 if (rex & REX_MODE64)
2910 {
2911 *obufp++ = 'q';
2912 *obufp++ = 't';
2913 }
2914 else if (sizeflag & DFLAG)
2915 {
2916 *obufp++ = 'd';
2917 *obufp++ = 'q';
2918 }
2919 else
2920 {
2921 *obufp++ = 'w';
2922 *obufp++ = 'd';
2923 }
2924 }
2925 else
2926 {
2927 if (rex & REX_MODE64)
2928 *obufp++ = 'q';
2929 else if (sizeflag & DFLAG)
2930 *obufp++ = 'l';
2931 else
2932 *obufp++ = 'w';
2933 }
2934 if (!(rex & REX_MODE64))
2935 used_prefixes |= (prefixes & PREFIX_DATA);
2936 break;
2937 case 'S':
2938 if (intel_syntax)
2939 break;
2940 if (sizeflag & SUFFIX_ALWAYS)
2941 {
2942 if (rex & REX_MODE64)
2943 *obufp++ = 'q';
2944 else
2945 {
2946 if (sizeflag & DFLAG)
2947 *obufp++ = 'l';
2948 else
2949 *obufp++ = 'w';
2950 used_prefixes |= (prefixes & PREFIX_DATA);
2951 }
2952 }
2953 break;
2954 case 'X':
2955 if (prefixes & PREFIX_DATA)
2956 *obufp++ = 'd';
2957 else
2958 *obufp++ = 's';
2959 used_prefixes |= (prefixes & PREFIX_DATA);
2960 break;
2961 case 'Y':
2962 if (intel_syntax)
2963 break;
2964 if (rex & REX_MODE64)
2965 {
2966 USED_REX (REX_MODE64);
2967 *obufp++ = 'q';
2968 }
2969 break;
2970 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2971 case 'W':
2972 /* operand size flag for cwtl, cbtw */
2973 USED_REX (0);
2974 if (rex)
2975 *obufp++ = 'l';
2976 else if (sizeflag & DFLAG)
2977 *obufp++ = 'w';
2978 else
2979 *obufp++ = 'b';
2980 if (intel_syntax)
2981 {
2982 if (rex)
2983 {
2984 *obufp++ = 'q';
2985 *obufp++ = 'e';
2986 }
2987 if (sizeflag & DFLAG)
2988 {
2989 *obufp++ = 'd';
2990 *obufp++ = 'e';
2991 }
2992 else
2993 {
2994 *obufp++ = 'w';
2995 }
2996 }
2997 if (!rex)
2998 used_prefixes |= (prefixes & PREFIX_DATA);
2999 break;
3000 }
3001 alt = 0;
3002 }
3003 *obufp = 0;
3004 return 0;
3005 }
3006
3007 static void
oappend(const char * s)3008 oappend (const char *s)
3009 {
3010 strcpy (obufp, s);
3011 obufp += strlen (s);
3012 }
3013
3014 static void
append_seg(void)3015 append_seg (void)
3016 {
3017 if (prefixes & PREFIX_CS)
3018 {
3019 used_prefixes |= PREFIX_CS;
3020 oappend ("%cs:" + intel_syntax);
3021 }
3022 if (prefixes & PREFIX_DS)
3023 {
3024 used_prefixes |= PREFIX_DS;
3025 oappend ("%ds:" + intel_syntax);
3026 }
3027 if (prefixes & PREFIX_SS)
3028 {
3029 used_prefixes |= PREFIX_SS;
3030 oappend ("%ss:" + intel_syntax);
3031 }
3032 if (prefixes & PREFIX_ES)
3033 {
3034 used_prefixes |= PREFIX_ES;
3035 oappend ("%es:" + intel_syntax);
3036 }
3037 if (prefixes & PREFIX_FS)
3038 {
3039 used_prefixes |= PREFIX_FS;
3040 oappend ("%fs:" + intel_syntax);
3041 }
3042 if (prefixes & PREFIX_GS)
3043 {
3044 used_prefixes |= PREFIX_GS;
3045 oappend ("%gs:" + intel_syntax);
3046 }
3047 }
3048
3049 static void
OP_indirE(int bytemode,int sizeflag)3050 OP_indirE (int bytemode, int sizeflag)
3051 {
3052 if (!intel_syntax)
3053 oappend ("*");
3054 OP_E (bytemode, sizeflag);
3055 }
3056
3057 static void
print_operand_value(char * buf,int hex,bfd_vma disp)3058 print_operand_value (char *buf, int hex, bfd_vma disp)
3059 {
3060 if (mode_64bit)
3061 {
3062 if (hex)
3063 {
3064 char tmp[30];
3065 int i;
3066 buf[0] = '0';
3067 buf[1] = 'x';
3068 sprintf_vma (tmp, disp);
3069 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
3070 strcpy (buf + 2, tmp + i);
3071 }
3072 else
3073 {
3074 bfd_signed_vma v = disp;
3075 char tmp[30];
3076 int i;
3077 if (v < 0)
3078 {
3079 *(buf++) = '-';
3080 v = -disp;
3081 /* Check for possible overflow on 0x8000000000000000. */
3082 if (v < 0)
3083 {
3084 strcpy (buf, "9223372036854775808");
3085 return;
3086 }
3087 }
3088 if (!v)
3089 {
3090 strcpy (buf, "0");
3091 return;
3092 }
3093
3094 i = 0;
3095 tmp[29] = 0;
3096 while (v)
3097 {
3098 tmp[28 - i] = (v % 10) + '0';
3099 v /= 10;
3100 i++;
3101 }
3102 strcpy (buf, tmp + 29 - i);
3103 }
3104 }
3105 else
3106 {
3107 if (hex)
3108 sprintf (buf, "0x%x", (unsigned int) disp);
3109 else
3110 sprintf (buf, "%d", (int) disp);
3111 }
3112 }
3113
3114 static void
OP_E(int bytemode,int sizeflag)3115 OP_E (int bytemode, int sizeflag)
3116 {
3117 bfd_vma disp;
3118 int add = 0;
3119 int riprel = 0;
3120 USED_REX (REX_EXTZ);
3121 if (rex & REX_EXTZ)
3122 add += 8;
3123
3124 /* Skip mod/rm byte. */
3125 MODRM_CHECK;
3126 codep++;
3127
3128 if (mod == 3)
3129 {
3130 switch (bytemode)
3131 {
3132 case b_mode:
3133 USED_REX (0);
3134 if (rex)
3135 oappend (names8rex[rm + add]);
3136 else
3137 oappend (names8[rm + add]);
3138 break;
3139 case w_mode:
3140 oappend (names16[rm + add]);
3141 break;
3142 case d_mode:
3143 oappend (names32[rm + add]);
3144 break;
3145 case q_mode:
3146 oappend (names64[rm + add]);
3147 break;
3148 case m_mode:
3149 if (mode_64bit)
3150 oappend (names64[rm + add]);
3151 else
3152 oappend (names32[rm + add]);
3153 break;
3154 case branch_v_mode:
3155 if (mode_64bit)
3156 oappend (names64[rm + add]);
3157 else
3158 {
3159 if ((sizeflag & DFLAG) || bytemode != branch_v_mode)
3160 oappend (names32[rm + add]);
3161 else
3162 oappend (names16[rm + add]);
3163 used_prefixes |= (prefixes & PREFIX_DATA);
3164 }
3165 break;
3166 case v_mode:
3167 case dq_mode:
3168 case dqw_mode:
3169 USED_REX (REX_MODE64);
3170 if (rex & REX_MODE64)
3171 oappend (names64[rm + add]);
3172 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3173 oappend (names32[rm + add]);
3174 else
3175 oappend (names16[rm + add]);
3176 used_prefixes |= (prefixes & PREFIX_DATA);
3177 break;
3178 case 0:
3179 break;
3180 default:
3181 oappend (INTERNAL_DISASSEMBLER_ERROR);
3182 break;
3183 }
3184 return;
3185 }
3186
3187 disp = 0;
3188 append_seg ();
3189
3190 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
3191 {
3192 int havesib;
3193 int havebase;
3194 int base;
3195 int index = 0;
3196 int scale = 0;
3197
3198 havesib = 0;
3199 havebase = 1;
3200 base = rm;
3201
3202 if (base == 4)
3203 {
3204 havesib = 1;
3205 FETCH_DATA (the_info, codep + 1);
3206 index = (*codep >> 3) & 7;
3207 if (mode_64bit || index != 0x4)
3208 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
3209 scale = (*codep >> 6) & 3;
3210 base = *codep & 7;
3211 USED_REX (REX_EXTY);
3212 if (rex & REX_EXTY)
3213 index += 8;
3214 codep++;
3215 }
3216 base += add;
3217
3218 switch (mod)
3219 {
3220 case 0:
3221 if ((base & 7) == 5)
3222 {
3223 havebase = 0;
3224 if (mode_64bit && !havesib)
3225 riprel = 1;
3226 disp = get32s ();
3227 }
3228 break;
3229 case 1:
3230 FETCH_DATA (the_info, codep + 1);
3231 disp = *codep++;
3232 if ((disp & 0x80) != 0)
3233 disp -= 0x100;
3234 break;
3235 case 2:
3236 disp = get32s ();
3237 break;
3238 }
3239
3240 if (!intel_syntax)
3241 if (mod != 0 || (base & 7) == 5)
3242 {
3243 print_operand_value (scratchbuf, !riprel, disp);
3244 oappend (scratchbuf);
3245 if (riprel)
3246 {
3247 set_op (disp, 1);
3248 oappend ("(%rip)");
3249 }
3250 }
3251
3252 if (havebase || (havesib && (index != 4 || scale != 0)))
3253 {
3254 if (intel_syntax)
3255 {
3256 switch (bytemode)
3257 {
3258 case b_mode:
3259 oappend ("BYTE PTR ");
3260 break;
3261 case w_mode:
3262 case dqw_mode:
3263 oappend ("WORD PTR ");
3264 break;
3265 case branch_v_mode:
3266 case v_mode:
3267 case dq_mode:
3268 USED_REX (REX_MODE64);
3269 if (rex & REX_MODE64)
3270 oappend ("QWORD PTR ");
3271 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3272 oappend ("DWORD PTR ");
3273 else
3274 oappend ("WORD PTR ");
3275 used_prefixes |= (prefixes & PREFIX_DATA);
3276 break;
3277 case d_mode:
3278 oappend ("DWORD PTR ");
3279 break;
3280 case q_mode:
3281 oappend ("QWORD PTR ");
3282 break;
3283 case m_mode:
3284 if (mode_64bit)
3285 oappend ("QWORD PTR ");
3286 else
3287 oappend ("DWORD PTR ");
3288 break;
3289 case f_mode:
3290 if (sizeflag & DFLAG)
3291 {
3292 used_prefixes |= (prefixes & PREFIX_DATA);
3293 oappend ("FWORD PTR ");
3294 }
3295 else
3296 oappend ("DWORD PTR ");
3297 break;
3298 case t_mode:
3299 oappend ("TBYTE PTR ");
3300 break;
3301 case x_mode:
3302 oappend ("XMMWORD PTR ");
3303 break;
3304 default:
3305 break;
3306 }
3307 }
3308 *obufp++ = open_char;
3309 if (intel_syntax && riprel)
3310 oappend ("rip + ");
3311 *obufp = '\0';
3312 if (havebase)
3313 oappend (mode_64bit && (sizeflag & AFLAG)
3314 ? names64[base] : names32[base]);
3315 if (havesib)
3316 {
3317 if (index != 4)
3318 {
3319 if (!intel_syntax || havebase)
3320 {
3321 *obufp++ = separator_char;
3322 *obufp = '\0';
3323 }
3324 oappend (mode_64bit && (sizeflag & AFLAG)
3325 ? names64[index] : names32[index]);
3326 }
3327 if (scale != 0 || (!intel_syntax && index != 4))
3328 {
3329 *obufp++ = scale_char;
3330 *obufp = '\0';
3331 sprintf (scratchbuf, "%d", 1 << scale);
3332 oappend (scratchbuf);
3333 }
3334 }
3335 if (intel_syntax && disp)
3336 {
3337 if ((bfd_signed_vma) disp > 0)
3338 {
3339 *obufp++ = '+';
3340 *obufp = '\0';
3341 }
3342 else if (mod != 1)
3343 {
3344 *obufp++ = '-';
3345 *obufp = '\0';
3346 disp = - (bfd_signed_vma) disp;
3347 }
3348
3349 print_operand_value (scratchbuf, mod != 1, disp);
3350 oappend (scratchbuf);
3351 }
3352
3353 *obufp++ = close_char;
3354 *obufp = '\0';
3355 }
3356 else if (intel_syntax)
3357 {
3358 if (mod != 0 || (base & 7) == 5)
3359 {
3360 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3361 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3362 ;
3363 else
3364 {
3365 oappend (names_seg[ds_reg - es_reg]);
3366 oappend (":");
3367 }
3368 print_operand_value (scratchbuf, 1, disp);
3369 oappend (scratchbuf);
3370 }
3371 }
3372 }
3373 else
3374 { /* 16 bit address mode */
3375 switch (mod)
3376 {
3377 case 0:
3378 if (rm == 6)
3379 {
3380 disp = get16 ();
3381 if ((disp & 0x8000) != 0)
3382 disp -= 0x10000;
3383 }
3384 break;
3385 case 1:
3386 FETCH_DATA (the_info, codep + 1);
3387 disp = *codep++;
3388 if ((disp & 0x80) != 0)
3389 disp -= 0x100;
3390 break;
3391 case 2:
3392 disp = get16 ();
3393 if ((disp & 0x8000) != 0)
3394 disp -= 0x10000;
3395 break;
3396 }
3397
3398 if (!intel_syntax)
3399 if (mod != 0 || rm == 6)
3400 {
3401 print_operand_value (scratchbuf, 0, disp);
3402 oappend (scratchbuf);
3403 }
3404
3405 if (mod != 0 || rm != 6)
3406 {
3407 *obufp++ = open_char;
3408 *obufp = '\0';
3409 oappend (index16[rm]);
3410 if (intel_syntax && disp)
3411 {
3412 if ((bfd_signed_vma) disp > 0)
3413 {
3414 *obufp++ = '+';
3415 *obufp = '\0';
3416 }
3417 else if (mod != 1)
3418 {
3419 *obufp++ = '-';
3420 *obufp = '\0';
3421 disp = - (bfd_signed_vma) disp;
3422 }
3423
3424 print_operand_value (scratchbuf, mod != 1, disp);
3425 oappend (scratchbuf);
3426 }
3427
3428 *obufp++ = close_char;
3429 *obufp = '\0';
3430 }
3431 else if (intel_syntax)
3432 {
3433 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3434 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3435 ;
3436 else
3437 {
3438 oappend (names_seg[ds_reg - es_reg]);
3439 oappend (":");
3440 }
3441 print_operand_value (scratchbuf, 1, disp & 0xffff);
3442 oappend (scratchbuf);
3443 }
3444 }
3445 }
3446
3447 static void
OP_G(int bytemode,int sizeflag)3448 OP_G (int bytemode, int sizeflag)
3449 {
3450 int add = 0;
3451 USED_REX (REX_EXTX);
3452 if (rex & REX_EXTX)
3453 add += 8;
3454 switch (bytemode)
3455 {
3456 case b_mode:
3457 USED_REX (0);
3458 if (rex)
3459 oappend (names8rex[reg + add]);
3460 else
3461 oappend (names8[reg + add]);
3462 break;
3463 case w_mode:
3464 oappend (names16[reg + add]);
3465 break;
3466 case d_mode:
3467 oappend (names32[reg + add]);
3468 break;
3469 case q_mode:
3470 oappend (names64[reg + add]);
3471 break;
3472 case v_mode:
3473 case dq_mode:
3474 case dqw_mode:
3475 USED_REX (REX_MODE64);
3476 if (rex & REX_MODE64)
3477 oappend (names64[reg + add]);
3478 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3479 oappend (names32[reg + add]);
3480 else
3481 oappend (names16[reg + add]);
3482 used_prefixes |= (prefixes & PREFIX_DATA);
3483 break;
3484 default:
3485 oappend (INTERNAL_DISASSEMBLER_ERROR);
3486 break;
3487 }
3488 }
3489
3490 static bfd_vma
get64(void)3491 get64 (void)
3492 {
3493 bfd_vma x;
3494 #ifdef BFD64
3495 unsigned int a;
3496 unsigned int b;
3497
3498 FETCH_DATA (the_info, codep + 8);
3499 a = *codep++ & 0xff;
3500 a |= (*codep++ & 0xff) << 8;
3501 a |= (*codep++ & 0xff) << 16;
3502 a |= (*codep++ & 0xff) << 24;
3503 b = *codep++ & 0xff;
3504 b |= (*codep++ & 0xff) << 8;
3505 b |= (*codep++ & 0xff) << 16;
3506 b |= (*codep++ & 0xff) << 24;
3507 x = a + ((bfd_vma) b << 32);
3508 #else
3509 abort ();
3510 x = 0;
3511 #endif
3512 return x;
3513 }
3514
3515 static bfd_signed_vma
get32(void)3516 get32 (void)
3517 {
3518 bfd_signed_vma x = 0;
3519
3520 FETCH_DATA (the_info, codep + 4);
3521 x = *codep++ & (bfd_signed_vma) 0xff;
3522 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3523 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3524 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3525 return x;
3526 }
3527
3528 static bfd_signed_vma
get32s(void)3529 get32s (void)
3530 {
3531 bfd_signed_vma x = 0;
3532
3533 FETCH_DATA (the_info, codep + 4);
3534 x = *codep++ & (bfd_signed_vma) 0xff;
3535 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3536 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3537 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3538
3539 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3540
3541 return x;
3542 }
3543
3544 static int
get16(void)3545 get16 (void)
3546 {
3547 int x = 0;
3548
3549 FETCH_DATA (the_info, codep + 2);
3550 x = *codep++ & 0xff;
3551 x |= (*codep++ & 0xff) << 8;
3552 return x;
3553 }
3554
3555 static void
set_op(bfd_vma op,int riprel)3556 set_op (bfd_vma op, int riprel)
3557 {
3558 op_index[op_ad] = op_ad;
3559 if (mode_64bit)
3560 {
3561 op_address[op_ad] = op;
3562 op_riprel[op_ad] = riprel;
3563 }
3564 else
3565 {
3566 /* Mask to get a 32-bit address. */
3567 op_address[op_ad] = op & 0xffffffff;
3568 op_riprel[op_ad] = riprel & 0xffffffff;
3569 }
3570 }
3571
3572 static void
OP_REG(int code,int sizeflag)3573 OP_REG (int code, int sizeflag)
3574 {
3575 const char *s;
3576 int add = 0;
3577 USED_REX (REX_EXTZ);
3578 if (rex & REX_EXTZ)
3579 add = 8;
3580
3581 switch (code)
3582 {
3583 case indir_dx_reg:
3584 if (intel_syntax)
3585 s = "[dx]";
3586 else
3587 s = "(%dx)";
3588 break;
3589 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3590 case sp_reg: case bp_reg: case si_reg: case di_reg:
3591 s = names16[code - ax_reg + add];
3592 break;
3593 case es_reg: case ss_reg: case cs_reg:
3594 case ds_reg: case fs_reg: case gs_reg:
3595 s = names_seg[code - es_reg + add];
3596 break;
3597 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3598 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3599 USED_REX (0);
3600 if (rex)
3601 s = names8rex[code - al_reg + add];
3602 else
3603 s = names8[code - al_reg];
3604 break;
3605 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3606 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3607 if (mode_64bit)
3608 {
3609 s = names64[code - rAX_reg + add];
3610 break;
3611 }
3612 code += eAX_reg - rAX_reg;
3613 /* Fall through. */
3614 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3615 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3616 USED_REX (REX_MODE64);
3617 if (rex & REX_MODE64)
3618 s = names64[code - eAX_reg + add];
3619 else if (sizeflag & DFLAG)
3620 s = names32[code - eAX_reg + add];
3621 else
3622 s = names16[code - eAX_reg + add];
3623 used_prefixes |= (prefixes & PREFIX_DATA);
3624 break;
3625 default:
3626 s = INTERNAL_DISASSEMBLER_ERROR;
3627 break;
3628 }
3629 oappend (s);
3630 }
3631
3632 static void
OP_IMREG(int code,int sizeflag)3633 OP_IMREG (int code, int sizeflag)
3634 {
3635 const char *s;
3636
3637 switch (code)
3638 {
3639 case indir_dx_reg:
3640 if (intel_syntax)
3641 s = "[dx]";
3642 else
3643 s = "(%dx)";
3644 break;
3645 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3646 case sp_reg: case bp_reg: case si_reg: case di_reg:
3647 s = names16[code - ax_reg];
3648 break;
3649 case es_reg: case ss_reg: case cs_reg:
3650 case ds_reg: case fs_reg: case gs_reg:
3651 s = names_seg[code - es_reg];
3652 break;
3653 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3654 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3655 USED_REX (0);
3656 if (rex)
3657 s = names8rex[code - al_reg];
3658 else
3659 s = names8[code - al_reg];
3660 break;
3661 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3662 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3663 USED_REX (REX_MODE64);
3664 if (rex & REX_MODE64)
3665 s = names64[code - eAX_reg];
3666 else if (sizeflag & DFLAG)
3667 s = names32[code - eAX_reg];
3668 else
3669 s = names16[code - eAX_reg];
3670 used_prefixes |= (prefixes & PREFIX_DATA);
3671 break;
3672 default:
3673 s = INTERNAL_DISASSEMBLER_ERROR;
3674 break;
3675 }
3676 oappend (s);
3677 }
3678
3679 static void
OP_I(int bytemode,int sizeflag)3680 OP_I (int bytemode, int sizeflag)
3681 {
3682 bfd_signed_vma op;
3683 bfd_signed_vma mask = -1;
3684
3685 switch (bytemode)
3686 {
3687 case b_mode:
3688 FETCH_DATA (the_info, codep + 1);
3689 op = *codep++;
3690 mask = 0xff;
3691 break;
3692 case q_mode:
3693 if (mode_64bit)
3694 {
3695 op = get32s ();
3696 break;
3697 }
3698 /* Fall through. */
3699 case v_mode:
3700 USED_REX (REX_MODE64);
3701 if (rex & REX_MODE64)
3702 op = get32s ();
3703 else if (sizeflag & DFLAG)
3704 {
3705 op = get32 ();
3706 mask = 0xffffffff;
3707 }
3708 else
3709 {
3710 op = get16 ();
3711 mask = 0xfffff;
3712 }
3713 used_prefixes |= (prefixes & PREFIX_DATA);
3714 break;
3715 case w_mode:
3716 mask = 0xfffff;
3717 op = get16 ();
3718 break;
3719 case const_1_mode:
3720 if (intel_syntax)
3721 oappend ("1");
3722 return;
3723 default:
3724 oappend (INTERNAL_DISASSEMBLER_ERROR);
3725 return;
3726 }
3727
3728 op &= mask;
3729 scratchbuf[0] = '$';
3730 print_operand_value (scratchbuf + 1, 1, op);
3731 oappend (scratchbuf + intel_syntax);
3732 scratchbuf[0] = '\0';
3733 }
3734
3735 static void
OP_I64(int bytemode,int sizeflag)3736 OP_I64 (int bytemode, int sizeflag)
3737 {
3738 bfd_signed_vma op;
3739 bfd_signed_vma mask = -1;
3740
3741 if (!mode_64bit)
3742 {
3743 OP_I (bytemode, sizeflag);
3744 return;
3745 }
3746
3747 switch (bytemode)
3748 {
3749 case b_mode:
3750 FETCH_DATA (the_info, codep + 1);
3751 op = *codep++;
3752 mask = 0xff;
3753 break;
3754 case v_mode:
3755 USED_REX (REX_MODE64);
3756 if (rex & REX_MODE64)
3757 op = get64 ();
3758 else if (sizeflag & DFLAG)
3759 {
3760 op = get32 ();
3761 mask = 0xffffffff;
3762 }
3763 else
3764 {
3765 op = get16 ();
3766 mask = 0xfffff;
3767 }
3768 used_prefixes |= (prefixes & PREFIX_DATA);
3769 break;
3770 case w_mode:
3771 mask = 0xfffff;
3772 op = get16 ();
3773 break;
3774 default:
3775 oappend (INTERNAL_DISASSEMBLER_ERROR);
3776 return;
3777 }
3778
3779 op &= mask;
3780 scratchbuf[0] = '$';
3781 print_operand_value (scratchbuf + 1, 1, op);
3782 oappend (scratchbuf + intel_syntax);
3783 scratchbuf[0] = '\0';
3784 }
3785
3786 static void
OP_sI(int bytemode,int sizeflag)3787 OP_sI (int bytemode, int sizeflag)
3788 {
3789 bfd_signed_vma op;
3790 bfd_signed_vma mask = -1;
3791
3792 switch (bytemode)
3793 {
3794 case b_mode:
3795 FETCH_DATA (the_info, codep + 1);
3796 op = *codep++;
3797 if ((op & 0x80) != 0)
3798 op -= 0x100;
3799 mask = 0xffffffff;
3800 break;
3801 case v_mode:
3802 USED_REX (REX_MODE64);
3803 if (rex & REX_MODE64)
3804 op = get32s ();
3805 else if (sizeflag & DFLAG)
3806 {
3807 op = get32s ();
3808 mask = 0xffffffff;
3809 }
3810 else
3811 {
3812 mask = 0xffffffff;
3813 op = get16 ();
3814 if ((op & 0x8000) != 0)
3815 op -= 0x10000;
3816 }
3817 used_prefixes |= (prefixes & PREFIX_DATA);
3818 break;
3819 case w_mode:
3820 op = get16 ();
3821 mask = 0xffffffff;
3822 if ((op & 0x8000) != 0)
3823 op -= 0x10000;
3824 break;
3825 default:
3826 oappend (INTERNAL_DISASSEMBLER_ERROR);
3827 return;
3828 }
3829
3830 scratchbuf[0] = '$';
3831 print_operand_value (scratchbuf + 1, 1, op);
3832 oappend (scratchbuf + intel_syntax);
3833 }
3834
3835 static void
OP_J(int bytemode,int sizeflag)3836 OP_J (int bytemode, int sizeflag)
3837 {
3838 bfd_vma disp;
3839 bfd_vma mask = -1;
3840
3841 switch (bytemode)
3842 {
3843 case b_mode:
3844 FETCH_DATA (the_info, codep + 1);
3845 disp = *codep++;
3846 if ((disp & 0x80) != 0)
3847 disp -= 0x100;
3848 break;
3849 case v_mode:
3850 if (sizeflag & DFLAG)
3851 disp = get32s ();
3852 else
3853 {
3854 disp = get16 ();
3855 /* For some reason, a data16 prefix on a jump instruction
3856 means that the pc is masked to 16 bits after the
3857 displacement is added! */
3858 mask = 0xffff;
3859 }
3860 break;
3861 default:
3862 oappend (INTERNAL_DISASSEMBLER_ERROR);
3863 return;
3864 }
3865 disp = (start_pc + codep - start_codep + disp) & mask;
3866 set_op (disp, 0);
3867 print_operand_value (scratchbuf, 1, disp);
3868 oappend (scratchbuf);
3869 }
3870
3871 static void
OP_SEG(int dummy ATTRIBUTE_UNUSED,int sizeflag ATTRIBUTE_UNUSED)3872 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3873 {
3874 oappend (names_seg[reg]);
3875 }
3876
3877 static void
OP_DIR(int dummy ATTRIBUTE_UNUSED,int sizeflag)3878 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
3879 {
3880 int seg, offset;
3881
3882 if (sizeflag & DFLAG)
3883 {
3884 offset = get32 ();
3885 seg = get16 ();
3886 }
3887 else
3888 {
3889 offset = get16 ();
3890 seg = get16 ();
3891 }
3892 used_prefixes |= (prefixes & PREFIX_DATA);
3893 if (intel_syntax)
3894 sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
3895 else
3896 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
3897 oappend (scratchbuf);
3898 }
3899
3900 static void
OP_OFF(int bytemode ATTRIBUTE_UNUSED,int sizeflag)3901 OP_OFF (int bytemode ATTRIBUTE_UNUSED, int sizeflag)
3902 {
3903 bfd_vma off;
3904
3905 append_seg ();
3906
3907 if ((sizeflag & AFLAG) || mode_64bit)
3908 off = get32 ();
3909 else
3910 off = get16 ();
3911
3912 if (intel_syntax)
3913 {
3914 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3915 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3916 {
3917 oappend (names_seg[ds_reg - es_reg]);
3918 oappend (":");
3919 }
3920 }
3921 print_operand_value (scratchbuf, 1, off);
3922 oappend (scratchbuf);
3923 }
3924
3925 static void
OP_OFF64(int bytemode ATTRIBUTE_UNUSED,int sizeflag ATTRIBUTE_UNUSED)3926 OP_OFF64 (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3927 {
3928 bfd_vma off;
3929
3930 if (!mode_64bit)
3931 {
3932 OP_OFF (bytemode, sizeflag);
3933 return;
3934 }
3935
3936 append_seg ();
3937
3938 off = get64 ();
3939
3940 if (intel_syntax)
3941 {
3942 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3943 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3944 {
3945 oappend (names_seg[ds_reg - es_reg]);
3946 oappend (":");
3947 }
3948 }
3949 print_operand_value (scratchbuf, 1, off);
3950 oappend (scratchbuf);
3951 }
3952
3953 static void
ptr_reg(int code,int sizeflag)3954 ptr_reg (int code, int sizeflag)
3955 {
3956 const char *s;
3957
3958 *obufp++ = open_char;
3959 used_prefixes |= (prefixes & PREFIX_ADDR);
3960 if (mode_64bit)
3961 {
3962 if (!(sizeflag & AFLAG))
3963 s = names32[code - eAX_reg];
3964 else
3965 s = names64[code - eAX_reg];
3966 }
3967 else if (sizeflag & AFLAG)
3968 s = names32[code - eAX_reg];
3969 else
3970 s = names16[code - eAX_reg];
3971 oappend (s);
3972 *obufp++ = close_char;
3973 *obufp = 0;
3974 }
3975
3976 static void
OP_ESreg(int code,int sizeflag)3977 OP_ESreg (int code, int sizeflag)
3978 {
3979 if (intel_syntax)
3980 {
3981 if (codep[-1] & 1)
3982 {
3983 USED_REX (REX_MODE64);
3984 used_prefixes |= (prefixes & PREFIX_DATA);
3985 if (rex & REX_MODE64)
3986 oappend ("QWORD PTR ");
3987 else if ((sizeflag & DFLAG))
3988 oappend ("DWORD PTR ");
3989 else
3990 oappend ("WORD PTR ");
3991 }
3992 else
3993 oappend ("BYTE PTR ");
3994 }
3995
3996 oappend ("%es:" + intel_syntax);
3997 ptr_reg (code, sizeflag);
3998 }
3999
4000 static void
OP_DSreg(int code,int sizeflag)4001 OP_DSreg (int code, int sizeflag)
4002 {
4003 if (intel_syntax)
4004 {
4005 if (codep[-1] != 0xd7 && (codep[-1] & 1))
4006 {
4007 USED_REX (REX_MODE64);
4008 used_prefixes |= (prefixes & PREFIX_DATA);
4009 if (rex & REX_MODE64)
4010 oappend ("QWORD PTR ");
4011 else if ((sizeflag & DFLAG))
4012 oappend ("DWORD PTR ");
4013 else
4014 oappend ("WORD PTR ");
4015 }
4016 else
4017 oappend ("BYTE PTR ");
4018 }
4019
4020 if ((prefixes
4021 & (PREFIX_CS
4022 | PREFIX_DS
4023 | PREFIX_SS
4024 | PREFIX_ES
4025 | PREFIX_FS
4026 | PREFIX_GS)) == 0)
4027 prefixes |= PREFIX_DS;
4028 append_seg ();
4029 ptr_reg (code, sizeflag);
4030 }
4031
4032 static void
OP_C(int dummy ATTRIBUTE_UNUSED,int sizeflag ATTRIBUTE_UNUSED)4033 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4034 {
4035 int add = 0;
4036 if (rex & REX_EXTX)
4037 {
4038 USED_REX (REX_EXTX);
4039 add = 8;
4040 }
4041 else if (!mode_64bit && (prefixes & PREFIX_LOCK))
4042 {
4043 used_prefixes |= PREFIX_LOCK;
4044 add = 8;
4045 }
4046 sprintf (scratchbuf, "%%cr%d", reg + add);
4047 oappend (scratchbuf + intel_syntax);
4048 }
4049
4050 static void
OP_D(int dummy ATTRIBUTE_UNUSED,int sizeflag ATTRIBUTE_UNUSED)4051 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4052 {
4053 int add = 0;
4054 USED_REX (REX_EXTX);
4055 if (rex & REX_EXTX)
4056 add = 8;
4057 if (intel_syntax)
4058 sprintf (scratchbuf, "db%d", reg + add);
4059 else
4060 sprintf (scratchbuf, "%%db%d", reg + add);
4061 oappend (scratchbuf);
4062 }
4063
4064 static void
OP_T(int dummy ATTRIBUTE_UNUSED,int sizeflag ATTRIBUTE_UNUSED)4065 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4066 {
4067 sprintf (scratchbuf, "%%tr%d", reg);
4068 oappend (scratchbuf + intel_syntax);
4069 }
4070
4071 static void
OP_Rd(int bytemode,int sizeflag)4072 OP_Rd (int bytemode, int sizeflag)
4073 {
4074 if (mod == 3)
4075 OP_E (bytemode, sizeflag);
4076 else
4077 BadOp ();
4078 }
4079
4080 static void
OP_MMX(int bytemode ATTRIBUTE_UNUSED,int sizeflag ATTRIBUTE_UNUSED)4081 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4082 {
4083 used_prefixes |= (prefixes & PREFIX_DATA);
4084 if (prefixes & PREFIX_DATA)
4085 {
4086 int add = 0;
4087 USED_REX (REX_EXTX);
4088 if (rex & REX_EXTX)
4089 add = 8;
4090 sprintf (scratchbuf, "%%xmm%d", reg + add);
4091 }
4092 else
4093 sprintf (scratchbuf, "%%mm%d", reg);
4094 oappend (scratchbuf + intel_syntax);
4095 }
4096
4097 static void
OP_XMM(int bytemode ATTRIBUTE_UNUSED,int sizeflag ATTRIBUTE_UNUSED)4098 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4099 {
4100 int add = 0;
4101 USED_REX (REX_EXTX);
4102 if (rex & REX_EXTX)
4103 add = 8;
4104 sprintf (scratchbuf, "%%xmm%d", reg + add);
4105 oappend (scratchbuf + intel_syntax);
4106 }
4107
4108 static void
OP_EM(int bytemode,int sizeflag)4109 OP_EM (int bytemode, int sizeflag)
4110 {
4111 if (mod != 3)
4112 {
4113 if (intel_syntax && bytemode == v_mode)
4114 {
4115 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4116 used_prefixes |= (prefixes & PREFIX_DATA);
4117 }
4118 OP_E (bytemode, sizeflag);
4119 return;
4120 }
4121
4122 /* Skip mod/rm byte. */
4123 MODRM_CHECK;
4124 codep++;
4125 used_prefixes |= (prefixes & PREFIX_DATA);
4126 if (prefixes & PREFIX_DATA)
4127 {
4128 int add = 0;
4129
4130 USED_REX (REX_EXTZ);
4131 if (rex & REX_EXTZ)
4132 add = 8;
4133 sprintf (scratchbuf, "%%xmm%d", rm + add);
4134 }
4135 else
4136 sprintf (scratchbuf, "%%mm%d", rm);
4137 oappend (scratchbuf + intel_syntax);
4138 }
4139
4140 static void
OP_EX(int bytemode,int sizeflag)4141 OP_EX (int bytemode, int sizeflag)
4142 {
4143 int add = 0;
4144 if (mod != 3)
4145 {
4146 if (intel_syntax && bytemode == v_mode)
4147 {
4148 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4149 {
4150 case 0: bytemode = x_mode; break;
4151 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4152 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4153 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4154 default: bytemode = 0; break;
4155 }
4156 }
4157 OP_E (bytemode, sizeflag);
4158 return;
4159 }
4160 USED_REX (REX_EXTZ);
4161 if (rex & REX_EXTZ)
4162 add = 8;
4163
4164 /* Skip mod/rm byte. */
4165 MODRM_CHECK;
4166 codep++;
4167 sprintf (scratchbuf, "%%xmm%d", rm + add);
4168 oappend (scratchbuf + intel_syntax);
4169 }
4170
4171 static void
OP_MS(int bytemode,int sizeflag)4172 OP_MS (int bytemode, int sizeflag)
4173 {
4174 if (mod == 3)
4175 OP_EM (bytemode, sizeflag);
4176 else
4177 BadOp ();
4178 }
4179
4180 static void
OP_XS(int bytemode,int sizeflag)4181 OP_XS (int bytemode, int sizeflag)
4182 {
4183 if (mod == 3)
4184 OP_EX (bytemode, sizeflag);
4185 else
4186 BadOp ();
4187 }
4188
4189 static void
OP_M(int bytemode,int sizeflag)4190 OP_M (int bytemode, int sizeflag)
4191 {
4192 if (mod == 3)
4193 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4194 else
4195 OP_E (bytemode, sizeflag);
4196 }
4197
4198 static void
OP_0f07(int bytemode,int sizeflag)4199 OP_0f07 (int bytemode, int sizeflag)
4200 {
4201 if (mod != 3 || rm != 0)
4202 BadOp ();
4203 else
4204 OP_E (bytemode, sizeflag);
4205 }
4206
4207 static void
OP_0fae(int bytemode,int sizeflag)4208 OP_0fae (int bytemode, int sizeflag)
4209 {
4210 if (mod == 3)
4211 {
4212 if (reg == 7)
4213 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4214
4215 if (reg < 5 || rm != 0)
4216 {
4217 BadOp (); /* bad sfence, mfence, or lfence */
4218 return;
4219 }
4220 }
4221 else if (reg != 7)
4222 {
4223 BadOp (); /* bad clflush */
4224 return;
4225 }
4226
4227 OP_E (bytemode, sizeflag);
4228 }
4229
4230 static void
NOP_Fixup(int bytemode ATTRIBUTE_UNUSED,int sizeflag ATTRIBUTE_UNUSED)4231 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4232 {
4233 /* NOP with REPZ prefix is called PAUSE. */
4234 if (prefixes == PREFIX_REPZ)
4235 strcpy (obuf, "pause");
4236 }
4237
4238 static const char *const Suffix3DNow[] = {
4239 /* 00 */ NULL, NULL, NULL, NULL,
4240 /* 04 */ NULL, NULL, NULL, NULL,
4241 /* 08 */ NULL, NULL, NULL, NULL,
4242 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
4243 /* 10 */ NULL, NULL, NULL, NULL,
4244 /* 14 */ NULL, NULL, NULL, NULL,
4245 /* 18 */ NULL, NULL, NULL, NULL,
4246 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
4247 /* 20 */ NULL, NULL, NULL, NULL,
4248 /* 24 */ NULL, NULL, NULL, NULL,
4249 /* 28 */ NULL, NULL, NULL, NULL,
4250 /* 2C */ NULL, NULL, NULL, NULL,
4251 /* 30 */ NULL, NULL, NULL, NULL,
4252 /* 34 */ NULL, NULL, NULL, NULL,
4253 /* 38 */ NULL, NULL, NULL, NULL,
4254 /* 3C */ NULL, NULL, NULL, NULL,
4255 /* 40 */ NULL, NULL, NULL, NULL,
4256 /* 44 */ NULL, NULL, NULL, NULL,
4257 /* 48 */ NULL, NULL, NULL, NULL,
4258 /* 4C */ NULL, NULL, NULL, NULL,
4259 /* 50 */ NULL, NULL, NULL, NULL,
4260 /* 54 */ NULL, NULL, NULL, NULL,
4261 /* 58 */ NULL, NULL, NULL, NULL,
4262 /* 5C */ NULL, NULL, NULL, NULL,
4263 /* 60 */ NULL, NULL, NULL, NULL,
4264 /* 64 */ NULL, NULL, NULL, NULL,
4265 /* 68 */ NULL, NULL, NULL, NULL,
4266 /* 6C */ NULL, NULL, NULL, NULL,
4267 /* 70 */ NULL, NULL, NULL, NULL,
4268 /* 74 */ NULL, NULL, NULL, NULL,
4269 /* 78 */ NULL, NULL, NULL, NULL,
4270 /* 7C */ NULL, NULL, NULL, NULL,
4271 /* 80 */ NULL, NULL, NULL, NULL,
4272 /* 84 */ NULL, NULL, NULL, NULL,
4273 /* 88 */ NULL, NULL, "pfnacc", NULL,
4274 /* 8C */ NULL, NULL, "pfpnacc", NULL,
4275 /* 90 */ "pfcmpge", NULL, NULL, NULL,
4276 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4277 /* 98 */ NULL, NULL, "pfsub", NULL,
4278 /* 9C */ NULL, NULL, "pfadd", NULL,
4279 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
4280 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4281 /* A8 */ NULL, NULL, "pfsubr", NULL,
4282 /* AC */ NULL, NULL, "pfacc", NULL,
4283 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
4284 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
4285 /* B8 */ NULL, NULL, NULL, "pswapd",
4286 /* BC */ NULL, NULL, NULL, "pavgusb",
4287 /* C0 */ NULL, NULL, NULL, NULL,
4288 /* C4 */ NULL, NULL, NULL, NULL,
4289 /* C8 */ NULL, NULL, NULL, NULL,
4290 /* CC */ NULL, NULL, NULL, NULL,
4291 /* D0 */ NULL, NULL, NULL, NULL,
4292 /* D4 */ NULL, NULL, NULL, NULL,
4293 /* D8 */ NULL, NULL, NULL, NULL,
4294 /* DC */ NULL, NULL, NULL, NULL,
4295 /* E0 */ NULL, NULL, NULL, NULL,
4296 /* E4 */ NULL, NULL, NULL, NULL,
4297 /* E8 */ NULL, NULL, NULL, NULL,
4298 /* EC */ NULL, NULL, NULL, NULL,
4299 /* F0 */ NULL, NULL, NULL, NULL,
4300 /* F4 */ NULL, NULL, NULL, NULL,
4301 /* F8 */ NULL, NULL, NULL, NULL,
4302 /* FC */ NULL, NULL, NULL, NULL,
4303 };
4304
4305 static void
OP_3DNowSuffix(int bytemode ATTRIBUTE_UNUSED,int sizeflag ATTRIBUTE_UNUSED)4306 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4307 {
4308 const char *mnemonic;
4309
4310 FETCH_DATA (the_info, codep + 1);
4311 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4312 place where an 8-bit immediate would normally go. ie. the last
4313 byte of the instruction. */
4314 obufp = obuf + strlen (obuf);
4315 mnemonic = Suffix3DNow[*codep++ & 0xff];
4316 if (mnemonic)
4317 oappend (mnemonic);
4318 else
4319 {
4320 /* Since a variable sized modrm/sib chunk is between the start
4321 of the opcode (0x0f0f) and the opcode suffix, we need to do
4322 all the modrm processing first, and don't know until now that
4323 we have a bad opcode. This necessitates some cleaning up. */
4324 op1out[0] = '\0';
4325 op2out[0] = '\0';
4326 BadOp ();
4327 }
4328 }
4329
4330 static const char *simd_cmp_op[] = {
4331 "eq",
4332 "lt",
4333 "le",
4334 "unord",
4335 "neq",
4336 "nlt",
4337 "nle",
4338 "ord"
4339 };
4340
4341 static void
OP_SIMD_Suffix(int bytemode ATTRIBUTE_UNUSED,int sizeflag ATTRIBUTE_UNUSED)4342 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4343 {
4344 unsigned int cmp_type;
4345
4346 FETCH_DATA (the_info, codep + 1);
4347 obufp = obuf + strlen (obuf);
4348 cmp_type = *codep++ & 0xff;
4349 if (cmp_type < 8)
4350 {
4351 char suffix1 = 'p', suffix2 = 's';
4352 used_prefixes |= (prefixes & PREFIX_REPZ);
4353 if (prefixes & PREFIX_REPZ)
4354 suffix1 = 's';
4355 else
4356 {
4357 used_prefixes |= (prefixes & PREFIX_DATA);
4358 if (prefixes & PREFIX_DATA)
4359 suffix2 = 'd';
4360 else
4361 {
4362 used_prefixes |= (prefixes & PREFIX_REPNZ);
4363 if (prefixes & PREFIX_REPNZ)
4364 suffix1 = 's', suffix2 = 'd';
4365 }
4366 }
4367 sprintf (scratchbuf, "cmp%s%c%c",
4368 simd_cmp_op[cmp_type], suffix1, suffix2);
4369 used_prefixes |= (prefixes & PREFIX_REPZ);
4370 oappend (scratchbuf);
4371 }
4372 else
4373 {
4374 /* We have a bad extension byte. Clean up. */
4375 op1out[0] = '\0';
4376 op2out[0] = '\0';
4377 BadOp ();
4378 }
4379 }
4380
4381 static void
SIMD_Fixup(int extrachar,int sizeflag ATTRIBUTE_UNUSED)4382 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4383 {
4384 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4385 forms of these instructions. */
4386 if (mod == 3)
4387 {
4388 char *p = obuf + strlen (obuf);
4389 *(p + 1) = '\0';
4390 *p = *(p - 1);
4391 *(p - 1) = *(p - 2);
4392 *(p - 2) = *(p - 3);
4393 *(p - 3) = extrachar;
4394 }
4395 }
4396
4397 static void
PNI_Fixup(int extrachar ATTRIBUTE_UNUSED,int sizeflag)4398 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4399 {
4400 if (mod == 3 && reg == 1 && rm <= 1)
4401 {
4402 /* Override "sidt". */
4403 char *p = obuf + strlen (obuf) - 4;
4404
4405 /* We might have a suffix. */
4406 if (*p == 'i')
4407 --p;
4408
4409 if (rm)
4410 {
4411 /* mwait %eax,%ecx */
4412 strcpy (p, "mwait");
4413 if (!intel_syntax)
4414 strcpy (op1out, names32[0]);
4415 }
4416 else
4417 {
4418 /* monitor %eax,%ecx,%edx" */
4419 strcpy (p, "monitor");
4420 if (!intel_syntax)
4421 {
4422 if (!mode_64bit)
4423 strcpy (op1out, names32[0]);
4424 else if (!(prefixes & PREFIX_ADDR))
4425 strcpy (op1out, names64[0]);
4426 else
4427 {
4428 strcpy (op1out, names32[0]);
4429 used_prefixes |= PREFIX_ADDR;
4430 }
4431 strcpy (op3out, names32[2]);
4432 }
4433 }
4434 if (!intel_syntax)
4435 {
4436 strcpy (op2out, names32[1]);
4437 two_source_ops = 1;
4438 }
4439
4440 codep++;
4441 }
4442 else
4443 OP_M (0, sizeflag);
4444 }
4445
4446 static void
SVME_Fixup(int bytemode,int sizeflag)4447 SVME_Fixup (int bytemode, int sizeflag)
4448 {
4449 const char *alt;
4450 char *p;
4451
4452 switch (*codep)
4453 {
4454 case 0xd8:
4455 alt = "vmrun";
4456 break;
4457 case 0xd9:
4458 alt = "vmmcall";
4459 break;
4460 case 0xda:
4461 alt = "vmload";
4462 break;
4463 case 0xdb:
4464 alt = "vmsave";
4465 break;
4466 case 0xdc:
4467 alt = "stgi";
4468 break;
4469 case 0xdd:
4470 alt = "clgi";
4471 break;
4472 case 0xde:
4473 alt = "skinit";
4474 break;
4475 case 0xdf:
4476 alt = "invlpga";
4477 break;
4478 default:
4479 OP_M (bytemode, sizeflag);
4480 return;
4481 }
4482 /* Override "lidt". */
4483 p = obuf + strlen (obuf) - 4;
4484 /* We might have a suffix. */
4485 if (*p == 'i')
4486 --p;
4487 strcpy (p, alt);
4488 if (!(prefixes & PREFIX_ADDR))
4489 {
4490 ++codep;
4491 return;
4492 }
4493 used_prefixes |= PREFIX_ADDR;
4494 switch (*codep++)
4495 {
4496 case 0xdf:
4497 strcpy (op2out, names32[1]);
4498 two_source_ops = 1;
4499 /* Fall through. */
4500 case 0xd8:
4501 case 0xda:
4502 case 0xdb:
4503 *obufp++ = open_char;
4504 if (mode_64bit || (sizeflag & AFLAG))
4505 alt = names32[0];
4506 else
4507 alt = names16[0];
4508 strcpy (obufp, alt);
4509 obufp += strlen (alt);
4510 *obufp++ = close_char;
4511 *obufp = '\0';
4512 break;
4513 }
4514 }
4515
4516 static void
INVLPG_Fixup(int bytemode,int sizeflag)4517 INVLPG_Fixup (int bytemode, int sizeflag)
4518 {
4519 const char *alt;
4520
4521 switch (*codep)
4522 {
4523 case 0xf8:
4524 alt = "swapgs";
4525 break;
4526 case 0xf9:
4527 alt = "rdtscp";
4528 break;
4529 default:
4530 OP_M (bytemode, sizeflag);
4531 return;
4532 }
4533 /* Override "invlpg". */
4534 strcpy (obuf + strlen (obuf) - 6, alt);
4535 codep++;
4536 }
4537
4538 static void
BadOp(void)4539 BadOp (void)
4540 {
4541 /* Throw away prefixes and 1st. opcode byte. */
4542 codep = insn_codep + 1;
4543 oappend ("(bad)");
4544 }
4545
4546 static void
SEG_Fixup(int extrachar,int sizeflag)4547 SEG_Fixup (int extrachar, int sizeflag)
4548 {
4549 if (mod == 3)
4550 {
4551 /* We need to add a proper suffix with
4552
4553 movw %ds,%ax
4554 movl %ds,%eax
4555 movq %ds,%rax
4556 movw %ax,%ds
4557 movl %eax,%ds
4558 movq %rax,%ds
4559 */
4560 const char *suffix;
4561
4562 if (prefixes & PREFIX_DATA)
4563 suffix = "w";
4564 else
4565 {
4566 USED_REX (REX_MODE64);
4567 if (rex & REX_MODE64)
4568 suffix = "q";
4569 else
4570 suffix = "l";
4571 }
4572 strcat (obuf, suffix);
4573 }
4574 else
4575 {
4576 /* We need to fix the suffix for
4577
4578 movw %ds,(%eax)
4579 movw %ds,(%rax)
4580 movw (%eax),%ds
4581 movw (%rax),%ds
4582
4583 Override "mov[l|q]". */
4584 char *p = obuf + strlen (obuf) - 1;
4585
4586 /* We might not have a suffix. */
4587 if (*p == 'v')
4588 ++p;
4589 *p = 'w';
4590 }
4591
4592 OP_E (extrachar, sizeflag);
4593 }
4594