1 /* Disassemble AVR instructions.
2    Copyright 1999, 2000, 2002, 2004, 2005 Free Software Foundation, Inc.
3 
4    Contributed by Denis Chertykov <denisc@overta.ru>
5 
6    This program is free software; you can redistribute it and/or modify
7    it under the terms of the GNU General Public License as published by
8    the Free Software Foundation; either version 2 of the License, or
9    (at your option) any later version.
10 
11    This program is distributed in the hope that it will be useful,
12    but WITHOUT ANY WARRANTY; without even the implied warranty of
13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14    GNU General Public License for more details.
15 
16    You should have received a copy of the GNU General Public License
17    along with this program; if not, write to the Free Software
18    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
19 
20 #include <assert.h>
21 #include "sysdep.h"
22 #include "dis-asm.h"
23 #include "opintl.h"
24 #include "libiberty.h"
25 
26 struct avr_opcodes_s
27 {
28   char *name;
29   char *constraints;
30   char *opcode;
31   int insn_size;		/* In words.  */
32   int isa;
33   unsigned int bin_opcode;
34 };
35 
36 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
37 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
38 
39 const struct avr_opcodes_s avr_opcodes[] =
40 {
41   #include "opcode/avr.h"
42   {NULL, NULL, NULL, 0, 0, 0}
43 };
44 
45 static int
avr_operand(unsigned int insn,unsigned int insn2,unsigned int pc,int constraint,char * buf,char * comment,int regs,int * sym,bfd_vma * sym_addr)46 avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
47              char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
48 {
49   int ok = 1;
50   *sym = 0;
51 
52   switch (constraint)
53     {
54       /* Any register operand.  */
55     case 'r':
56       if (regs)
57 	insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* Source register.  */
58       else
59 	insn = (insn & 0x01f0) >> 4; /* Destination register.  */
60 
61       sprintf (buf, "r%d", insn);
62       break;
63 
64     case 'd':
65       if (regs)
66 	sprintf (buf, "r%d", 16 + (insn & 0xf));
67       else
68 	sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
69       break;
70 
71     case 'w':
72       sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
73       break;
74 
75     case 'a':
76       if (regs)
77 	sprintf (buf, "r%d", 16 + (insn & 7));
78       else
79 	sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
80       break;
81 
82     case 'v':
83       if (regs)
84 	sprintf (buf, "r%d", (insn & 0xf) * 2);
85       else
86 	sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
87       break;
88 
89     case 'e':
90       {
91 	char *xyz;
92 
93 	switch (insn & 0x100f)
94 	  {
95 	    case 0x0000: xyz = "Z";  break;
96 	    case 0x1001: xyz = "Z+"; break;
97 	    case 0x1002: xyz = "-Z"; break;
98 	    case 0x0008: xyz = "Y";  break;
99 	    case 0x1009: xyz = "Y+"; break;
100 	    case 0x100a: xyz = "-Y"; break;
101 	    case 0x100c: xyz = "X";  break;
102 	    case 0x100d: xyz = "X+"; break;
103 	    case 0x100e: xyz = "-X"; break;
104 	    default: xyz = "??"; ok = 0;
105 	  }
106 	sprintf (buf, xyz);
107 
108 	if (AVR_UNDEF_P (insn))
109 	  sprintf (comment, _("undefined"));
110       }
111       break;
112 
113     case 'z':
114       *buf++ = 'Z';
115       if (insn & 0x1)
116 	*buf++ = '+';
117       *buf = '\0';
118       if (AVR_UNDEF_P (insn))
119 	sprintf (comment, _("undefined"));
120       break;
121 
122     case 'b':
123       {
124 	unsigned int x;
125 
126 	x = (insn & 7);
127 	x |= (insn >> 7) & (3 << 3);
128 	x |= (insn >> 8) & (1 << 5);
129 
130 	if (insn & 0x8)
131 	  *buf++ = 'Y';
132 	else
133 	  *buf++ = 'Z';
134 	sprintf (buf, "+%d", x);
135 	sprintf (comment, "0x%02x", x);
136       }
137       break;
138 
139     case 'h':
140       *sym = 1;
141       *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
142       sprintf (buf, "0x");
143       break;
144 
145     case 'L':
146       {
147 	int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
148 	sprintf (buf, ".%+-8d", rel_addr);
149         *sym = 1;
150         *sym_addr = pc + 2 + rel_addr;
151 	sprintf (comment, "0x");
152       }
153       break;
154 
155     case 'l':
156       {
157 	int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
158 	sprintf (buf, ".%+-8d", rel_addr);
159         *sym = 1;
160         *sym_addr = pc + 2 + rel_addr;
161 	sprintf (comment, "0x");
162       }
163       break;
164 
165     case 'i':
166       sprintf (buf, "0x%04X", insn2);
167       break;
168 
169     case 'M':
170       sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
171       sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
172       break;
173 
174     case 'n':
175       sprintf (buf, "??");
176       fprintf (stderr, _("Internal disassembler error"));
177       ok = 0;
178       break;
179 
180     case 'K':
181       {
182 	unsigned int x;
183 
184 	x = (insn & 0xf) | ((insn >> 2) & 0x30);
185 	sprintf (buf, "0x%02x", x);
186 	sprintf (comment, "%d", x);
187       }
188       break;
189 
190     case 's':
191       sprintf (buf, "%d", insn & 7);
192       break;
193 
194     case 'S':
195       sprintf (buf, "%d", (insn >> 4) & 7);
196       break;
197 
198     case 'P':
199       {
200 	unsigned int x;
201 
202 	x = (insn & 0xf);
203 	x |= (insn >> 5) & 0x30;
204 	sprintf (buf, "0x%02x", x);
205 	sprintf (comment, "%d", x);
206       }
207       break;
208 
209     case 'p':
210       {
211 	unsigned int x;
212 
213 	x = (insn >> 3) & 0x1f;
214 	sprintf (buf, "0x%02x", x);
215 	sprintf (comment, "%d", x);
216       }
217       break;
218 
219     case '?':
220       *buf = '\0';
221       break;
222 
223     default:
224       sprintf (buf, "??");
225       fprintf (stderr, _("unknown constraint `%c'"), constraint);
226       ok = 0;
227     }
228 
229     return ok;
230 }
231 
232 static unsigned short
avrdis_opcode(bfd_vma addr,disassemble_info * info)233 avrdis_opcode (bfd_vma addr, disassemble_info *info)
234 {
235   bfd_byte buffer[2];
236   int status;
237 
238   status = info->read_memory_func (addr, buffer, 2, info);
239 
240   if (status == 0)
241     return bfd_getl16 (buffer);
242 
243   info->memory_error_func (status, addr, info);
244   return -1;
245 }
246 
247 
248 int
print_insn_avr(bfd_vma addr,disassemble_info * info)249 print_insn_avr (bfd_vma addr, disassemble_info *info)
250 {
251   unsigned int insn, insn2;
252   const struct avr_opcodes_s *opcode;
253   static unsigned int *maskptr;
254   void *stream = info->stream;
255   fprintf_ftype prin = info->fprintf_func;
256   static unsigned int *avr_bin_masks;
257   static int initialized;
258   int cmd_len = 2;
259   int ok = 0;
260   char op1[20], op2[20], comment1[40], comment2[40];
261   int sym_op1 = 0, sym_op2 = 0;
262   bfd_vma sym_addr1, sym_addr2;
263 
264   if (!initialized)
265     {
266       unsigned int nopcodes;
267 
268       nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
269 
270       avr_bin_masks = xmalloc (nopcodes * sizeof (unsigned int));
271 
272       for (opcode = avr_opcodes, maskptr = avr_bin_masks;
273 	   opcode->name;
274 	   opcode++, maskptr++)
275 	{
276 	  char * s;
277 	  unsigned int bin = 0;
278 	  unsigned int mask = 0;
279 
280 	  for (s = opcode->opcode; *s; ++s)
281 	    {
282 	      bin <<= 1;
283 	      mask <<= 1;
284 	      bin |= (*s == '1');
285 	      mask |= (*s == '1' || *s == '0');
286 	    }
287 	  assert (s - opcode->opcode == 16);
288 	  assert (opcode->bin_opcode == bin);
289 	  *maskptr = mask;
290 	}
291 
292       initialized = 1;
293     }
294 
295   insn = avrdis_opcode (addr, info);
296 
297   for (opcode = avr_opcodes, maskptr = avr_bin_masks;
298        opcode->name;
299        opcode++, maskptr++)
300     if ((insn & *maskptr) == opcode->bin_opcode)
301       break;
302 
303   /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
304      `std b+0,r' as `st b,r' (next entry in the table).  */
305 
306   if (AVR_DISP0_P (insn))
307     opcode++;
308 
309   op1[0] = 0;
310   op2[0] = 0;
311   comment1[0] = 0;
312   comment2[0] = 0;
313 
314   if (opcode->name)
315     {
316       char *op = opcode->constraints;
317 
318       insn2 = 0;
319       ok = 1;
320 
321       if (opcode->insn_size > 1)
322 	{
323 	  insn2 = avrdis_opcode (addr + 2, info);
324 	  cmd_len = 4;
325 	}
326 
327       if (*op && *op != '?')
328 	{
329 	  int regs = REGISTER_P (*op);
330 
331 	  ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0, &sym_op1, &sym_addr1);
332 
333 	  if (ok && *(++op) == ',')
334 	    ok = avr_operand (insn, insn2, addr, *(++op), op2,
335 			      *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);
336 	}
337     }
338 
339   if (!ok)
340     {
341       /* Unknown opcode, or invalid combination of operands.  */
342       sprintf (op1, "0x%04x", insn);
343       op2[0] = 0;
344       sprintf (comment1, "????");
345       comment2[0] = 0;
346     }
347 
348   (*prin) (stream, "%s", ok ? opcode->name : ".word");
349 
350   if (*op1)
351       (*prin) (stream, "\t%s", op1);
352 
353   if (*op2)
354     (*prin) (stream, ", %s", op2);
355 
356   if (*comment1)
357     (*prin) (stream, "\t; %s", comment1);
358 
359   if (sym_op1)
360     info->print_address_func (sym_addr1, info);
361 
362   if (*comment2)
363     (*prin) (stream, " %s", comment2);
364 
365   if (sym_op2)
366     info->print_address_func (sym_addr2, info);
367 
368   return cmd_len;
369 }
370