1 /* Target-dependent code for the NEC V850 for GDB, the GNU debugger.
2 
3    Copyright 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free
4    Software Foundation, Inc.
5 
6    This file is part of GDB.
7 
8    This program is free software; you can redistribute it and/or modify
9    it under the terms of the GNU General Public License as published by
10    the Free Software Foundation; either version 2 of the License, or
11    (at your option) any later version.
12 
13    This program is distributed in the hope that it will be useful,
14    but WITHOUT ANY WARRANTY; without even the implied warranty of
15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16    GNU General Public License for more details.
17 
18    You should have received a copy of the GNU General Public License
19    along with this program; if not, write to the Free Software
20    Foundation, Inc., 59 Temple Place - Suite 330,
21    Boston, MA 02111-1307, USA.  */
22 
23 #include "defs.h"
24 #include "frame.h"
25 #include "frame-base.h"
26 #include "trad-frame.h"
27 #include "frame-unwind.h"
28 #include "dwarf2-frame.h"
29 #include "gdbtypes.h"
30 #include "inferior.h"
31 #include "gdb_string.h"
32 #include "gdb_assert.h"
33 #include "gdbcore.h"
34 #include "arch-utils.h"
35 #include "regcache.h"
36 #include "dis-asm.h"
37 #include "osabi.h"
38 
39 enum
40   {
41     E_R0_REGNUM,
42     E_R1_REGNUM,
43     E_R2_REGNUM,
44     E_R3_REGNUM, E_SP_REGNUM = E_R3_REGNUM,
45     E_R4_REGNUM,
46     E_R5_REGNUM,
47     E_R6_REGNUM, E_ARG0_REGNUM = E_R6_REGNUM,
48     E_R7_REGNUM,
49     E_R8_REGNUM,
50     E_R9_REGNUM, E_ARGLAST_REGNUM = E_R9_REGNUM,
51     E_R10_REGNUM, E_V0_REGNUM = E_R10_REGNUM,
52     E_R11_REGNUM, E_V1_REGNUM = E_R11_REGNUM,
53     E_R12_REGNUM,
54     E_R13_REGNUM,
55     E_R14_REGNUM,
56     E_R15_REGNUM,
57     E_R16_REGNUM,
58     E_R17_REGNUM,
59     E_R18_REGNUM,
60     E_R19_REGNUM,
61     E_R20_REGNUM,
62     E_R21_REGNUM,
63     E_R22_REGNUM,
64     E_R23_REGNUM,
65     E_R24_REGNUM,
66     E_R25_REGNUM,
67     E_R26_REGNUM,
68     E_R27_REGNUM,
69     E_R28_REGNUM,
70     E_R29_REGNUM, E_FP_REGNUM = E_R29_REGNUM,
71     E_R30_REGNUM, E_EP_REGNUM = E_R30_REGNUM,
72     E_R31_REGNUM, E_LP_REGNUM = E_R31_REGNUM,
73     E_R32_REGNUM, E_SR0_REGNUM = E_R32_REGNUM,
74     E_R33_REGNUM,
75     E_R34_REGNUM,
76     E_R35_REGNUM,
77     E_R36_REGNUM,
78     E_R37_REGNUM, E_PS_REGNUM = E_R37_REGNUM,
79     E_R38_REGNUM,
80     E_R39_REGNUM,
81     E_R40_REGNUM,
82     E_R41_REGNUM,
83     E_R42_REGNUM,
84     E_R43_REGNUM,
85     E_R44_REGNUM,
86     E_R45_REGNUM,
87     E_R46_REGNUM,
88     E_R47_REGNUM,
89     E_R48_REGNUM,
90     E_R49_REGNUM,
91     E_R50_REGNUM,
92     E_R51_REGNUM,
93     E_R52_REGNUM, E_CTBP_REGNUM = E_R52_REGNUM,
94     E_R53_REGNUM,
95     E_R54_REGNUM,
96     E_R55_REGNUM,
97     E_R56_REGNUM,
98     E_R57_REGNUM,
99     E_R58_REGNUM,
100     E_R59_REGNUM,
101     E_R60_REGNUM,
102     E_R61_REGNUM,
103     E_R62_REGNUM,
104     E_R63_REGNUM,
105     E_R64_REGNUM, E_PC_REGNUM = E_R64_REGNUM,
106     E_R65_REGNUM,
107     E_NUM_REGS
108   };
109 
110 enum
111 {
112   v850_reg_size = 4
113 };
114 
115 /* Size of return datatype which fits into all return registers.  */
116 enum
117 {
118   E_MAX_RETTYPE_SIZE_IN_REGS = 2 * v850_reg_size
119 };
120 
121 struct v850_frame_cache
122 {
123   /* Base address.  */
124   CORE_ADDR base;
125   LONGEST sp_offset;
126   CORE_ADDR pc;
127 
128   /* Flag showing that a frame has been created in the prologue code.  */
129   int uses_fp;
130 
131   /* Saved registers.  */
132   struct trad_frame_saved_reg *saved_regs;
133 };
134 
135 /* Info gleaned from scanning a function's prologue.  */
136 struct pifsr		/* Info about one saved register.  */
137 {
138   int offset;		/* Offset from sp or fp.  */
139   int cur_frameoffset;	/* Current frameoffset.  */
140   int reg;		/* Saved register number.  */
141 };
142 
143 static const char *
v850_register_name(int regnum)144 v850_register_name (int regnum)
145 {
146   static const char *v850_reg_names[] =
147   { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
148     "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
149     "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
150     "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
151     "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
152     "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
153     "sr16", "sr17", "sr18", "sr19", "sr20", "sr21", "sr22", "sr23",
154     "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
155     "pc", "fp"
156   };
157   if (regnum < 0 || regnum >= E_NUM_REGS)
158     return NULL;
159   return v850_reg_names[regnum];
160 }
161 
162 static const char *
v850e_register_name(int regnum)163 v850e_register_name (int regnum)
164 {
165   static const char *v850e_reg_names[] =
166   {
167     "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
168     "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
169     "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
170     "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
171     "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
172     "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
173     "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23",
174     "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
175     "pc", "fp"
176   };
177   if (regnum < 0 || regnum >= E_NUM_REGS)
178     return NULL;
179   return v850e_reg_names[regnum];
180 }
181 
182 /* Returns the default type for register N.  */
183 
184 static struct type *
v850_register_type(struct gdbarch * gdbarch,int regnum)185 v850_register_type (struct gdbarch *gdbarch, int regnum)
186 {
187   if (regnum == E_PC_REGNUM)
188     return builtin_type_void_func_ptr;
189   return builtin_type_int32;
190 }
191 
192 static int
v850_type_is_scalar(struct type * t)193 v850_type_is_scalar (struct type *t)
194 {
195   return (TYPE_CODE (t) != TYPE_CODE_STRUCT
196 	  && TYPE_CODE (t) != TYPE_CODE_UNION
197 	  && TYPE_CODE (t) != TYPE_CODE_ARRAY);
198 }
199 
200 /* Should call_function allocate stack space for a struct return?  */
201 static int
v850_use_struct_convention(struct type * type)202 v850_use_struct_convention (struct type *type)
203 {
204   int i;
205   struct type *fld_type, *tgt_type;
206 
207   /* 1. The value is greater than 8 bytes -> returned by copying.  */
208   if (TYPE_LENGTH (type) > 8)
209     return 1;
210 
211   /* 2. The value is a single basic type -> returned in register.  */
212   if (v850_type_is_scalar (type))
213     return 0;
214 
215   /* The value is a structure or union with a single element and that
216      element is either a single basic type or an array of a single basic
217      type whose size is greater than or equal to 4 -> returned in register.  */
218   if ((TYPE_CODE (type) == TYPE_CODE_STRUCT
219        || TYPE_CODE (type) == TYPE_CODE_UNION)
220        && TYPE_NFIELDS (type) == 1)
221     {
222       fld_type = TYPE_FIELD_TYPE (type, 0);
223       if (v850_type_is_scalar (fld_type) && TYPE_LENGTH (fld_type) >= 4)
224 	return 0;
225 
226       if (TYPE_CODE (fld_type) == TYPE_CODE_ARRAY)
227         {
228 	  tgt_type = TYPE_TARGET_TYPE (fld_type);
229 	  if (v850_type_is_scalar (tgt_type) && TYPE_LENGTH (tgt_type) >= 4)
230 	    return 0;
231 	}
232     }
233 
234   /* The value is a structure whose first element is an integer or a float,
235      and which contains no arrays of more than two elements -> returned in
236      register.  */
237   if (TYPE_CODE (type) == TYPE_CODE_STRUCT
238       && v850_type_is_scalar (TYPE_FIELD_TYPE (type, 0))
239       && TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0)) == 4)
240     {
241       for (i = 1; i < TYPE_NFIELDS (type); ++i)
242         {
243 	  fld_type = TYPE_FIELD_TYPE (type, 0);
244 	  if (TYPE_CODE (fld_type) == TYPE_CODE_ARRAY)
245 	    {
246 	      tgt_type = TYPE_TARGET_TYPE (fld_type);
247 	      if (TYPE_LENGTH (fld_type) >= 0 && TYPE_LENGTH (tgt_type) >= 0
248 		  && TYPE_LENGTH (fld_type) / TYPE_LENGTH (tgt_type) > 2)
249 		return 1;
250 	    }
251 	}
252       return 0;
253     }
254 
255   /* The value is a union which contains at least one field which would be
256      returned in registers according to these rules -> returned in register.  */
257   if (TYPE_CODE (type) == TYPE_CODE_UNION)
258     {
259       for (i = 0; i < TYPE_NFIELDS (type); ++i)
260         {
261 	  fld_type = TYPE_FIELD_TYPE (type, 0);
262 	  if (!v850_use_struct_convention (fld_type))
263 	    return 0;
264 	}
265     }
266 
267   return 1;
268 }
269 
270 /* Structure for mapping bits in register lists to register numbers.  */
271 struct reg_list
272 {
273   long mask;
274   int regno;
275 };
276 
277 /* Helper function for v850_scan_prologue to handle prepare instruction.  */
278 
279 static void
v850_handle_prepare(int insn,int insn2,CORE_ADDR * current_pc_ptr,struct v850_frame_cache * pi,struct pifsr ** pifsr_ptr)280 v850_handle_prepare (int insn, int insn2, CORE_ADDR * current_pc_ptr,
281 		     struct v850_frame_cache *pi, struct pifsr **pifsr_ptr)
282 {
283   CORE_ADDR current_pc = *current_pc_ptr;
284   struct pifsr *pifsr = *pifsr_ptr;
285   long next = insn2 & 0xffff;
286   long list12 = ((insn & 1) << 16) + (next & 0xffe0);
287   long offset = (insn & 0x3e) << 1;
288   static struct reg_list reg_table[] =
289   {
290     {0x00800, 20},		/* r20 */
291     {0x00400, 21},		/* r21 */
292     {0x00200, 22},		/* r22 */
293     {0x00100, 23},		/* r23 */
294     {0x08000, 24},		/* r24 */
295     {0x04000, 25},		/* r25 */
296     {0x02000, 26},		/* r26 */
297     {0x01000, 27},		/* r27 */
298     {0x00080, 28},		/* r28 */
299     {0x00040, 29},		/* r29 */
300     {0x10000, 30},		/* ep */
301     {0x00020, 31},		/* lp */
302     {0, 0}			/* end of table */
303   };
304   int i;
305 
306   if ((next & 0x1f) == 0x0b)		/* skip imm16 argument */
307     current_pc += 2;
308   else if ((next & 0x1f) == 0x13)	/* skip imm16 argument */
309     current_pc += 2;
310   else if ((next & 0x1f) == 0x1b)	/* skip imm32 argument */
311     current_pc += 4;
312 
313   /* Calculate the total size of the saved registers, and add it to the
314      immediate value used to adjust SP.  */
315   for (i = 0; reg_table[i].mask != 0; i++)
316     if (list12 & reg_table[i].mask)
317       offset += v850_reg_size;
318   pi->sp_offset -= offset;
319 
320   /* Calculate the offsets of the registers relative to the value the SP
321      will have after the registers have been pushed and the imm5 value has
322      been subtracted from it.  */
323   if (pifsr)
324     {
325       for (i = 0; reg_table[i].mask != 0; i++)
326 	{
327 	  if (list12 & reg_table[i].mask)
328 	    {
329 	      int reg = reg_table[i].regno;
330 	      offset -= v850_reg_size;
331 	      pifsr->reg = reg;
332 	      pifsr->offset = offset;
333 	      pifsr->cur_frameoffset = pi->sp_offset;
334 	      pifsr++;
335 	    }
336 	}
337     }
338 
339   /* Set result parameters.  */
340   *current_pc_ptr = current_pc;
341   *pifsr_ptr = pifsr;
342 }
343 
344 
345 /* Helper function for v850_scan_prologue to handle pushm/pushl instructions.
346    The SR bit of the register list is not supported.  gcc does not generate
347    this bit.  */
348 
349 static void
v850_handle_pushm(int insn,int insn2,struct v850_frame_cache * pi,struct pifsr ** pifsr_ptr)350 v850_handle_pushm (int insn, int insn2, struct v850_frame_cache *pi,
351 		   struct pifsr **pifsr_ptr)
352 {
353   struct pifsr *pifsr = *pifsr_ptr;
354   long list12 = ((insn & 0x0f) << 16) + (insn2 & 0xfff0);
355   long offset = 0;
356   static struct reg_list pushml_reg_table[] =
357   {
358     {0x80000, E_PS_REGNUM},	/* PSW */
359     {0x40000, 1},		/* r1 */
360     {0x20000, 2},		/* r2 */
361     {0x10000, 3},		/* r3 */
362     {0x00800, 4},		/* r4 */
363     {0x00400, 5},		/* r5 */
364     {0x00200, 6},		/* r6 */
365     {0x00100, 7},		/* r7 */
366     {0x08000, 8},		/* r8 */
367     {0x04000, 9},		/* r9 */
368     {0x02000, 10},		/* r10 */
369     {0x01000, 11},		/* r11 */
370     {0x00080, 12},		/* r12 */
371     {0x00040, 13},		/* r13 */
372     {0x00020, 14},		/* r14 */
373     {0x00010, 15},		/* r15 */
374     {0, 0}			/* end of table */
375   };
376   static struct reg_list pushmh_reg_table[] =
377   {
378     {0x80000, 16},		/* r16 */
379     {0x40000, 17},		/* r17 */
380     {0x20000, 18},		/* r18 */
381     {0x10000, 19},		/* r19 */
382     {0x00800, 20},		/* r20 */
383     {0x00400, 21},		/* r21 */
384     {0x00200, 22},		/* r22 */
385     {0x00100, 23},		/* r23 */
386     {0x08000, 24},		/* r24 */
387     {0x04000, 25},		/* r25 */
388     {0x02000, 26},		/* r26 */
389     {0x01000, 27},		/* r27 */
390     {0x00080, 28},		/* r28 */
391     {0x00040, 29},		/* r29 */
392     {0x00010, 30},		/* r30 */
393     {0x00020, 31},		/* r31 */
394     {0, 0}			/* end of table */
395   };
396   struct reg_list *reg_table;
397   int i;
398 
399   /* Is this a pushml or a pushmh?  */
400   if ((insn2 & 7) == 1)
401     reg_table = pushml_reg_table;
402   else
403     reg_table = pushmh_reg_table;
404 
405   /* Calculate the total size of the saved registers, and add it it to the
406      immediate value used to adjust SP.  */
407   for (i = 0; reg_table[i].mask != 0; i++)
408     if (list12 & reg_table[i].mask)
409       offset += v850_reg_size;
410   pi->sp_offset -= offset;
411 
412   /* Calculate the offsets of the registers relative to the value the SP
413      will have after the registers have been pushed and the imm5 value is
414      subtracted from it.  */
415   if (pifsr)
416     {
417       for (i = 0; reg_table[i].mask != 0; i++)
418 	{
419 	  if (list12 & reg_table[i].mask)
420 	    {
421 	      int reg = reg_table[i].regno;
422 	      offset -= v850_reg_size;
423 	      pifsr->reg = reg;
424 	      pifsr->offset = offset;
425 	      pifsr->cur_frameoffset = pi->sp_offset;
426 	      pifsr++;
427 	    }
428 	}
429     }
430 
431   /* Set result parameters.  */
432   *pifsr_ptr = pifsr;
433 }
434 
435 /* Helper function to evaluate if register is one of the "save" registers.
436    This allows to simplify conditionals in v850_analyze_prologue a lot.  */
437 
438 static int
v850_is_save_register(int reg)439 v850_is_save_register (int reg)
440 {
441  /* The caller-save registers are R2, R20 - R29 and R31.  All other
442     registers are either special purpose (PC, SP), argument registers,
443     or just considered free for use in the caller. */
444  return reg == E_R2_REGNUM
445 	|| (reg >= E_R20_REGNUM && reg <= E_R29_REGNUM)
446 	|| reg == E_R31_REGNUM;
447 }
448 
449 /* Scan the prologue of the function that contains PC, and record what
450    we find in PI.  Returns the pc after the prologue.  Note that the
451    addresses saved in frame->saved_regs are just frame relative (negative
452    offsets from the frame pointer).  This is because we don't know the
453    actual value of the frame pointer yet.  In some circumstances, the
454    frame pointer can't be determined till after we have scanned the
455    prologue.  */
456 
457 static CORE_ADDR
v850_analyze_prologue(CORE_ADDR func_addr,CORE_ADDR pc,struct v850_frame_cache * pi)458 v850_analyze_prologue (CORE_ADDR func_addr, CORE_ADDR pc,
459 		       struct v850_frame_cache *pi)
460 {
461   CORE_ADDR prologue_end, current_pc;
462   struct pifsr pifsrs[E_NUM_REGS + 1];
463   struct pifsr *pifsr, *pifsr_tmp;
464   int fp_used;
465   int ep_used;
466   int reg;
467   CORE_ADDR save_pc, save_end;
468   int regsave_func_p;
469   int r12_tmp;
470 
471   memset (&pifsrs, 0, sizeof pifsrs);
472   pifsr = &pifsrs[0];
473 
474   prologue_end = pc;
475 
476   /* Now, search the prologue looking for instructions that setup fp, save
477      rp, adjust sp and such.  We also record the frame offset of any saved
478      registers.  */
479 
480   pi->sp_offset = 0;
481   pi->uses_fp = 0;
482   ep_used = 0;
483   regsave_func_p = 0;
484   save_pc = 0;
485   save_end = 0;
486   r12_tmp = 0;
487 
488   for (current_pc = func_addr; current_pc < prologue_end;)
489     {
490       int insn;
491       int insn2 = -1; /* dummy value */
492 
493       insn = read_memory_integer (current_pc, 2);
494       current_pc += 2;
495       if ((insn & 0x0780) >= 0x0600)	/* Four byte instruction? */
496 	{
497 	  insn2 = read_memory_integer (current_pc, 2);
498 	  current_pc += 2;
499 	}
500 
501       if ((insn & 0xffc0) == ((10 << 11) | 0x0780) && !regsave_func_p)
502 	{			/* jarl <func>,10 */
503 	  long low_disp = insn2 & ~(long) 1;
504 	  long disp = (((((insn & 0x3f) << 16) + low_disp)
505 			& ~(long) 1) ^ 0x00200000) - 0x00200000;
506 
507 	  save_pc = current_pc;
508 	  save_end = prologue_end;
509 	  regsave_func_p = 1;
510 	  current_pc += disp - 4;
511 	  prologue_end = (current_pc
512 			  + (2 * 3)	/* moves to/from ep */
513 			  + 4		/* addi <const>,sp,sp */
514 			  + 2		/* jmp [r10] */
515 			  + (2 * 12)	/* sst.w to save r2, r20-r29, r31 */
516 			  + 20);	/* slop area */
517 	}
518       else if ((insn & 0xffc0) == 0x0200 && !regsave_func_p)
519 	{			/* callt <imm6> */
520 	  long ctbp = read_register (E_CTBP_REGNUM);
521 	  long adr = ctbp + ((insn & 0x3f) << 1);
522 
523 	  save_pc = current_pc;
524 	  save_end = prologue_end;
525 	  regsave_func_p = 1;
526 	  current_pc = ctbp + (read_memory_unsigned_integer (adr, 2) & 0xffff);
527 	  prologue_end = (current_pc
528 			  + (2 * 3)	/* prepare list2,imm5,sp/imm */
529 			  + 4		/* ctret */
530 			  + 20);	/* slop area */
531 	  continue;
532 	}
533       else if ((insn & 0xffc0) == 0x0780)	/* prepare list2,imm5 */
534 	{
535 	  v850_handle_prepare (insn, insn2, &current_pc, pi, &pifsr);
536 	  continue;
537 	}
538       else if (insn == 0x07e0 && regsave_func_p && insn2 == 0x0144)
539 	{			/* ctret after processing register save.  */
540 	  current_pc = save_pc;
541 	  prologue_end = save_end;
542 	  regsave_func_p = 0;
543 	  continue;
544 	}
545       else if ((insn & 0xfff0) == 0x07e0 && (insn2 & 5) == 1)
546 	{			/* pushml, pushmh */
547 	  v850_handle_pushm (insn, insn2, pi, &pifsr);
548 	  continue;
549 	}
550       else if ((insn & 0xffe0) == 0x0060 && regsave_func_p)
551 	{			/* jmp after processing register save.  */
552 	  current_pc = save_pc;
553 	  prologue_end = save_end;
554 	  regsave_func_p = 0;
555 	  continue;
556 	}
557       else if ((insn & 0x07c0) == 0x0780	/* jarl or jr */
558 	       || (insn & 0xffe0) == 0x0060	/* jmp */
559 	       || (insn & 0x0780) == 0x0580)	/* branch */
560 	{
561 	  break;		/* Ran into end of prologue */
562 	}
563 
564       else if ((insn & 0xffe0) == ((E_SP_REGNUM << 11) | 0x0240))
565         /* add <imm>,sp */
566 	pi->sp_offset += ((insn & 0x1f) ^ 0x10) - 0x10;
567       else if (insn == ((E_SP_REGNUM << 11) | 0x0600 | E_SP_REGNUM))
568         /* addi <imm>,sp,sp */
569 	pi->sp_offset += insn2;
570       else if (insn == ((E_FP_REGNUM << 11) | 0x0000 | E_SP_REGNUM))
571         /* mov sp,fp */
572 	pi->uses_fp = 1;
573       else if (insn == ((E_R12_REGNUM << 11) | 0x0640 | E_R0_REGNUM))
574         /* movhi hi(const),r0,r12 */
575 	r12_tmp = insn2 << 16;
576       else if (insn == ((E_R12_REGNUM << 11) | 0x0620 | E_R12_REGNUM))
577         /* movea lo(const),r12,r12 */
578 	r12_tmp += insn2;
579       else if (insn == ((E_SP_REGNUM << 11) | 0x01c0 | E_R12_REGNUM) && r12_tmp)
580         /* add r12,sp */
581 	pi->sp_offset += r12_tmp;
582       else if (insn == ((E_EP_REGNUM << 11) | 0x0000 | E_SP_REGNUM))
583         /* mov sp,ep */
584 	ep_used = 1;
585       else if (insn == ((E_EP_REGNUM << 11) | 0x0000 | E_R1_REGNUM))
586         /* mov r1,ep */
587 	ep_used = 0;
588       else if (((insn & 0x07ff) == (0x0760 | E_SP_REGNUM)
589 		|| (pi->uses_fp
590 		    && (insn & 0x07ff) == (0x0760 | E_FP_REGNUM)))
591 	       && pifsr
592 	       && v850_is_save_register (reg = (insn >> 11) & 0x1f))
593 	{
594 	  /* st.w <reg>,<offset>[sp] or st.w <reg>,<offset>[fp] */
595 	  pifsr->reg = reg;
596 	  pifsr->offset = insn2 & ~1;
597 	  pifsr->cur_frameoffset = pi->sp_offset;
598 	  pifsr++;
599 	}
600       else if (ep_used
601 	       && ((insn & 0x0781) == 0x0501)
602 	       && pifsr
603 	       && v850_is_save_register (reg = (insn >> 11) & 0x1f))
604 	{
605 	  /* sst.w <reg>,<offset>[ep] */
606 	  pifsr->reg = reg;
607 	  pifsr->offset = (insn & 0x007e) << 1;
608 	  pifsr->cur_frameoffset = pi->sp_offset;
609 	  pifsr++;
610 	}
611     }
612 
613   /* Fix up any offsets to the final offset.  If a frame pointer was created,
614      use it instead of the stack pointer.  */
615   for (pifsr_tmp = pifsrs; pifsr_tmp != pifsr; pifsr_tmp++)
616     {
617       pifsr_tmp->offset -= pi->sp_offset - pifsr_tmp->cur_frameoffset;
618       pi->saved_regs[pifsr_tmp->reg].addr = pifsr_tmp->offset;
619     }
620 
621   return current_pc;
622 }
623 
624 /* Return the address of the first code past the prologue of the function.  */
625 
626 static CORE_ADDR
v850_skip_prologue(CORE_ADDR pc)627 v850_skip_prologue (CORE_ADDR pc)
628 {
629   CORE_ADDR func_addr, func_end;
630 
631   /* See what the symbol table says */
632 
633   if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
634     {
635       struct symtab_and_line sal;
636 
637       sal = find_pc_line (func_addr, 0);
638       if (sal.line != 0 && sal.end < func_end)
639 	return sal.end;
640 
641       /* Either there's no line info, or the line after the prologue is after
642 	 the end of the function.  In this case, there probably isn't a
643 	 prologue.  */
644       return pc;
645     }
646 
647   /* We can't find the start of this function, so there's nothing we can do.  */
648   return pc;
649 }
650 
651 static CORE_ADDR
v850_frame_align(struct gdbarch * ignore,CORE_ADDR sp)652 v850_frame_align (struct gdbarch *ignore, CORE_ADDR sp)
653 {
654   return sp & ~3;
655 }
656 
657 /* Setup arguments and LP for a call to the target.  First four args
658    go in R6->R9, subsequent args go into sp + 16 -> sp + ...  Structs
659    are passed by reference.  64 bit quantities (doubles and long longs)
660    may be split between the regs and the stack.  When calling a function
661    that returns a struct, a pointer to the struct is passed in as a secret
662    first argument (always in R6).
663 
664    Stack space for the args has NOT been allocated: that job is up to us.  */
665 
666 static CORE_ADDR
v850_push_dummy_call(struct gdbarch * gdbarch,struct value * function,struct regcache * regcache,CORE_ADDR bp_addr,int nargs,struct value ** args,CORE_ADDR sp,int struct_return,CORE_ADDR struct_addr)667 v850_push_dummy_call (struct gdbarch *gdbarch,
668 		      struct value *function,
669 		      struct regcache *regcache,
670 		      CORE_ADDR bp_addr,
671 		      int nargs,
672 		      struct value **args,
673 		      CORE_ADDR sp,
674 		      int struct_return,
675 		      CORE_ADDR struct_addr)
676 {
677   int argreg;
678   int argnum;
679   int len = 0;
680   int stack_offset;
681 
682   /* The offset onto the stack at which we will start copying parameters
683      (after the registers are used up) begins at 16 rather than at zero.
684      That's how the ABI is defined, though there's no indication that these
685      16 bytes are used for anything, not even for saving incoming
686      argument registers.  */
687   stack_offset = 16;
688 
689   /* Now make space on the stack for the args.  */
690   for (argnum = 0; argnum < nargs; argnum++)
691     len += ((TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3);
692   sp -= len + stack_offset;
693 
694   argreg = E_ARG0_REGNUM;
695   /* The struct_return pointer occupies the first parameter register.  */
696   if (struct_return)
697     regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
698 
699   /* Now load as many as possible of the first arguments into
700      registers, and push the rest onto the stack.  There are 16 bytes
701      in four registers available.  Loop thru args from first to last.  */
702   for (argnum = 0; argnum < nargs; argnum++)
703     {
704       int len;
705       gdb_byte *val;
706       gdb_byte valbuf[v850_reg_size];
707 
708       if (!v850_type_is_scalar (value_type (*args))
709 	  && TYPE_LENGTH (value_type (*args)) > E_MAX_RETTYPE_SIZE_IN_REGS)
710 	{
711 	  store_unsigned_integer (valbuf, 4, VALUE_ADDRESS (*args));
712 	  len = 4;
713 	  val = valbuf;
714 	}
715       else
716 	{
717 	  len = TYPE_LENGTH (value_type (*args));
718 	  val = (gdb_byte *) value_contents (*args);
719 	}
720 
721       while (len > 0)
722 	if (argreg <= E_ARGLAST_REGNUM)
723 	  {
724 	    CORE_ADDR regval;
725 
726 	    regval = extract_unsigned_integer (val, v850_reg_size);
727 	    regcache_cooked_write_unsigned (regcache, argreg, regval);
728 
729 	    len -= v850_reg_size;
730 	    val += v850_reg_size;
731 	    argreg++;
732 	  }
733 	else
734 	  {
735 	    write_memory (sp + stack_offset, val, 4);
736 
737 	    len -= 4;
738 	    val += 4;
739 	    stack_offset += 4;
740 	  }
741       args++;
742     }
743 
744   /* Store return address.  */
745   regcache_cooked_write_unsigned (regcache, E_LP_REGNUM, bp_addr);
746 
747   /* Update stack pointer.  */
748   regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
749 
750   return sp;
751 }
752 
753 static void
v850_extract_return_value(struct type * type,struct regcache * regcache,gdb_byte * valbuf)754 v850_extract_return_value (struct type *type, struct regcache *regcache,
755 			   gdb_byte *valbuf)
756 {
757   int len = TYPE_LENGTH (type);
758 
759   if (len <= v850_reg_size)
760     {
761       ULONGEST val;
762 
763       regcache_cooked_read_unsigned (regcache, E_V0_REGNUM, &val);
764       store_unsigned_integer (valbuf, len, val);
765     }
766   else if (len <= 2 * v850_reg_size)
767     {
768       int i, regnum = E_V0_REGNUM;
769       gdb_byte buf[v850_reg_size];
770       for (i = 0; len > 0; i += 4, len -= 4)
771 	{
772 	  regcache_raw_read (regcache, regnum++, buf);
773 	  memcpy (valbuf + i, buf, len > 4 ? 4 : len);
774 	}
775     }
776 }
777 
778 static void
v850_store_return_value(struct type * type,struct regcache * regcache,const gdb_byte * valbuf)779 v850_store_return_value (struct type *type, struct regcache *regcache,
780 			 const gdb_byte *valbuf)
781 {
782   int len = TYPE_LENGTH (type);
783 
784   if (len <= v850_reg_size)
785       regcache_cooked_write_unsigned (regcache, E_V0_REGNUM,
786 				      extract_unsigned_integer (valbuf, len));
787   else if (len <= 2 * v850_reg_size)
788     {
789       int i, regnum = E_V0_REGNUM;
790       for (i = 0; i < len; i += 4)
791 	regcache_raw_write (regcache, regnum++, valbuf + i);
792     }
793 }
794 
795 static enum return_value_convention
v850_return_value(struct gdbarch * gdbarch,struct type * type,struct regcache * regcache,gdb_byte * readbuf,const gdb_byte * writebuf)796 v850_return_value (struct gdbarch *gdbarch, struct type *type,
797 		   struct regcache *regcache,
798 		   gdb_byte *readbuf, const gdb_byte *writebuf)
799 {
800   if (v850_use_struct_convention (type))
801     return RETURN_VALUE_STRUCT_CONVENTION;
802   if (writebuf)
803     v850_store_return_value (type, regcache, writebuf);
804   else if (readbuf)
805     v850_extract_return_value (type, regcache, readbuf);
806   return RETURN_VALUE_REGISTER_CONVENTION;
807 }
808 
809 const static unsigned char *
v850_breakpoint_from_pc(CORE_ADDR * pcptr,int * lenptr)810 v850_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
811 {
812   static unsigned char breakpoint[] = { 0x85, 0x05 };
813   *lenptr = sizeof (breakpoint);
814   return breakpoint;
815 }
816 
817 static struct v850_frame_cache *
v850_alloc_frame_cache(struct frame_info * next_frame)818 v850_alloc_frame_cache (struct frame_info *next_frame)
819 {
820   struct v850_frame_cache *cache;
821   int i;
822 
823   cache = FRAME_OBSTACK_ZALLOC (struct v850_frame_cache);
824   cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
825 
826   /* Base address.  */
827   cache->base = 0;
828   cache->sp_offset = 0;
829   cache->pc = 0;
830 
831   /* Frameless until proven otherwise.  */
832   cache->uses_fp = 0;
833 
834   return cache;
835 }
836 
837 static struct v850_frame_cache *
v850_frame_cache(struct frame_info * next_frame,void ** this_cache)838 v850_frame_cache (struct frame_info *next_frame, void **this_cache)
839 {
840   struct v850_frame_cache *cache;
841   CORE_ADDR current_pc;
842   int i;
843 
844   if (*this_cache)
845     return *this_cache;
846 
847   cache = v850_alloc_frame_cache (next_frame);
848   *this_cache = cache;
849 
850   /* In principle, for normal frames, fp holds the frame pointer,
851      which holds the base address for the current stack frame.
852      However, for functions that don't need it, the frame pointer is
853      optional.  For these "frameless" functions the frame pointer is
854      actually the frame pointer of the calling frame.  */
855   cache->base = frame_unwind_register_unsigned (next_frame, E_FP_REGNUM);
856   if (cache->base == 0)
857     return cache;
858 
859   cache->pc = frame_func_unwind (next_frame);
860   current_pc = frame_pc_unwind (next_frame);
861   if (cache->pc != 0)
862     v850_analyze_prologue (cache->pc, current_pc, cache);
863 
864   if (!cache->uses_fp)
865     {
866       /* We didn't find a valid frame, which means that CACHE->base
867          currently holds the frame pointer for our calling frame.  If
868          we're at the start of a function, or somewhere half-way its
869          prologue, the function's frame probably hasn't been fully
870          setup yet.  Try to reconstruct the base address for the stack
871          frame by looking at the stack pointer.  For truly "frameless"
872          functions this might work too.  */
873       cache->base = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
874     }
875 
876   /* Now that we have the base address for the stack frame we can
877      calculate the value of sp in the calling frame.  */
878   trad_frame_set_value (cache->saved_regs, E_SP_REGNUM,
879   			cache->base - cache->sp_offset);
880 
881   /* Adjust all the saved registers such that they contain addresses
882      instead of offsets.  */
883   for (i = 0; i < E_NUM_REGS; i++)
884     if (trad_frame_addr_p (cache->saved_regs, i))
885       cache->saved_regs[i].addr += cache->base;
886 
887   /* The call instruction moves the caller's PC in the callee's LP.
888      Since this is an unwind, do the reverse.  Copy the location of LP
889      into PC (the address / regnum) so that a request for PC will be
890      converted into a request for the LP.  */
891 
892   cache->saved_regs[E_PC_REGNUM] = cache->saved_regs[E_LP_REGNUM];
893 
894   return cache;
895 }
896 
897 
898 static void
v850_frame_prev_register(struct frame_info * next_frame,void ** this_cache,int regnum,int * optimizedp,enum lval_type * lvalp,CORE_ADDR * addrp,int * realnump,void * valuep)899 v850_frame_prev_register (struct frame_info *next_frame, void **this_cache,
900 			  int regnum, int *optimizedp,
901 			  enum lval_type *lvalp, CORE_ADDR *addrp,
902 			  int *realnump, void *valuep)
903 {
904   struct v850_frame_cache *cache = v850_frame_cache (next_frame, this_cache);
905 
906   gdb_assert (regnum >= 0);
907 
908   trad_frame_get_prev_register (next_frame, cache->saved_regs, regnum,
909 				optimizedp, lvalp, addrp, realnump, valuep);
910 }
911 
912 static void
v850_frame_this_id(struct frame_info * next_frame,void ** this_cache,struct frame_id * this_id)913 v850_frame_this_id (struct frame_info *next_frame, void **this_cache,
914 		    struct frame_id *this_id)
915 {
916   struct v850_frame_cache *cache = v850_frame_cache (next_frame, this_cache);
917 
918   /* This marks the outermost frame.  */
919   if (cache->base == 0)
920     return;
921 
922   *this_id = frame_id_build (cache->saved_regs[E_SP_REGNUM].addr, cache->pc);
923 }
924 
925 static const struct frame_unwind v850_frame_unwind = {
926   NORMAL_FRAME,
927   v850_frame_this_id,
928   v850_frame_prev_register
929 };
930 
931 static const struct frame_unwind *
v850_frame_sniffer(struct frame_info * next_frame)932 v850_frame_sniffer (struct frame_info *next_frame)
933 {
934   return &v850_frame_unwind;
935 }
936 
937 static CORE_ADDR
v850_unwind_sp(struct gdbarch * gdbarch,struct frame_info * next_frame)938 v850_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
939 {
940   return frame_unwind_register_unsigned (next_frame, SP_REGNUM);
941 }
942 
943 static CORE_ADDR
v850_unwind_pc(struct gdbarch * gdbarch,struct frame_info * next_frame)944 v850_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
945 {
946   return frame_unwind_register_unsigned (next_frame, PC_REGNUM);
947 }
948 
949 static struct frame_id
v850_unwind_dummy_id(struct gdbarch * gdbarch,struct frame_info * next_frame)950 v850_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
951 {
952   return frame_id_build (v850_unwind_sp (gdbarch, next_frame),
953                          frame_pc_unwind (next_frame));
954 }
955 
956 static CORE_ADDR
v850_frame_base_address(struct frame_info * next_frame,void ** this_cache)957 v850_frame_base_address (struct frame_info *next_frame, void **this_cache)
958 {
959   struct v850_frame_cache *cache = v850_frame_cache (next_frame, this_cache);
960 
961   return cache->base;
962 }
963 
964 static const struct frame_base v850_frame_base = {
965   &v850_frame_unwind,
966   v850_frame_base_address,
967   v850_frame_base_address,
968   v850_frame_base_address
969 };
970 
971 static struct gdbarch *
v850_gdbarch_init(struct gdbarch_info info,struct gdbarch_list * arches)972 v850_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
973 {
974   struct gdbarch *gdbarch;
975 
976   /* Change the register names based on the current machine type.  */
977   if (info.bfd_arch_info->arch != bfd_arch_v850)
978     return NULL;
979 
980   gdbarch = gdbarch_alloc (&info, NULL);
981 
982   switch (info.bfd_arch_info->mach)
983     {
984     case bfd_mach_v850:
985       set_gdbarch_register_name (gdbarch, v850_register_name);
986       break;
987     case bfd_mach_v850e:
988     case bfd_mach_v850e1:
989       set_gdbarch_register_name (gdbarch, v850e_register_name);
990       break;
991     }
992 
993   set_gdbarch_num_regs (gdbarch, E_NUM_REGS);
994   set_gdbarch_num_pseudo_regs (gdbarch, 0);
995   set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
996   set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
997   set_gdbarch_fp0_regnum (gdbarch, -1);
998 
999   set_gdbarch_register_type (gdbarch, v850_register_type);
1000 
1001   set_gdbarch_char_signed (gdbarch, 0);
1002   set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1003   set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1004   set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1005   set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1006 
1007   set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1008   set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1009   set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1010 
1011   set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1012   set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1013 
1014   set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1015   set_gdbarch_breakpoint_from_pc (gdbarch, v850_breakpoint_from_pc);
1016 
1017   set_gdbarch_return_value (gdbarch, v850_return_value);
1018   set_gdbarch_push_dummy_call (gdbarch, v850_push_dummy_call);
1019   set_gdbarch_skip_prologue (gdbarch, v850_skip_prologue);
1020 
1021   set_gdbarch_print_insn (gdbarch, print_insn_v850);
1022 
1023   set_gdbarch_frame_align (gdbarch, v850_frame_align);
1024   set_gdbarch_unwind_sp (gdbarch, v850_unwind_sp);
1025   set_gdbarch_unwind_pc (gdbarch, v850_unwind_pc);
1026   set_gdbarch_unwind_dummy_id (gdbarch, v850_unwind_dummy_id);
1027   frame_base_set_default (gdbarch, &v850_frame_base);
1028 
1029   /* Hook in ABI-specific overrides, if they have been registered.  */
1030   gdbarch_init_osabi (info, gdbarch);
1031 
1032   frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1033   frame_unwind_append_sniffer (gdbarch, v850_frame_sniffer);
1034 
1035   return gdbarch;
1036 }
1037 
1038 extern initialize_file_ftype _initialize_v850_tdep; /* -Wmissing-prototypes */
1039 
1040 void
_initialize_v850_tdep(void)1041 _initialize_v850_tdep (void)
1042 {
1043   register_gdbarch_init (bfd_arch_v850, v850_gdbarch_init);
1044 }
1045