1@c Copyright 2001, 2002, 2003 2@c Free Software Foundation, Inc. 3@c This is part of the GAS manual. 4@c For copying conditions, see the file as.texinfo. 5@ifset GENERIC 6@page 7@node PPC-Dependent 8@chapter PowerPC Dependent Features 9@end ifset 10@ifclear GENERIC 11@node Machine Dependencies 12@chapter PowerPC Dependent Features 13@end ifclear 14 15@cindex PowerPC support 16@menu 17* PowerPC-Opts:: Options 18* PowerPC-Pseudo:: PowerPC Assembler Directives 19@end menu 20 21@node PowerPC-Opts 22@section Options 23 24@cindex options for PowerPC 25@cindex PowerPC options 26@cindex architectures, PowerPC 27@cindex PowerPC architectures 28The PowerPC chip family includes several successive levels, using the same 29core instruction set, but including a few additional instructions at 30each level. There are exceptions to this however. For details on what 31instructions each variant supports, please see the chip's architecture 32reference manual. 33 34The following table lists all available PowerPC options. 35 36@table @code 37@item -mpwrx | -mpwr2 38Generate code for POWER/2 (RIOS2). 39 40@item -mpwr 41Generate code for POWER (RIOS1) 42 43@item -m601 44Generate code for PowerPC 601. 45 46@item -mppc, -mppc32, -m603, -m604 47Generate code for PowerPC 603/604. 48 49@item -m403, -m405 50Generate code for PowerPC 403/405. 51 52@item -m440 53Generate code for PowerPC 440. BookE and some 405 instructions. 54 55@item -m7400, -m7410, -m7450, -m7455 56Generate code for PowerPC 7400/7410/7450/7455. 57 58@item -mppc64, -m620 59Generate code for PowerPC 620/625/630. 60 61@item -mppc64bridge 62Generate code for PowerPC 64, including bridge insns. 63 64@item -mbooke64 65Generate code for 64-bit BookE. 66 67@item -mbooke, mbooke32 68Generate code for 32-bit BookE. 69 70@item -maltivec 71Generate code for processors with AltiVec instructions. 72 73@item -mpower4 74Generate code for Power4 architecture. 75 76@item -mpower5 77Generate code for Power5 architecture. 78 79@item -mcom 80Generate code Power/PowerPC common instructions. 81 82@item -many 83Generate code for any architecture (PWR/PWRX/PPC). 84 85@item -mregnames 86Allow symbolic names for registers. 87 88@item -mno-regnames 89Do not allow symbolic names for registers. 90 91@item -mrelocatable 92Support for GCC's -mrelocatble option. 93 94@item -mrelocatable-lib 95Support for GCC's -mrelocatble-lib option. 96 97@item -memb 98Set PPC_EMB bit in ELF flags. 99 100@item -mlittle, -mlittle-endian 101Generate code for a little endian machine. 102 103@item -mbig, -mbig-endian 104Generate code for a big endian machine. 105 106@item -msolaris 107Generate code for Solaris. 108 109@item -mno-solaris 110Do not generate code for Solaris. 111@end table 112 113 114@node PowerPC-Pseudo 115@section PowerPC Assembler Directives 116 117@cindex directives for PowerPC 118@cindex PowerPC directives 119A number of assembler directives are available for PowerPC. The 120following table is far from complete. 121 122@table @code 123@item .machine "string" 124This directive allows you to change the machine for which code is 125generated. @code{"string"} may be any of the -m cpu selection options 126(without the -m) enclosed in double quotes, @code{"push"}, or 127@code{"pop"}. @code{.machine "push"} saves the currently selected 128cpu, which may be restored with @code{.machine "pop"}. 129@end table 130