1 /* BFD back-end for Renesas H8/300 COFF binaries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005
4 Free Software Foundation, Inc.
5 Written by Steve Chamberlain, <sac@cygnus.com>.
6
7 This file is part of BFD, the Binary File Descriptor library.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
22
23 #include "bfd.h"
24 #include "sysdep.h"
25 #include "libbfd.h"
26 #include "bfdlink.h"
27 #include "genlink.h"
28 #include "coff/h8300.h"
29 #include "coff/internal.h"
30 #include "libcoff.h"
31 #include "libiberty.h"
32
33 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
34
35 /* We derive a hash table from the basic BFD hash table to
36 hold entries in the function vector. Aside from the
37 info stored by the basic hash table, we need the offset
38 of a particular entry within the hash table as well as
39 the offset where we'll add the next entry. */
40
41 struct funcvec_hash_entry
42 {
43 /* The basic hash table entry. */
44 struct bfd_hash_entry root;
45
46 /* The offset within the vectors section where
47 this entry lives. */
48 bfd_vma offset;
49 };
50
51 struct funcvec_hash_table
52 {
53 /* The basic hash table. */
54 struct bfd_hash_table root;
55
56 bfd *abfd;
57
58 /* Offset at which we'll add the next entry. */
59 unsigned int offset;
60 };
61
62 static struct bfd_hash_entry *
63 funcvec_hash_newfunc
64 (struct bfd_hash_entry *, struct bfd_hash_table *, const char *);
65
66 static bfd_boolean
67 funcvec_hash_table_init
68 (struct funcvec_hash_table *, bfd *,
69 struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
70 struct bfd_hash_table *,
71 const char *));
72
73 static bfd_reloc_status_type special
74 (bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **);
75 static int select_reloc
76 (reloc_howto_type *);
77 static void rtype2howto
78 (arelent *, struct internal_reloc *);
79 static void reloc_processing
80 (arelent *, struct internal_reloc *, asymbol **, bfd *, asection *);
81 static bfd_boolean h8300_symbol_address_p
82 (bfd *, asection *, bfd_vma);
83 static int h8300_reloc16_estimate
84 (bfd *, asection *, arelent *, unsigned int,
85 struct bfd_link_info *);
86 static void h8300_reloc16_extra_cases
87 (bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *,
88 bfd_byte *, unsigned int *, unsigned int *);
89 static bfd_boolean h8300_bfd_link_add_symbols
90 (bfd *, struct bfd_link_info *);
91
92 /* To lookup a value in the function vector hash table. */
93 #define funcvec_hash_lookup(table, string, create, copy) \
94 ((struct funcvec_hash_entry *) \
95 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
96
97 /* The derived h8300 COFF linker table. Note it's derived from
98 the generic linker hash table, not the COFF backend linker hash
99 table! We use this to attach additional data structures we
100 need while linking on the h8300. */
101 struct h8300_coff_link_hash_table {
102 /* The main hash table. */
103 struct generic_link_hash_table root;
104
105 /* Section for the vectors table. This gets attached to a
106 random input bfd, we keep it here for easy access. */
107 asection *vectors_sec;
108
109 /* Hash table of the functions we need to enter into the function
110 vector. */
111 struct funcvec_hash_table *funcvec_hash_table;
112 };
113
114 static struct bfd_link_hash_table *h8300_coff_link_hash_table_create (bfd *);
115
116 /* Get the H8/300 COFF linker hash table from a link_info structure. */
117
118 #define h8300_coff_hash_table(p) \
119 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
120
121 /* Initialize fields within a funcvec hash table entry. Called whenever
122 a new entry is added to the funcvec hash table. */
123
124 static struct bfd_hash_entry *
funcvec_hash_newfunc(struct bfd_hash_entry * entry,struct bfd_hash_table * gen_table,const char * string)125 funcvec_hash_newfunc (struct bfd_hash_entry *entry,
126 struct bfd_hash_table *gen_table,
127 const char *string)
128 {
129 struct funcvec_hash_entry *ret;
130 struct funcvec_hash_table *table;
131
132 ret = (struct funcvec_hash_entry *) entry;
133 table = (struct funcvec_hash_table *) gen_table;
134
135 /* Allocate the structure if it has not already been allocated by a
136 subclass. */
137 if (ret == NULL)
138 ret = ((struct funcvec_hash_entry *)
139 bfd_hash_allocate (gen_table,
140 sizeof (struct funcvec_hash_entry)));
141 if (ret == NULL)
142 return NULL;
143
144 /* Call the allocation method of the superclass. */
145 ret = ((struct funcvec_hash_entry *)
146 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string));
147
148 if (ret == NULL)
149 return NULL;
150
151 /* Note where this entry will reside in the function vector table. */
152 ret->offset = table->offset;
153
154 /* Bump the offset at which we store entries in the function
155 vector. We'd like to bump up the size of the vectors section,
156 but it's not easily available here. */
157 switch (bfd_get_mach (table->abfd))
158 {
159 case bfd_mach_h8300:
160 case bfd_mach_h8300hn:
161 case bfd_mach_h8300sn:
162 table->offset += 2;
163 break;
164 case bfd_mach_h8300h:
165 case bfd_mach_h8300s:
166 table->offset += 4;
167 break;
168 default:
169 return NULL;
170 }
171
172 /* Everything went OK. */
173 return (struct bfd_hash_entry *) ret;
174 }
175
176 /* Initialize the function vector hash table. */
177
178 static bfd_boolean
funcvec_hash_table_init(struct funcvec_hash_table * table,bfd * abfd,struct bfd_hash_entry * (* newfunc)(struct bfd_hash_entry *,struct bfd_hash_table *,const char *))179 funcvec_hash_table_init (struct funcvec_hash_table *table,
180 bfd *abfd,
181 struct bfd_hash_entry *(*newfunc)
182 (struct bfd_hash_entry *,
183 struct bfd_hash_table *,
184 const char *))
185 {
186 /* Initialize our local fields, then call the generic initialization
187 routine. */
188 table->offset = 0;
189 table->abfd = abfd;
190 return (bfd_hash_table_init (&table->root, newfunc));
191 }
192
193 /* Create the derived linker hash table. We use a derived hash table
194 basically to hold "static" information during an H8/300 coff link
195 without using static variables. */
196
197 static struct bfd_link_hash_table *
h8300_coff_link_hash_table_create(bfd * abfd)198 h8300_coff_link_hash_table_create (bfd *abfd)
199 {
200 struct h8300_coff_link_hash_table *ret;
201 bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table);
202
203 ret = (struct h8300_coff_link_hash_table *) bfd_malloc (amt);
204 if (ret == NULL)
205 return NULL;
206 if (!_bfd_link_hash_table_init (&ret->root.root, abfd,
207 _bfd_generic_link_hash_newfunc))
208 {
209 free (ret);
210 return NULL;
211 }
212
213 /* Initialize our data. */
214 ret->vectors_sec = NULL;
215 ret->funcvec_hash_table = NULL;
216
217 /* OK. Everything's initialized, return the base pointer. */
218 return &ret->root.root;
219 }
220
221 /* Special handling for H8/300 relocs.
222 We only come here for pcrel stuff and return normally if not an -r link.
223 When doing -r, we can't do any arithmetic for the pcrel stuff, because
224 the code in reloc.c assumes that we can manipulate the targets of
225 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
226 which means that the gap after the instruction may not be enough to
227 contain the offset required for the branch, so we have to use only
228 the addend until the final link. */
229
230 static bfd_reloc_status_type
special(bfd * abfd ATTRIBUTE_UNUSED,arelent * reloc_entry ATTRIBUTE_UNUSED,asymbol * symbol ATTRIBUTE_UNUSED,PTR data ATTRIBUTE_UNUSED,asection * input_section ATTRIBUTE_UNUSED,bfd * output_bfd,char ** error_message ATTRIBUTE_UNUSED)231 special (bfd *abfd ATTRIBUTE_UNUSED,
232 arelent *reloc_entry ATTRIBUTE_UNUSED,
233 asymbol *symbol ATTRIBUTE_UNUSED,
234 PTR data ATTRIBUTE_UNUSED,
235 asection *input_section ATTRIBUTE_UNUSED,
236 bfd *output_bfd,
237 char **error_message ATTRIBUTE_UNUSED)
238 {
239 if (output_bfd == (bfd *) NULL)
240 return bfd_reloc_continue;
241
242 /* Adjust the reloc address to that in the output section. */
243 reloc_entry->address += input_section->output_offset;
244 return bfd_reloc_ok;
245 }
246
247 static reloc_howto_type howto_table[] = {
248 HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE),
249 HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
250 HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE),
251 HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE),
252 HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE),
253 HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE),
254 HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
255 HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
256 HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
257 HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE),
258 HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE),
259 HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE),
260 HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE),
261 HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
262
263 /* An indirect reference to a function. This causes the function's address
264 to be added to the function vector in lo-mem and puts the address of
265 the function vector's entry in the jsr instruction. */
266 HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE),
267
268 /* Internal reloc for relaxing. This is created when a 16-bit pc-relative
269 branch is turned into an 8-bit pc-relative branch. */
270 HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
271
272 HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE),
273
274 HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
275
276 HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE),
277
278 HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE),
279 };
280
281 /* Turn a howto into a reloc number. */
282
283 #define SELECT_RELOC(x,howto) \
284 { x.r_type = select_reloc (howto); }
285
286 #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x) \
287 && H8300HNBADMAG(x) && H8300SNBADMAG(x))
288 #define H8300 1 /* Customize coffcode.h */
289 #define __A_MAGIC_SET__
290
291 /* Code to swap in the reloc. */
292 #define SWAP_IN_RELOC_OFFSET H_GET_32
293 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
294 #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
295 dst->r_stuff[0] = 'S'; \
296 dst->r_stuff[1] = 'C';
297
298 static int
select_reloc(reloc_howto_type * howto)299 select_reloc (reloc_howto_type *howto)
300 {
301 return howto->type;
302 }
303
304 /* Code to turn a r_type into a howto ptr, uses the above howto table. */
305
306 static void
rtype2howto(arelent * internal,struct internal_reloc * dst)307 rtype2howto (arelent *internal, struct internal_reloc *dst)
308 {
309 switch (dst->r_type)
310 {
311 case R_RELBYTE:
312 internal->howto = howto_table + 0;
313 break;
314 case R_RELWORD:
315 internal->howto = howto_table + 1;
316 break;
317 case R_RELLONG:
318 internal->howto = howto_table + 2;
319 break;
320 case R_PCRBYTE:
321 internal->howto = howto_table + 3;
322 break;
323 case R_PCRWORD:
324 internal->howto = howto_table + 4;
325 break;
326 case R_PCRLONG:
327 internal->howto = howto_table + 5;
328 break;
329 case R_MOV16B1:
330 internal->howto = howto_table + 6;
331 break;
332 case R_MOV16B2:
333 internal->howto = howto_table + 7;
334 break;
335 case R_JMP1:
336 internal->howto = howto_table + 8;
337 break;
338 case R_JMP2:
339 internal->howto = howto_table + 9;
340 break;
341 case R_JMPL1:
342 internal->howto = howto_table + 10;
343 break;
344 case R_JMPL2:
345 internal->howto = howto_table + 11;
346 break;
347 case R_MOV24B1:
348 internal->howto = howto_table + 12;
349 break;
350 case R_MOV24B2:
351 internal->howto = howto_table + 13;
352 break;
353 case R_MEM_INDIRECT:
354 internal->howto = howto_table + 14;
355 break;
356 case R_PCRWORD_B:
357 internal->howto = howto_table + 15;
358 break;
359 case R_MOVL1:
360 internal->howto = howto_table + 16;
361 break;
362 case R_MOVL2:
363 internal->howto = howto_table + 17;
364 break;
365 case R_BCC_INV:
366 internal->howto = howto_table + 18;
367 break;
368 case R_JMP_DEL:
369 internal->howto = howto_table + 19;
370 break;
371 default:
372 abort ();
373 break;
374 }
375 }
376
377 #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry)
378
379 /* Perform any necessary magic to the addend in a reloc entry. */
380
381 #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
382 cache_ptr->addend = ext_reloc.r_offset;
383
384 #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
385 reloc_processing (relent, reloc, symbols, abfd, section)
386
387 static void
reloc_processing(arelent * relent,struct internal_reloc * reloc,asymbol ** symbols,bfd * abfd,asection * section)388 reloc_processing (arelent *relent, struct internal_reloc *reloc,
389 asymbol **symbols, bfd *abfd, asection *section)
390 {
391 relent->address = reloc->r_vaddr;
392 rtype2howto (relent, reloc);
393
394 if (((int) reloc->r_symndx) > 0)
395 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
396 else
397 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
398
399 relent->addend = reloc->r_offset;
400 relent->address -= section->vma;
401 }
402
403 static bfd_boolean
h8300_symbol_address_p(bfd * abfd,asection * input_section,bfd_vma address)404 h8300_symbol_address_p (bfd *abfd, asection *input_section, bfd_vma address)
405 {
406 asymbol **s;
407
408 s = _bfd_generic_link_get_symbols (abfd);
409 BFD_ASSERT (s != (asymbol **) NULL);
410
411 /* Search all the symbols for one in INPUT_SECTION with
412 address ADDRESS. */
413 while (*s)
414 {
415 asymbol *p = *s;
416
417 if (p->section == input_section
418 && (input_section->output_section->vma
419 + input_section->output_offset
420 + p->value) == address)
421 return TRUE;
422 s++;
423 }
424 return FALSE;
425 }
426
427 /* If RELOC represents a relaxable instruction/reloc, change it into
428 the relaxed reloc, notify the linker that symbol addresses
429 have changed (bfd_perform_slip) and return how much the current
430 section has shrunk by.
431
432 FIXME: Much of this code has knowledge of the ordering of entries
433 in the howto table. This needs to be fixed. */
434
435 static int
h8300_reloc16_estimate(bfd * abfd,asection * input_section,arelent * reloc,unsigned int shrink,struct bfd_link_info * link_info)436 h8300_reloc16_estimate (bfd *abfd, asection *input_section, arelent *reloc,
437 unsigned int shrink, struct bfd_link_info *link_info)
438 {
439 bfd_vma value;
440 bfd_vma dot;
441 bfd_vma gap;
442 static asection *last_input_section = NULL;
443 static arelent *last_reloc = NULL;
444
445 /* The address of the thing to be relocated will have moved back by
446 the size of the shrink - but we don't change reloc->address here,
447 since we need it to know where the relocation lives in the source
448 uncooked section. */
449 bfd_vma address = reloc->address - shrink;
450
451 if (input_section != last_input_section)
452 last_reloc = NULL;
453
454 /* Only examine the relocs which might be relaxable. */
455 switch (reloc->howto->type)
456 {
457 /* This is the 16-/24-bit absolute branch which could become an
458 8-bit pc-relative branch. */
459 case R_JMP1:
460 case R_JMPL1:
461 /* Get the address of the target of this branch. */
462 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
463
464 /* Get the address of the next instruction (not the reloc). */
465 dot = (input_section->output_section->vma
466 + input_section->output_offset + address);
467
468 /* Adjust for R_JMP1 vs R_JMPL1. */
469 dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
470
471 /* Compute the distance from this insn to the branch target. */
472 gap = value - dot;
473
474 /* If the distance is within -128..+128 inclusive, then we can relax
475 this jump. +128 is valid since the target will move two bytes
476 closer if we do relax this branch. */
477 if ((int) gap >= -128 && (int) gap <= 128)
478 {
479 bfd_byte code;
480
481 if (!bfd_get_section_contents (abfd, input_section, & code,
482 reloc->address, 1))
483 break;
484 code = bfd_get_8 (abfd, & code);
485
486 /* It's possible we may be able to eliminate this branch entirely;
487 if the previous instruction is a branch around this instruction,
488 and there's no label at this instruction, then we can reverse
489 the condition on the previous branch and eliminate this jump.
490
491 original: new:
492 bCC lab1 bCC' lab2
493 jmp lab2
494 lab1: lab1:
495
496 This saves 4 bytes instead of two, and should be relatively
497 common.
498
499 Only perform this optimisation for jumps (code 0x5a) not
500 subroutine calls, as otherwise it could transform:
501
502 mov.w r0,r0
503 beq .L1
504 jsr @_bar
505 .L1: rts
506 _bar: rts
507 into:
508 mov.w r0,r0
509 bne _bar
510 rts
511 _bar: rts
512
513 which changes the call (jsr) into a branch (bne). */
514 if (code == 0x5a
515 && gap <= 126
516 && last_reloc
517 && last_reloc->howto->type == R_PCRBYTE)
518 {
519 bfd_vma last_value;
520 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
521 input_section) + 1;
522
523 if (last_value == dot + 2
524 && last_reloc->address + 1 == reloc->address
525 && !h8300_symbol_address_p (abfd, input_section, dot - 2))
526 {
527 reloc->howto = howto_table + 19;
528 last_reloc->howto = howto_table + 18;
529 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
530 last_reloc->addend = reloc->addend;
531 shrink += 4;
532 bfd_perform_slip (abfd, 4, input_section, address);
533 break;
534 }
535 }
536
537 /* Change the reloc type. */
538 reloc->howto = reloc->howto + 1;
539
540 /* This shrinks this section by two bytes. */
541 shrink += 2;
542 bfd_perform_slip (abfd, 2, input_section, address);
543 }
544 break;
545
546 /* This is the 16-bit pc-relative branch which could become an 8-bit
547 pc-relative branch. */
548 case R_PCRWORD:
549 /* Get the address of the target of this branch, add one to the value
550 because the addend field in PCrel jumps is off by -1. */
551 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1;
552
553 /* Get the address of the next instruction if we were to relax. */
554 dot = input_section->output_section->vma +
555 input_section->output_offset + address;
556
557 /* Compute the distance from this insn to the branch target. */
558 gap = value - dot;
559
560 /* If the distance is within -128..+128 inclusive, then we can relax
561 this jump. +128 is valid since the target will move two bytes
562 closer if we do relax this branch. */
563 if ((int) gap >= -128 && (int) gap <= 128)
564 {
565 /* Change the reloc type. */
566 reloc->howto = howto_table + 15;
567
568 /* This shrinks this section by two bytes. */
569 shrink += 2;
570 bfd_perform_slip (abfd, 2, input_section, address);
571 }
572 break;
573
574 /* This is a 16-bit absolute address in a mov.b insn, which can
575 become an 8-bit absolute address if it's in the right range. */
576 case R_MOV16B1:
577 /* Get the address of the data referenced by this mov.b insn. */
578 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
579 value = bfd_h8300_pad_address (abfd, value);
580
581 /* If the address is in the top 256 bytes of the address space
582 then we can relax this instruction. */
583 if (value >= 0xffffff00u)
584 {
585 /* Change the reloc type. */
586 reloc->howto = reloc->howto + 1;
587
588 /* This shrinks this section by two bytes. */
589 shrink += 2;
590 bfd_perform_slip (abfd, 2, input_section, address);
591 }
592 break;
593
594 /* Similarly for a 24-bit absolute address in a mov.b. Note that
595 if we can't relax this into an 8-bit absolute, we'll fall through
596 and try to relax it into a 16-bit absolute. */
597 case R_MOV24B1:
598 /* Get the address of the data referenced by this mov.b insn. */
599 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
600 value = bfd_h8300_pad_address (abfd, value);
601
602 if (value >= 0xffffff00u)
603 {
604 /* Change the reloc type. */
605 reloc->howto = reloc->howto + 1;
606
607 /* This shrinks this section by four bytes. */
608 shrink += 4;
609 bfd_perform_slip (abfd, 4, input_section, address);
610
611 /* Done with this reloc. */
612 break;
613 }
614
615 /* FALLTHROUGH and try to turn the 24-/32-bit reloc into a 16-bit
616 reloc. */
617
618 /* This is a 24-/32-bit absolute address in a mov insn, which can
619 become an 16-bit absolute address if it's in the right range. */
620 case R_MOVL1:
621 /* Get the address of the data referenced by this mov insn. */
622 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
623 value = bfd_h8300_pad_address (abfd, value);
624
625 /* If the address is a sign-extended 16-bit value then we can
626 relax this instruction. */
627 if (value <= 0x7fff || value >= 0xffff8000u)
628 {
629 /* Change the reloc type. */
630 reloc->howto = howto_table + 17;
631
632 /* This shrinks this section by two bytes. */
633 shrink += 2;
634 bfd_perform_slip (abfd, 2, input_section, address);
635 }
636 break;
637
638 /* No other reloc types represent relaxing opportunities. */
639 default:
640 break;
641 }
642
643 last_reloc = reloc;
644 last_input_section = input_section;
645 return shrink;
646 }
647
648 /* Handle relocations for the H8/300, including relocs for relaxed
649 instructions.
650
651 FIXME: Not all relocations check for overflow! */
652
653 static void
h8300_reloc16_extra_cases(bfd * abfd,struct bfd_link_info * link_info,struct bfd_link_order * link_order,arelent * reloc,bfd_byte * data,unsigned int * src_ptr,unsigned int * dst_ptr)654 h8300_reloc16_extra_cases (bfd *abfd, struct bfd_link_info *link_info,
655 struct bfd_link_order *link_order, arelent *reloc,
656 bfd_byte *data, unsigned int *src_ptr,
657 unsigned int *dst_ptr)
658 {
659 unsigned int src_address = *src_ptr;
660 unsigned int dst_address = *dst_ptr;
661 asection *input_section = link_order->u.indirect.section;
662 bfd_vma value;
663 bfd_vma dot;
664 int gap, tmp;
665 unsigned char temp_code;
666
667 switch (reloc->howto->type)
668 {
669 /* Generic 8-bit pc-relative relocation. */
670 case R_PCRBYTE:
671 /* Get the address of the target of this branch. */
672 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
673
674 dot = (link_order->offset
675 + dst_address
676 + link_order->u.indirect.section->output_section->vma);
677
678 gap = value - dot;
679
680 /* Sanity check. */
681 if (gap < -128 || gap > 126)
682 {
683 if (! ((*link_info->callbacks->reloc_overflow)
684 (link_info, NULL,
685 bfd_asymbol_name (*reloc->sym_ptr_ptr),
686 reloc->howto->name, reloc->addend, input_section->owner,
687 input_section, reloc->address)))
688 abort ();
689 }
690
691 /* Everything looks OK. Apply the relocation and update the
692 src/dst address appropriately. */
693 bfd_put_8 (abfd, gap, data + dst_address);
694 dst_address++;
695 src_address++;
696
697 /* All done. */
698 break;
699
700 /* Generic 16-bit pc-relative relocation. */
701 case R_PCRWORD:
702 /* Get the address of the target of this branch. */
703 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
704
705 /* Get the address of the instruction (not the reloc). */
706 dot = (link_order->offset
707 + dst_address
708 + link_order->u.indirect.section->output_section->vma + 1);
709
710 gap = value - dot;
711
712 /* Sanity check. */
713 if (gap > 32766 || gap < -32768)
714 {
715 if (! ((*link_info->callbacks->reloc_overflow)
716 (link_info, NULL,
717 bfd_asymbol_name (*reloc->sym_ptr_ptr),
718 reloc->howto->name, reloc->addend, input_section->owner,
719 input_section, reloc->address)))
720 abort ();
721 }
722
723 /* Everything looks OK. Apply the relocation and update the
724 src/dst address appropriately. */
725 bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address);
726 dst_address += 2;
727 src_address += 2;
728
729 /* All done. */
730 break;
731
732 /* Generic 8-bit absolute relocation. */
733 case R_RELBYTE:
734 /* Get the address of the object referenced by this insn. */
735 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
736
737 bfd_put_8 (abfd, value & 0xff, data + dst_address);
738 dst_address += 1;
739 src_address += 1;
740
741 /* All done. */
742 break;
743
744 /* Various simple 16-bit absolute relocations. */
745 case R_MOV16B1:
746 case R_JMP1:
747 case R_RELWORD:
748 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
749 bfd_put_16 (abfd, value, data + dst_address);
750 dst_address += 2;
751 src_address += 2;
752 break;
753
754 /* Various simple 24-/32-bit absolute relocations. */
755 case R_MOV24B1:
756 case R_MOVL1:
757 case R_RELLONG:
758 /* Get the address of the target of this branch. */
759 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
760 bfd_put_32 (abfd, value, data + dst_address);
761 dst_address += 4;
762 src_address += 4;
763 break;
764
765 /* Another 24-/32-bit absolute relocation. */
766 case R_JMPL1:
767 /* Get the address of the target of this branch. */
768 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
769
770 value = ((value & 0x00ffffff)
771 | (bfd_get_32 (abfd, data + src_address) & 0xff000000));
772 bfd_put_32 (abfd, value, data + dst_address);
773 dst_address += 4;
774 src_address += 4;
775 break;
776
777 /* This is a 24-/32-bit absolute address in one of the following
778 instructions:
779
780 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
781 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", "ldc.w",
782 "stc.w" and "mov.[bwl]"
783
784 We may relax this into an 16-bit absolute address if it's in
785 the right range. */
786 case R_MOVL2:
787 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
788 value = bfd_h8300_pad_address (abfd, value);
789
790 /* Sanity check. */
791 if (value <= 0x7fff || value >= 0xffff8000u)
792 {
793 /* Insert the 16-bit value into the proper location. */
794 bfd_put_16 (abfd, value, data + dst_address);
795
796 /* Fix the opcode. For all the instructions that belong to
797 this relaxation, we simply need to turn off bit 0x20 in
798 the previous byte. */
799 data[dst_address - 1] &= ~0x20;
800 dst_address += 2;
801 src_address += 4;
802 }
803 else
804 {
805 if (! ((*link_info->callbacks->reloc_overflow)
806 (link_info, NULL,
807 bfd_asymbol_name (*reloc->sym_ptr_ptr),
808 reloc->howto->name, reloc->addend, input_section->owner,
809 input_section, reloc->address)))
810 abort ();
811 }
812 break;
813
814 /* A 16-bit absolute branch that is now an 8-bit pc-relative branch. */
815 case R_JMP2:
816 /* Get the address of the target of this branch. */
817 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
818
819 /* Get the address of the next instruction. */
820 dot = (link_order->offset
821 + dst_address
822 + link_order->u.indirect.section->output_section->vma + 1);
823
824 gap = value - dot;
825
826 /* Sanity check. */
827 if (gap < -128 || gap > 126)
828 {
829 if (! ((*link_info->callbacks->reloc_overflow)
830 (link_info, NULL,
831 bfd_asymbol_name (*reloc->sym_ptr_ptr),
832 reloc->howto->name, reloc->addend, input_section->owner,
833 input_section, reloc->address)))
834 abort ();
835 }
836
837 /* Now fix the instruction itself. */
838 switch (data[dst_address - 1])
839 {
840 case 0x5e:
841 /* jsr -> bsr */
842 bfd_put_8 (abfd, 0x55, data + dst_address - 1);
843 break;
844 case 0x5a:
845 /* jmp -> bra */
846 bfd_put_8 (abfd, 0x40, data + dst_address - 1);
847 break;
848
849 default:
850 abort ();
851 }
852
853 /* Write out the 8-bit value. */
854 bfd_put_8 (abfd, gap, data + dst_address);
855
856 dst_address += 1;
857 src_address += 3;
858
859 break;
860
861 /* A 16-bit pc-relative branch that is now an 8-bit pc-relative branch. */
862 case R_PCRWORD_B:
863 /* Get the address of the target of this branch. */
864 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
865
866 /* Get the address of the instruction (not the reloc). */
867 dot = (link_order->offset
868 + dst_address
869 + link_order->u.indirect.section->output_section->vma - 1);
870
871 gap = value - dot;
872
873 /* Sanity check. */
874 if (gap < -128 || gap > 126)
875 {
876 if (! ((*link_info->callbacks->reloc_overflow)
877 (link_info, NULL,
878 bfd_asymbol_name (*reloc->sym_ptr_ptr),
879 reloc->howto->name, reloc->addend, input_section->owner,
880 input_section, reloc->address)))
881 abort ();
882 }
883
884 /* Now fix the instruction. */
885 switch (data[dst_address - 2])
886 {
887 case 0x58:
888 /* bCC:16 -> bCC:8 */
889 /* Get the second byte of the original insn, which contains
890 the condition code. */
891 tmp = data[dst_address - 1];
892
893 /* Compute the fisrt byte of the relaxed instruction. The
894 original sequence 0x58 0xX0 is relaxed to 0x4X, where X
895 represents the condition code. */
896 tmp &= 0xf0;
897 tmp >>= 4;
898 tmp |= 0x40;
899
900 /* Write it. */
901 bfd_put_8 (abfd, tmp, data + dst_address - 2);
902 break;
903
904 case 0x5c:
905 /* bsr:16 -> bsr:8 */
906 bfd_put_8 (abfd, 0x55, data + dst_address - 2);
907 break;
908
909 default:
910 abort ();
911 }
912
913 /* Output the target. */
914 bfd_put_8 (abfd, gap, data + dst_address - 1);
915
916 /* We don't advance dst_address -- the 8-bit reloc is applied at
917 dst_address - 1, so the next insn should begin at dst_address. */
918 src_address += 2;
919
920 break;
921
922 /* Similarly for a 24-bit absolute that is now 8 bits. */
923 case R_JMPL2:
924 /* Get the address of the target of this branch. */
925 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
926
927 /* Get the address of the instruction (not the reloc). */
928 dot = (link_order->offset
929 + dst_address
930 + link_order->u.indirect.section->output_section->vma + 2);
931
932 gap = value - dot;
933
934 /* Fix the instruction. */
935 switch (data[src_address])
936 {
937 case 0x5e:
938 /* jsr -> bsr */
939 bfd_put_8 (abfd, 0x55, data + dst_address);
940 break;
941 case 0x5a:
942 /* jmp ->bra */
943 bfd_put_8 (abfd, 0x40, data + dst_address);
944 break;
945 default:
946 abort ();
947 }
948
949 bfd_put_8 (abfd, gap, data + dst_address + 1);
950 dst_address += 2;
951 src_address += 4;
952
953 break;
954
955 /* This is a 16-bit absolute address in one of the following
956 instructions:
957
958 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
959 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
960 "mov.b"
961
962 We may relax this into an 8-bit absolute address if it's in
963 the right range. */
964 case R_MOV16B2:
965 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
966
967 /* All instructions with R_H8_DIR16B2 start with 0x6a. */
968 if (data[dst_address - 2] != 0x6a)
969 abort ();
970
971 temp_code = data[src_address - 1];
972
973 /* If this is a mov.b instruction, clear the lower nibble, which
974 contains the source/destination register number. */
975 if ((temp_code & 0x10) != 0x10)
976 temp_code &= 0xf0;
977
978 /* Fix up the opcode. */
979 switch (temp_code)
980 {
981 case 0x00:
982 /* This is mov.b @aa:16,Rd. */
983 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
984 break;
985 case 0x80:
986 /* This is mov.b Rs,@aa:16. */
987 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
988 break;
989 case 0x18:
990 /* This is a bit-maniputation instruction that stores one
991 bit into memory, one of "bclr", "bist", "bnot", "bset",
992 and "bst". */
993 data[dst_address - 2] = 0x7f;
994 break;
995 case 0x10:
996 /* This is a bit-maniputation instruction that loads one bit
997 from memory, one of "band", "biand", "bild", "bior",
998 "bixor", "bld", "bor", "btst", and "bxor". */
999 data[dst_address - 2] = 0x7e;
1000 break;
1001 default:
1002 abort ();
1003 }
1004
1005 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1006 src_address += 2;
1007 break;
1008
1009 /* This is a 24-bit absolute address in one of the following
1010 instructions:
1011
1012 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1013 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1014 "mov.b"
1015
1016 We may relax this into an 8-bit absolute address if it's in
1017 the right range. */
1018 case R_MOV24B2:
1019 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1020
1021 /* All instructions with R_MOV24B2 start with 0x6a. */
1022 if (data[dst_address - 2] != 0x6a)
1023 abort ();
1024
1025 temp_code = data[src_address - 1];
1026
1027 /* If this is a mov.b instruction, clear the lower nibble, which
1028 contains the source/destination register number. */
1029 if ((temp_code & 0x30) != 0x30)
1030 temp_code &= 0xf0;
1031
1032 /* Fix up the opcode. */
1033 switch (temp_code)
1034 {
1035 case 0x20:
1036 /* This is mov.b @aa:24/32,Rd. */
1037 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
1038 break;
1039 case 0xa0:
1040 /* This is mov.b Rs,@aa:24/32. */
1041 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
1042 break;
1043 case 0x38:
1044 /* This is a bit-maniputation instruction that stores one
1045 bit into memory, one of "bclr", "bist", "bnot", "bset",
1046 and "bst". */
1047 data[dst_address - 2] = 0x7f;
1048 break;
1049 case 0x30:
1050 /* This is a bit-maniputation instruction that loads one bit
1051 from memory, one of "band", "biand", "bild", "bior",
1052 "bixor", "bld", "bor", "btst", and "bxor". */
1053 data[dst_address - 2] = 0x7e;
1054 break;
1055 default:
1056 abort ();
1057 }
1058
1059 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1060 src_address += 4;
1061 break;
1062
1063 case R_BCC_INV:
1064 /* Get the address of the target of this branch. */
1065 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1066
1067 dot = (link_order->offset
1068 + dst_address
1069 + link_order->u.indirect.section->output_section->vma) + 1;
1070
1071 gap = value - dot;
1072
1073 /* Sanity check. */
1074 if (gap < -128 || gap > 126)
1075 {
1076 if (! ((*link_info->callbacks->reloc_overflow)
1077 (link_info, NULL,
1078 bfd_asymbol_name (*reloc->sym_ptr_ptr),
1079 reloc->howto->name, reloc->addend, input_section->owner,
1080 input_section, reloc->address)))
1081 abort ();
1082 }
1083
1084 /* Everything looks OK. Fix the condition in the instruction, apply
1085 the relocation, and update the src/dst address appropriately. */
1086
1087 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
1088 data + dst_address - 1);
1089 bfd_put_8 (abfd, gap, data + dst_address);
1090 dst_address++;
1091 src_address++;
1092
1093 /* All done. */
1094 break;
1095
1096 case R_JMP_DEL:
1097 src_address += 4;
1098 break;
1099
1100 /* An 8-bit memory indirect instruction (jmp/jsr).
1101
1102 There's several things that need to be done to handle
1103 this relocation.
1104
1105 If this is a reloc against the absolute symbol, then
1106 we should handle it just R_RELBYTE. Likewise if it's
1107 for a symbol with a value ge 0 and le 0xff.
1108
1109 Otherwise it's a jump/call through the function vector,
1110 and the linker is expected to set up the function vector
1111 and put the right value into the jump/call instruction. */
1112 case R_MEM_INDIRECT:
1113 {
1114 /* We need to find the symbol so we can determine it's
1115 address in the function vector table. */
1116 asymbol *symbol;
1117 const char *name;
1118 struct funcvec_hash_table *ftab;
1119 struct funcvec_hash_entry *h;
1120 struct h8300_coff_link_hash_table *htab;
1121 asection *vectors_sec;
1122
1123 if (link_info->hash->creator != abfd->xvec)
1124 {
1125 (*_bfd_error_handler)
1126 (_("cannot handle R_MEM_INDIRECT reloc when using %s output"),
1127 link_info->hash->creator->name);
1128
1129 /* What else can we do? This function doesn't allow return
1130 of an error, and we don't want to call abort as that
1131 indicates an internal error. */
1132 #ifndef EXIT_FAILURE
1133 #define EXIT_FAILURE 1
1134 #endif
1135 xexit (EXIT_FAILURE);
1136 }
1137 htab = h8300_coff_hash_table (link_info);
1138 vectors_sec = htab->vectors_sec;
1139
1140 /* First see if this is a reloc against the absolute symbol
1141 or against a symbol with a nonnegative value <= 0xff. */
1142 symbol = *(reloc->sym_ptr_ptr);
1143 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1144 if (symbol == bfd_abs_section_ptr->symbol
1145 || value <= 0xff)
1146 {
1147 /* This should be handled in a manner very similar to
1148 R_RELBYTES. If the value is in range, then just slam
1149 the value into the right location. Else trigger a
1150 reloc overflow callback. */
1151 if (value <= 0xff)
1152 {
1153 bfd_put_8 (abfd, value, data + dst_address);
1154 dst_address += 1;
1155 src_address += 1;
1156 }
1157 else
1158 {
1159 if (! ((*link_info->callbacks->reloc_overflow)
1160 (link_info, NULL,
1161 bfd_asymbol_name (*reloc->sym_ptr_ptr),
1162 reloc->howto->name, reloc->addend, input_section->owner,
1163 input_section, reloc->address)))
1164 abort ();
1165 }
1166 break;
1167 }
1168
1169 /* This is a jump/call through a function vector, and we're
1170 expected to create the function vector ourselves.
1171
1172 First look up this symbol in the linker hash table -- we need
1173 the derived linker symbol which holds this symbol's index
1174 in the function vector. */
1175 name = symbol->name;
1176 if (symbol->flags & BSF_LOCAL)
1177 {
1178 char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10);
1179
1180 if (new_name == NULL)
1181 abort ();
1182
1183 sprintf (new_name, "%s_%08x", name, symbol->section->id);
1184 name = new_name;
1185 }
1186
1187 ftab = htab->funcvec_hash_table;
1188 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1189
1190 /* This shouldn't ever happen. If it does that means we've got
1191 data corruption of some kind. Aborting seems like a reasonable
1192 thing to do here. */
1193 if (h == NULL || vectors_sec == NULL)
1194 abort ();
1195
1196 /* Place the address of the function vector entry into the
1197 reloc's address. */
1198 bfd_put_8 (abfd,
1199 vectors_sec->output_offset + h->offset,
1200 data + dst_address);
1201
1202 dst_address++;
1203 src_address++;
1204
1205 /* Now create an entry in the function vector itself. */
1206 switch (bfd_get_mach (input_section->owner))
1207 {
1208 case bfd_mach_h8300:
1209 case bfd_mach_h8300hn:
1210 case bfd_mach_h8300sn:
1211 bfd_put_16 (abfd,
1212 bfd_coff_reloc16_get_value (reloc,
1213 link_info,
1214 input_section),
1215 vectors_sec->contents + h->offset);
1216 break;
1217 case bfd_mach_h8300h:
1218 case bfd_mach_h8300s:
1219 bfd_put_32 (abfd,
1220 bfd_coff_reloc16_get_value (reloc,
1221 link_info,
1222 input_section),
1223 vectors_sec->contents + h->offset);
1224 break;
1225 default:
1226 abort ();
1227 }
1228
1229 /* Gross. We've already written the contents of the vector section
1230 before we get here... So we write it again with the new data. */
1231 bfd_set_section_contents (vectors_sec->output_section->owner,
1232 vectors_sec->output_section,
1233 vectors_sec->contents,
1234 (file_ptr) vectors_sec->output_offset,
1235 vectors_sec->size);
1236 break;
1237 }
1238
1239 default:
1240 abort ();
1241 break;
1242
1243 }
1244
1245 *src_ptr = src_address;
1246 *dst_ptr = dst_address;
1247 }
1248
1249 /* Routine for the h8300 linker.
1250
1251 This routine is necessary to handle the special R_MEM_INDIRECT
1252 relocs on the h8300. It's responsible for generating a vectors
1253 section and attaching it to an input bfd as well as sizing
1254 the vectors section. It also creates our vectors hash table.
1255
1256 It uses the generic linker routines to actually add the symbols.
1257 from this BFD to the bfd linker hash table. It may add a few
1258 selected static symbols to the bfd linker hash table. */
1259
1260 static bfd_boolean
h8300_bfd_link_add_symbols(bfd * abfd,struct bfd_link_info * info)1261 h8300_bfd_link_add_symbols (bfd *abfd, struct bfd_link_info *info)
1262 {
1263 asection *sec;
1264 struct funcvec_hash_table *funcvec_hash_table;
1265 bfd_size_type amt;
1266 struct h8300_coff_link_hash_table *htab;
1267
1268 /* Add the symbols using the generic code. */
1269 _bfd_generic_link_add_symbols (abfd, info);
1270
1271 if (info->hash->creator != abfd->xvec)
1272 return TRUE;
1273
1274 htab = h8300_coff_hash_table (info);
1275
1276 /* If we haven't created a vectors section, do so now. */
1277 if (!htab->vectors_sec)
1278 {
1279 flagword flags;
1280
1281 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1282 flags = (SEC_ALLOC | SEC_LOAD
1283 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY);
1284 htab->vectors_sec = bfd_make_section (abfd, ".vectors");
1285
1286 /* If the section wasn't created, or we couldn't set the flags,
1287 quit quickly now, rather than dying a painful death later. */
1288 if (!htab->vectors_sec
1289 || !bfd_set_section_flags (abfd, htab->vectors_sec, flags))
1290 return FALSE;
1291
1292 /* Also create the vector hash table. */
1293 amt = sizeof (struct funcvec_hash_table);
1294 funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt);
1295
1296 if (!funcvec_hash_table)
1297 return FALSE;
1298
1299 /* And initialize the funcvec hash table. */
1300 if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
1301 funcvec_hash_newfunc))
1302 {
1303 bfd_release (abfd, funcvec_hash_table);
1304 return FALSE;
1305 }
1306
1307 /* Store away a pointer to the funcvec hash table. */
1308 htab->funcvec_hash_table = funcvec_hash_table;
1309 }
1310
1311 /* Load up the function vector hash table. */
1312 funcvec_hash_table = htab->funcvec_hash_table;
1313
1314 /* Now scan the relocs for all the sections in this bfd; create
1315 additional space in the .vectors section as needed. */
1316 for (sec = abfd->sections; sec; sec = sec->next)
1317 {
1318 long reloc_size, reloc_count, i;
1319 asymbol **symbols;
1320 arelent **relocs;
1321
1322 /* Suck in the relocs, symbols & canonicalize them. */
1323 reloc_size = bfd_get_reloc_upper_bound (abfd, sec);
1324 if (reloc_size <= 0)
1325 continue;
1326
1327 relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size);
1328 if (!relocs)
1329 return FALSE;
1330
1331 /* The symbols should have been read in by _bfd_generic link_add_symbols
1332 call abovec, so we can cheat and use the pointer to them that was
1333 saved in the above call. */
1334 symbols = _bfd_generic_link_get_symbols(abfd);
1335 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols);
1336 if (reloc_count <= 0)
1337 {
1338 free (relocs);
1339 continue;
1340 }
1341
1342 /* Now walk through all the relocations in this section. */
1343 for (i = 0; i < reloc_count; i++)
1344 {
1345 arelent *reloc = relocs[i];
1346 asymbol *symbol = *(reloc->sym_ptr_ptr);
1347 const char *name;
1348
1349 /* We've got an indirect reloc. See if we need to add it
1350 to the function vector table. At this point, we have
1351 to add a new entry for each unique symbol referenced
1352 by an R_MEM_INDIRECT relocation except for a reloc
1353 against the absolute section symbol. */
1354 if (reloc->howto->type == R_MEM_INDIRECT
1355 && symbol != bfd_abs_section_ptr->symbol)
1356
1357 {
1358 struct funcvec_hash_table *ftab;
1359 struct funcvec_hash_entry *h;
1360
1361 name = symbol->name;
1362 if (symbol->flags & BSF_LOCAL)
1363 {
1364 char *new_name;
1365
1366 new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10);
1367 if (new_name == NULL)
1368 abort ();
1369
1370 sprintf (new_name, "%s_%08x", name, symbol->section->id);
1371 name = new_name;
1372 }
1373
1374 /* Look this symbol up in the function vector hash table. */
1375 ftab = htab->funcvec_hash_table;
1376 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1377
1378 /* If this symbol isn't already in the hash table, add
1379 it and bump up the size of the hash table. */
1380 if (h == NULL)
1381 {
1382 h = funcvec_hash_lookup (ftab, name, TRUE, TRUE);
1383 if (h == NULL)
1384 {
1385 free (relocs);
1386 return FALSE;
1387 }
1388
1389 /* Bump the size of the vectors section. Each vector
1390 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1391 switch (bfd_get_mach (abfd))
1392 {
1393 case bfd_mach_h8300:
1394 case bfd_mach_h8300hn:
1395 case bfd_mach_h8300sn:
1396 htab->vectors_sec->size += 2;
1397 break;
1398 case bfd_mach_h8300h:
1399 case bfd_mach_h8300s:
1400 htab->vectors_sec->size += 4;
1401 break;
1402 default:
1403 abort ();
1404 }
1405 }
1406 }
1407 }
1408
1409 /* We're done with the relocations, release them. */
1410 free (relocs);
1411 }
1412
1413 /* Now actually allocate some space for the function vector. It's
1414 wasteful to do this more than once, but this is easier. */
1415 sec = htab->vectors_sec;
1416 if (sec->size != 0)
1417 {
1418 /* Free the old contents. */
1419 if (sec->contents)
1420 free (sec->contents);
1421
1422 /* Allocate new contents. */
1423 sec->contents = bfd_malloc (sec->size);
1424 }
1425
1426 return TRUE;
1427 }
1428
1429 #define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1430 #define coff_reloc16_estimate h8300_reloc16_estimate
1431 #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1432 #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1433
1434 #define COFF_LONG_FILENAMES
1435 #include "coffcode.h"
1436
1437 #undef coff_bfd_get_relocated_section_contents
1438 #undef coff_bfd_relax_section
1439 #define coff_bfd_get_relocated_section_contents \
1440 bfd_coff_reloc16_get_relocated_section_contents
1441 #define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1442
1443 CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL, COFF_SWAP_TABLE)
1444