1 /*- 2 * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org> 3 * Copyright (c) 2009, Luiz Otavio O Souza. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: stable/9/sys/mips/atheros/ar71xx_gpiovar.h 221518 2011-05-06 02:45:02Z adrian $ 29 * 30 */ 31 32 #ifndef __AR71XX_GPIOVAR_H__ 33 #define __AR71XX_GPIOVAR_H__ 34 35 #define GPIO_LOCK(_sc) mtx_lock(&(_sc)->gpio_mtx) 36 #define GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->gpio_mtx) 37 #define GPIO_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->gpio_mtx, MA_OWNED) 38 39 /* 40 * register space access macros 41 */ 42 #define GPIO_WRITE(sc, reg, val) do { \ 43 bus_write_4(sc->gpio_mem_res, (reg), (val)); \ 44 } while (0) 45 46 #define GPIO_READ(sc, reg) bus_read_4(sc->gpio_mem_res, (reg)) 47 48 #define GPIO_SET_BITS(sc, reg, bits) \ 49 GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) | (bits)) 50 51 #define GPIO_CLEAR_BITS(sc, reg, bits) \ 52 GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) & ~(bits)) 53 54 #define AR71XX_GPIO_PINS 12 55 #define AR724X_GPIO_PINS 18 56 #define AR91XX_GPIO_PINS 22 57 58 struct ar71xx_gpio_softc { 59 device_t dev; 60 struct mtx gpio_mtx; 61 struct resource *gpio_mem_res; 62 int gpio_mem_rid; 63 struct resource *gpio_irq_res; 64 int gpio_irq_rid; 65 void *gpio_ih; 66 int gpio_npins; 67 struct gpio_pin gpio_pins[AR71XX_GPIO_PINS]; 68 }; 69 70 #endif /* __AR71XX_GPIOVAR_H__ */ 71