1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD: stable/9/sys/dev/drm2/i915/intel_sdvo.c 261631 2014-02-08 10:57:46Z dumbbell $");
31
32 #include <dev/drm2/drmP.h>
33 #include <dev/drm2/drm.h>
34 #include <dev/drm2/drm_crtc.h>
35 #include <dev/drm2/drm_edid.h>
36 #include <dev/drm2/i915/i915_drm.h>
37 #include <dev/drm2/i915/i915_drv.h>
38 #include <dev/drm2/i915/intel_sdvo_regs.h>
39 #include <dev/drm2/i915/intel_drv.h>
40 #include <dev/iicbus/iic.h>
41 #include <dev/iicbus/iiconf.h>
42 #include "iicbus_if.h"
43
44 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
45 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
46 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
47 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
48
49 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
50 SDVO_TV_MASK)
51
52 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
53 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
54 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
55 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
56 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
57
58
59 static const char *tv_format_names[] = {
60 "NTSC_M" , "NTSC_J" , "NTSC_443",
61 "PAL_B" , "PAL_D" , "PAL_G" ,
62 "PAL_H" , "PAL_I" , "PAL_M" ,
63 "PAL_N" , "PAL_NC" , "PAL_60" ,
64 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
65 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
66 "SECAM_60"
67 };
68
69 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
70
71 struct intel_sdvo {
72 struct intel_encoder base;
73
74 device_t i2c;
75 u8 slave_addr;
76
77 device_t ddc_iic_bus, ddc;
78
79 /* Register for the SDVO device: SDVOB or SDVOC */
80 int sdvo_reg;
81
82 /* Active outputs controlled by this SDVO output */
83 uint16_t controlled_output;
84
85 /*
86 * Capabilities of the SDVO device returned by
87 * i830_sdvo_get_capabilities()
88 */
89 struct intel_sdvo_caps caps;
90
91 /* Pixel clock limitations reported by the SDVO device, in kHz */
92 int pixel_clock_min, pixel_clock_max;
93
94 /*
95 * For multiple function SDVO device,
96 * this is for current attached outputs.
97 */
98 uint16_t attached_output;
99
100 /*
101 * Hotplug activation bits for this device
102 */
103 uint8_t hotplug_active[2];
104
105 /**
106 * This is used to select the color range of RBG outputs in HDMI mode.
107 * It is only valid when using TMDS encoding and 8 bit per color mode.
108 */
109 uint32_t color_range;
110
111 /**
112 * This is set if we're going to treat the device as TV-out.
113 *
114 * While we have these nice friendly flags for output types that ought
115 * to decide this for us, the S-Video output on our HDMI+S-Video card
116 * shows up as RGB1 (VGA).
117 */
118 bool is_tv;
119
120 /* This is for current tv format name */
121 int tv_format_index;
122
123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
129
130 /**
131 * This is set if we detect output of sdvo device as LVDS and
132 * have a valid fixed mode to use with the panel.
133 */
134 bool is_lvds;
135
136 /**
137 * This is sdvo fixed pannel mode pointer
138 */
139 struct drm_display_mode *sdvo_lvds_fixed_mode;
140
141 /* DDC bus used by this SDVO encoder */
142 uint8_t ddc_bus;
143
144 /* Input timings for adjusted_mode */
145 struct intel_sdvo_dtd input_dtd;
146 };
147
148 struct intel_sdvo_connector {
149 struct intel_connector base;
150
151 /* Mark the type of connector */
152 uint16_t output_flag;
153
154 enum hdmi_force_audio force_audio;
155
156 /* This contains all current supported TV format */
157 u8 tv_format_supported[TV_FORMAT_NUM];
158 int format_supported_num;
159 struct drm_property *tv_format;
160
161 /* add the property for the SDVO-TV */
162 struct drm_property *left;
163 struct drm_property *right;
164 struct drm_property *top;
165 struct drm_property *bottom;
166 struct drm_property *hpos;
167 struct drm_property *vpos;
168 struct drm_property *contrast;
169 struct drm_property *saturation;
170 struct drm_property *hue;
171 struct drm_property *sharpness;
172 struct drm_property *flicker_filter;
173 struct drm_property *flicker_filter_adaptive;
174 struct drm_property *flicker_filter_2d;
175 struct drm_property *tv_chroma_filter;
176 struct drm_property *tv_luma_filter;
177 struct drm_property *dot_crawl;
178
179 /* add the property for the SDVO-TV/LVDS */
180 struct drm_property *brightness;
181
182 /* Add variable to record current setting for the above property */
183 u32 left_margin, right_margin, top_margin, bottom_margin;
184
185 /* this is to get the range of margin.*/
186 u32 max_hscan, max_vscan;
187 u32 max_hpos, cur_hpos;
188 u32 max_vpos, cur_vpos;
189 u32 cur_brightness, max_brightness;
190 u32 cur_contrast, max_contrast;
191 u32 cur_saturation, max_saturation;
192 u32 cur_hue, max_hue;
193 u32 cur_sharpness, max_sharpness;
194 u32 cur_flicker_filter, max_flicker_filter;
195 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
196 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
197 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
198 u32 cur_tv_luma_filter, max_tv_luma_filter;
199 u32 cur_dot_crawl, max_dot_crawl;
200 };
201
to_intel_sdvo(struct drm_encoder * encoder)202 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
203 {
204 return container_of(encoder, struct intel_sdvo, base.base);
205 }
206
intel_attached_sdvo(struct drm_connector * connector)207 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
208 {
209 return container_of(intel_attached_encoder(connector),
210 struct intel_sdvo, base);
211 }
212
to_intel_sdvo_connector(struct drm_connector * connector)213 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
214 {
215 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
216 }
217
218 static bool
219 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
220 static bool
221 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
222 struct intel_sdvo_connector *intel_sdvo_connector,
223 int type);
224 static bool
225 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
226 struct intel_sdvo_connector *intel_sdvo_connector);
227
228 /**
229 * Writes the SDVOB or SDVOC with the given value, but always writes both
230 * SDVOB and SDVOC to work around apparent hardware issues (according to
231 * comments in the BIOS).
232 */
intel_sdvo_write_sdvox(struct intel_sdvo * intel_sdvo,u32 val)233 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
234 {
235 struct drm_device *dev = intel_sdvo->base.base.dev;
236 struct drm_i915_private *dev_priv = dev->dev_private;
237 u32 bval = val, cval = val;
238 int i;
239
240 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
241 I915_WRITE(intel_sdvo->sdvo_reg, val);
242 I915_READ(intel_sdvo->sdvo_reg);
243 return;
244 }
245
246 if (intel_sdvo->sdvo_reg == SDVOB) {
247 cval = I915_READ(SDVOC);
248 } else {
249 bval = I915_READ(SDVOB);
250 }
251 /*
252 * Write the registers twice for luck. Sometimes,
253 * writing them only once doesn't appear to 'stick'.
254 * The BIOS does this too. Yay, magic
255 */
256 for (i = 0; i < 2; i++)
257 {
258 I915_WRITE(SDVOB, bval);
259 I915_READ(SDVOB);
260 I915_WRITE(SDVOC, cval);
261 I915_READ(SDVOC);
262 }
263 }
264
intel_sdvo_read_byte(struct intel_sdvo * intel_sdvo,u8 addr,u8 * ch)265 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
266 {
267 struct iic_msg msgs[] = {
268 {
269 .slave = intel_sdvo->slave_addr << 1,
270 .flags = 0,
271 .len = 1,
272 .buf = &addr,
273 },
274 {
275 .slave = intel_sdvo->slave_addr << 1,
276 .flags = IIC_M_RD,
277 .len = 1,
278 .buf = ch,
279 }
280 };
281 int ret;
282
283 if ((ret = iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0)
284 return true;
285
286 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
287 return false;
288 }
289
290 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
291 /** Mapping of command numbers to names, for debug output */
292 static const struct _sdvo_cmd_name {
293 u8 cmd;
294 const char *name;
295 } sdvo_cmd_names[] = {
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
339
340 /* Add the op code for SDVO enhancements */
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
385
386 /* HDMI op code */
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
407 };
408
409 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
410 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
411
412 static void
intel_sdvo_debug_write(struct intel_sdvo * intel_sdvo,u8 cmd,const void * args,int args_len)413 intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
414 const void *args, int args_len)
415 {
416 int i;
417
418 if ((drm_debug_flag & DRM_DEBUGBITS_KMS) == 0)
419 return;
420 DRM_DEBUG_KMS("%s: W: %02X ", SDVO_NAME(intel_sdvo), cmd);
421 for (i = 0; i < args_len; i++)
422 printf("%02X ", ((const u8 *)args)[i]);
423 for (; i < 8; i++)
424 printf(" ");
425 for (i = 0; i < DRM_ARRAY_SIZE(sdvo_cmd_names); i++) {
426 if (cmd == sdvo_cmd_names[i].cmd) {
427 printf("(%s)", sdvo_cmd_names[i].name);
428 break;
429 }
430 }
431 if (i == DRM_ARRAY_SIZE(sdvo_cmd_names))
432 printf("(%02X)", cmd);
433 printf("\n");
434 }
435
436 static const char *cmd_status_names[] = {
437 "Power on",
438 "Success",
439 "Not supported",
440 "Invalid arg",
441 "Pending",
442 "Target not specified",
443 "Scaling not supported"
444 };
445
446 static bool
intel_sdvo_write_cmd(struct intel_sdvo * intel_sdvo,u8 cmd,const void * args,int args_len)447 intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, const void *args,
448 int args_len)
449 {
450 u8 buf[args_len*2 + 2], status;
451 struct iic_msg msgs[args_len + 3];
452 int i, ret;
453
454 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
455
456 for (i = 0; i < args_len; i++) {
457 msgs[i].slave = intel_sdvo->slave_addr << 1;
458 msgs[i].flags = 0;
459 msgs[i].len = 2;
460 msgs[i].buf = buf + 2 *i;
461 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
462 buf[2*i + 1] = ((const u8*)args)[i];
463 }
464 msgs[i].slave = intel_sdvo->slave_addr << 1;
465 msgs[i].flags = 0;
466 msgs[i].len = 2;
467 msgs[i].buf = buf + 2*i;
468 buf[2*i + 0] = SDVO_I2C_OPCODE;
469 buf[2*i + 1] = cmd;
470
471 /* the following two are to read the response */
472 status = SDVO_I2C_CMD_STATUS;
473 msgs[i+1].slave = intel_sdvo->slave_addr << 1;
474 msgs[i+1].flags = 0;
475 msgs[i+1].len = 1;
476 msgs[i+1].buf = &status;
477
478 msgs[i+2].slave = intel_sdvo->slave_addr << 1;
479 msgs[i+2].flags = IIC_M_RD;
480 msgs[i+2].len = 1;
481 msgs[i+2].buf = &status;
482
483 ret = iicbus_transfer(intel_sdvo->i2c, msgs, i+3);
484 if (ret != 0) {
485 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
486 return (false);
487 }
488 #if 0
489 if (ret != i+3) {
490 /* failure in I2C transfer */
491 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
492 return false;
493 }
494 #endif
495
496 return true;
497 }
498
499 static bool
intel_sdvo_read_response(struct intel_sdvo * intel_sdvo,void * response,int response_len)500 intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, void *response,
501 int response_len)
502 {
503 u8 retry = 5;
504 u8 status;
505 int i;
506
507 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
508
509 /*
510 * The documentation states that all commands will be
511 * processed within 15µs, and that we need only poll
512 * the status byte a maximum of 3 times in order for the
513 * command to be complete.
514 *
515 * Check 5 times in case the hardware failed to read the docs.
516 */
517 if (!intel_sdvo_read_byte(intel_sdvo, SDVO_I2C_CMD_STATUS, &status))
518 goto log_fail;
519
520 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
521 DELAY(15);
522 if (!intel_sdvo_read_byte(intel_sdvo,
523 SDVO_I2C_CMD_STATUS, &status))
524 goto log_fail;
525 }
526
527 if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0) {
528 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
529 printf("(%s)", cmd_status_names[status]);
530 else
531 printf("(??? %d)", status);
532 }
533
534 if (status != SDVO_CMD_STATUS_SUCCESS)
535 goto log_fail;
536
537 /* Read the command response */
538 for (i = 0; i < response_len; i++) {
539 if (!intel_sdvo_read_byte(intel_sdvo,
540 SDVO_I2C_RETURN_0 + i,
541 &((u8 *)response)[i]))
542 goto log_fail;
543 if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0)
544 printf(" %02X", ((u8 *)response)[i]);
545 }
546 if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0)
547 printf("\n");
548 return (true);
549
550 log_fail:
551 if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0)
552 printf("... failed\n");
553 return (false);
554 }
555
intel_sdvo_get_pixel_multiplier(struct drm_display_mode * mode)556 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
557 {
558 if (mode->clock >= 100000)
559 return 1;
560 else if (mode->clock >= 50000)
561 return 2;
562 else
563 return 4;
564 }
565
intel_sdvo_set_control_bus_switch(struct intel_sdvo * intel_sdvo,u8 ddc_bus)566 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
567 u8 ddc_bus)
568 {
569 /* This must be the immediately preceding write before the i2c xfer */
570 return intel_sdvo_write_cmd(intel_sdvo,
571 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
572 &ddc_bus, 1);
573 }
574
intel_sdvo_set_value(struct intel_sdvo * intel_sdvo,u8 cmd,const void * data,int len)575 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
576 {
577 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
578 return false;
579
580 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
581 }
582
583 static bool
intel_sdvo_get_value(struct intel_sdvo * intel_sdvo,u8 cmd,void * value,int len)584 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
585 {
586 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
587 return false;
588
589 return intel_sdvo_read_response(intel_sdvo, value, len);
590 }
591
intel_sdvo_set_target_input(struct intel_sdvo * intel_sdvo)592 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
593 {
594 struct intel_sdvo_set_target_input_args targets = {0};
595 return intel_sdvo_set_value(intel_sdvo,
596 SDVO_CMD_SET_TARGET_INPUT,
597 &targets, sizeof(targets));
598 }
599
600 /**
601 * Return whether each input is trained.
602 *
603 * This function is making an assumption about the layout of the response,
604 * which should be checked against the docs.
605 */
intel_sdvo_get_trained_inputs(struct intel_sdvo * intel_sdvo,bool * input_1,bool * input_2)606 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
607 {
608 struct intel_sdvo_get_trained_inputs_response response;
609
610 CTASSERT(sizeof(response) == 1);
611 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
612 &response, sizeof(response)))
613 return false;
614
615 *input_1 = response.input0_trained;
616 *input_2 = response.input1_trained;
617 return true;
618 }
619
intel_sdvo_set_active_outputs(struct intel_sdvo * intel_sdvo,u16 outputs)620 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
621 u16 outputs)
622 {
623 return intel_sdvo_set_value(intel_sdvo,
624 SDVO_CMD_SET_ACTIVE_OUTPUTS,
625 &outputs, sizeof(outputs));
626 }
627
intel_sdvo_set_encoder_power_state(struct intel_sdvo * intel_sdvo,int mode)628 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
629 int mode)
630 {
631 u8 state = SDVO_ENCODER_STATE_ON;
632
633 switch (mode) {
634 case DRM_MODE_DPMS_ON:
635 state = SDVO_ENCODER_STATE_ON;
636 break;
637 case DRM_MODE_DPMS_STANDBY:
638 state = SDVO_ENCODER_STATE_STANDBY;
639 break;
640 case DRM_MODE_DPMS_SUSPEND:
641 state = SDVO_ENCODER_STATE_SUSPEND;
642 break;
643 case DRM_MODE_DPMS_OFF:
644 state = SDVO_ENCODER_STATE_OFF;
645 break;
646 }
647
648 return intel_sdvo_set_value(intel_sdvo,
649 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
650 }
651
intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo * intel_sdvo,int * clock_min,int * clock_max)652 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
653 int *clock_min,
654 int *clock_max)
655 {
656 struct intel_sdvo_pixel_clock_range clocks;
657
658 CTASSERT(sizeof(clocks) == 4);
659 if (!intel_sdvo_get_value(intel_sdvo,
660 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
661 &clocks, sizeof(clocks)))
662 return false;
663
664 /* Convert the values from units of 10 kHz to kHz. */
665 *clock_min = clocks.min * 10;
666 *clock_max = clocks.max * 10;
667 return true;
668 }
669
intel_sdvo_set_target_output(struct intel_sdvo * intel_sdvo,u16 outputs)670 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
671 u16 outputs)
672 {
673 return intel_sdvo_set_value(intel_sdvo,
674 SDVO_CMD_SET_TARGET_OUTPUT,
675 &outputs, sizeof(outputs));
676 }
677
intel_sdvo_set_timing(struct intel_sdvo * intel_sdvo,u8 cmd,struct intel_sdvo_dtd * dtd)678 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
679 struct intel_sdvo_dtd *dtd)
680 {
681 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
682 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
683 }
684
intel_sdvo_set_input_timing(struct intel_sdvo * intel_sdvo,struct intel_sdvo_dtd * dtd)685 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
686 struct intel_sdvo_dtd *dtd)
687 {
688 return intel_sdvo_set_timing(intel_sdvo,
689 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
690 }
691
intel_sdvo_set_output_timing(struct intel_sdvo * intel_sdvo,struct intel_sdvo_dtd * dtd)692 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
693 struct intel_sdvo_dtd *dtd)
694 {
695 return intel_sdvo_set_timing(intel_sdvo,
696 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
697 }
698
699 static bool
intel_sdvo_create_preferred_input_timing(struct intel_sdvo * intel_sdvo,uint16_t clock,uint16_t width,uint16_t height)700 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
701 uint16_t clock,
702 uint16_t width,
703 uint16_t height)
704 {
705 struct intel_sdvo_preferred_input_timing_args args;
706
707 memset(&args, 0, sizeof(args));
708 args.clock = clock;
709 args.width = width;
710 args.height = height;
711 args.interlace = 0;
712
713 if (intel_sdvo->is_lvds &&
714 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
715 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
716 args.scaled = 1;
717
718 return intel_sdvo_set_value(intel_sdvo,
719 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
720 &args, sizeof(args));
721 }
722
intel_sdvo_get_preferred_input_timing(struct intel_sdvo * intel_sdvo,struct intel_sdvo_dtd * dtd)723 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
724 struct intel_sdvo_dtd *dtd)
725 {
726 CTASSERT(sizeof(dtd->part1) == 8);
727 CTASSERT(sizeof(dtd->part2) == 8);
728 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
729 &dtd->part1, sizeof(dtd->part1)) &&
730 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
731 &dtd->part2, sizeof(dtd->part2));
732 }
733
intel_sdvo_set_clock_rate_mult(struct intel_sdvo * intel_sdvo,u8 val)734 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
735 {
736 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
737 }
738
intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd * dtd,const struct drm_display_mode * mode)739 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
740 const struct drm_display_mode *mode)
741 {
742 uint16_t width, height;
743 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
744 uint16_t h_sync_offset, v_sync_offset;
745 int mode_clock;
746
747 width = mode->crtc_hdisplay;
748 height = mode->crtc_vdisplay;
749
750 /* do some mode translations */
751 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
752 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
753
754 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
755 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
756
757 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
758 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
759
760 mode_clock = mode->clock;
761 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
762 mode_clock /= 10;
763 dtd->part1.clock = mode_clock;
764
765 dtd->part1.h_active = width & 0xff;
766 dtd->part1.h_blank = h_blank_len & 0xff;
767 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
768 ((h_blank_len >> 8) & 0xf);
769 dtd->part1.v_active = height & 0xff;
770 dtd->part1.v_blank = v_blank_len & 0xff;
771 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
772 ((v_blank_len >> 8) & 0xf);
773
774 dtd->part2.h_sync_off = h_sync_offset & 0xff;
775 dtd->part2.h_sync_width = h_sync_len & 0xff;
776 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
777 (v_sync_len & 0xf);
778 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
779 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
780 ((v_sync_len & 0x30) >> 4);
781
782 dtd->part2.dtd_flags = 0x18;
783 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
784 dtd->part2.dtd_flags |= 0x2;
785 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
786 dtd->part2.dtd_flags |= 0x4;
787
788 dtd->part2.sdvo_flags = 0;
789 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
790 dtd->part2.reserved = 0;
791 }
792
intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,const struct intel_sdvo_dtd * dtd)793 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
794 const struct intel_sdvo_dtd *dtd)
795 {
796 mode->hdisplay = dtd->part1.h_active;
797 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
798 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
799 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
800 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
801 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
802 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
803 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
804
805 mode->vdisplay = dtd->part1.v_active;
806 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
807 mode->vsync_start = mode->vdisplay;
808 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
809 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
810 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
811 mode->vsync_end = mode->vsync_start +
812 (dtd->part2.v_sync_off_width & 0xf);
813 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
814 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
815 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
816
817 mode->clock = dtd->part1.clock * 10;
818
819 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
820 if (dtd->part2.dtd_flags & 0x2)
821 mode->flags |= DRM_MODE_FLAG_PHSYNC;
822 if (dtd->part2.dtd_flags & 0x4)
823 mode->flags |= DRM_MODE_FLAG_PVSYNC;
824 }
825
intel_sdvo_check_supp_encode(struct intel_sdvo * intel_sdvo)826 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
827 {
828 struct intel_sdvo_encode encode;
829
830 CTASSERT(sizeof(encode) == 2);
831 return intel_sdvo_get_value(intel_sdvo,
832 SDVO_CMD_GET_SUPP_ENCODE,
833 &encode, sizeof(encode));
834 }
835
intel_sdvo_set_encode(struct intel_sdvo * intel_sdvo,uint8_t mode)836 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
837 uint8_t mode)
838 {
839 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
840 }
841
intel_sdvo_set_colorimetry(struct intel_sdvo * intel_sdvo,uint8_t mode)842 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
843 uint8_t mode)
844 {
845 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
846 }
847
848 #if 0
849 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
850 {
851 int i, j;
852 uint8_t set_buf_index[2];
853 uint8_t av_split;
854 uint8_t buf_size;
855 uint8_t buf[48];
856 uint8_t *pos;
857
858 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
859
860 for (i = 0; i <= av_split; i++) {
861 set_buf_index[0] = i; set_buf_index[1] = 0;
862 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
863 set_buf_index, 2);
864 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
865 intel_sdvo_read_response(encoder, &buf_size, 1);
866
867 pos = buf;
868 for (j = 0; j <= buf_size; j += 8) {
869 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
870 NULL, 0);
871 intel_sdvo_read_response(encoder, pos, 8);
872 pos += 8;
873 }
874 }
875 }
876 #endif
877
intel_sdvo_set_avi_infoframe(struct intel_sdvo * intel_sdvo)878 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
879 {
880 struct dip_infoframe avi_if = {
881 .type = DIP_TYPE_AVI,
882 .ver = DIP_VERSION_AVI,
883 .len = DIP_LEN_AVI,
884 };
885 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
886 uint8_t set_buf_index[2] = { 1, 0 };
887 uint64_t *data = (uint64_t *)&avi_if;
888 unsigned i;
889
890 intel_dip_infoframe_csum(&avi_if);
891
892 if (!intel_sdvo_set_value(intel_sdvo,
893 SDVO_CMD_SET_HBUF_INDEX,
894 set_buf_index, 2))
895 return false;
896
897 for (i = 0; i < sizeof(avi_if); i += 8) {
898 if (!intel_sdvo_set_value(intel_sdvo,
899 SDVO_CMD_SET_HBUF_DATA,
900 data, 8))
901 return false;
902 data++;
903 }
904
905 return intel_sdvo_set_value(intel_sdvo,
906 SDVO_CMD_SET_HBUF_TXRATE,
907 &tx_rate, 1);
908 }
909
intel_sdvo_set_tv_format(struct intel_sdvo * intel_sdvo)910 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
911 {
912 struct intel_sdvo_tv_format format;
913 uint32_t format_map;
914
915 format_map = 1 << intel_sdvo->tv_format_index;
916 memset(&format, 0, sizeof(format));
917 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
918
919 CTASSERT(sizeof(format) == 6);
920 return intel_sdvo_set_value(intel_sdvo,
921 SDVO_CMD_SET_TV_FORMAT,
922 &format, sizeof(format));
923 }
924
925 static bool
intel_sdvo_set_output_timings_from_mode(struct intel_sdvo * intel_sdvo,const struct drm_display_mode * mode)926 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
927 const struct drm_display_mode *mode)
928 {
929 struct intel_sdvo_dtd output_dtd;
930
931 if (!intel_sdvo_set_target_output(intel_sdvo,
932 intel_sdvo->attached_output))
933 return false;
934
935 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
936 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
937 return false;
938
939 return true;
940 }
941
942 static bool
intel_sdvo_set_input_timings_for_mode(struct intel_sdvo * intel_sdvo,const struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)943 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
944 const struct drm_display_mode *mode,
945 struct drm_display_mode *adjusted_mode)
946 {
947 /* Reset the input timing to the screen. Assume always input 0. */
948 if (!intel_sdvo_set_target_input(intel_sdvo))
949 return false;
950
951 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
952 mode->clock / 10,
953 mode->hdisplay,
954 mode->vdisplay))
955 return false;
956
957 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
958 &intel_sdvo->input_dtd))
959 return false;
960
961 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
962
963 return true;
964 }
965
intel_sdvo_mode_fixup(struct drm_encoder * encoder,const struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)966 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
967 const struct drm_display_mode *mode,
968 struct drm_display_mode *adjusted_mode)
969 {
970 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
971 int multiplier;
972
973 /* We need to construct preferred input timings based on our
974 * output timings. To do that, we have to set the output
975 * timings, even though this isn't really the right place in
976 * the sequence to do it. Oh well.
977 */
978 if (intel_sdvo->is_tv) {
979 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
980 return false;
981
982 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
983 mode,
984 adjusted_mode);
985 } else if (intel_sdvo->is_lvds) {
986 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
987 intel_sdvo->sdvo_lvds_fixed_mode))
988 return false;
989
990 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
991 mode,
992 adjusted_mode);
993 }
994
995 /* Make the CRTC code factor in the SDVO pixel multiplier. The
996 * SDVO device will factor out the multiplier during mode_set.
997 */
998 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
999 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1000
1001 return true;
1002 }
1003
intel_sdvo_mode_set(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)1004 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1005 struct drm_display_mode *mode,
1006 struct drm_display_mode *adjusted_mode)
1007 {
1008 struct drm_device *dev = encoder->dev;
1009 struct drm_i915_private *dev_priv = dev->dev_private;
1010 struct drm_crtc *crtc = encoder->crtc;
1011 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1012 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1013 u32 sdvox;
1014 struct intel_sdvo_in_out_map in_out;
1015 struct intel_sdvo_dtd input_dtd, output_dtd;
1016 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1017 int rate;
1018
1019 if (!mode)
1020 return;
1021
1022 /* First, set the input mapping for the first input to our controlled
1023 * output. This is only correct if we're a single-input device, in
1024 * which case the first input is the output from the appropriate SDVO
1025 * channel on the motherboard. In a two-input device, the first input
1026 * will be SDVOB and the second SDVOC.
1027 */
1028 in_out.in0 = intel_sdvo->attached_output;
1029 in_out.in1 = 0;
1030
1031 intel_sdvo_set_value(intel_sdvo,
1032 SDVO_CMD_SET_IN_OUT_MAP,
1033 &in_out, sizeof(in_out));
1034
1035 /* Set the output timings to the screen */
1036 if (!intel_sdvo_set_target_output(intel_sdvo,
1037 intel_sdvo->attached_output))
1038 return;
1039
1040 /* lvds has a special fixed output timing. */
1041 if (intel_sdvo->is_lvds)
1042 intel_sdvo_get_dtd_from_mode(&output_dtd,
1043 intel_sdvo->sdvo_lvds_fixed_mode);
1044 else
1045 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1046 (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
1047
1048 /* Set the input timing to the screen. Assume always input 0. */
1049 if (!intel_sdvo_set_target_input(intel_sdvo))
1050 return;
1051
1052 if (intel_sdvo->has_hdmi_monitor) {
1053 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1054 intel_sdvo_set_colorimetry(intel_sdvo,
1055 SDVO_COLORIMETRY_RGB256);
1056 intel_sdvo_set_avi_infoframe(intel_sdvo);
1057 } else
1058 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1059
1060 if (intel_sdvo->is_tv &&
1061 !intel_sdvo_set_tv_format(intel_sdvo))
1062 return;
1063
1064 /* We have tried to get input timing in mode_fixup, and filled into
1065 * adjusted_mode.
1066 */
1067 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1068 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1069
1070 switch (pixel_multiplier) {
1071 default:
1072 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1073 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1074 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1075 }
1076 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1077 return;
1078
1079 /* Set the SDVO control regs. */
1080 if (INTEL_INFO(dev)->gen >= 4) {
1081 /* The real mode polarity is set by the SDVO commands, using
1082 * struct intel_sdvo_dtd. */
1083 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1084 if (intel_sdvo->is_hdmi)
1085 sdvox |= intel_sdvo->color_range;
1086 if (INTEL_INFO(dev)->gen < 5)
1087 sdvox |= SDVO_BORDER_ENABLE;
1088 } else {
1089 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1090 switch (intel_sdvo->sdvo_reg) {
1091 case SDVOB:
1092 sdvox &= SDVOB_PRESERVE_MASK;
1093 break;
1094 case SDVOC:
1095 sdvox &= SDVOC_PRESERVE_MASK;
1096 break;
1097 }
1098 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1099 }
1100
1101 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1102 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1103 else
1104 sdvox |= TRANSCODER(intel_crtc->pipe);
1105
1106 if (intel_sdvo->has_hdmi_audio)
1107 sdvox |= SDVO_AUDIO_ENABLE;
1108
1109 if (INTEL_INFO(dev)->gen >= 4) {
1110 /* done in crtc_mode_set as the dpll_md reg must be written early */
1111 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1112 /* done in crtc_mode_set as it lives inside the dpll register */
1113 } else {
1114 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1115 }
1116
1117 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1118 INTEL_INFO(dev)->gen < 5)
1119 sdvox |= SDVO_STALL_SELECT;
1120 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1121 }
1122
intel_sdvo_dpms(struct drm_encoder * encoder,int mode)1123 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1124 {
1125 struct drm_device *dev = encoder->dev;
1126 struct drm_i915_private *dev_priv = dev->dev_private;
1127 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1128 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1129 u32 temp;
1130
1131 if (mode != DRM_MODE_DPMS_ON) {
1132 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1133 if (0)
1134 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1135
1136 if (mode == DRM_MODE_DPMS_OFF) {
1137 temp = I915_READ(intel_sdvo->sdvo_reg);
1138 if ((temp & SDVO_ENABLE) != 0) {
1139 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1140 }
1141 }
1142 } else {
1143 bool input1, input2;
1144 int i;
1145 u8 status;
1146
1147 temp = I915_READ(intel_sdvo->sdvo_reg);
1148 if ((temp & SDVO_ENABLE) == 0)
1149 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1150 for (i = 0; i < 2; i++)
1151 intel_wait_for_vblank(dev, intel_crtc->pipe);
1152
1153 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1154 /* Warn if the device reported failure to sync.
1155 * A lot of SDVO devices fail to notify of sync, but it's
1156 * a given it the status is a success, we succeeded.
1157 */
1158 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1159 DRM_DEBUG_KMS("First %s output reported failure to "
1160 "sync\n", SDVO_NAME(intel_sdvo));
1161 }
1162
1163 if (0)
1164 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1165 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1166 }
1167 return;
1168 }
1169
intel_sdvo_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)1170 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1171 struct drm_display_mode *mode)
1172 {
1173 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1174
1175 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1176 return MODE_NO_DBLESCAN;
1177
1178 if (intel_sdvo->pixel_clock_min > mode->clock)
1179 return MODE_CLOCK_LOW;
1180
1181 if (intel_sdvo->pixel_clock_max < mode->clock)
1182 return MODE_CLOCK_HIGH;
1183
1184 if (intel_sdvo->is_lvds) {
1185 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1186 return MODE_PANEL;
1187
1188 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1189 return MODE_PANEL;
1190 }
1191
1192 return MODE_OK;
1193 }
1194
intel_sdvo_get_capabilities(struct intel_sdvo * intel_sdvo,struct intel_sdvo_caps * caps)1195 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1196 {
1197 CTASSERT(sizeof(*caps) == 8);
1198 if (!intel_sdvo_get_value(intel_sdvo,
1199 SDVO_CMD_GET_DEVICE_CAPS,
1200 caps, sizeof(*caps)))
1201 return false;
1202
1203 DRM_DEBUG_KMS("SDVO capabilities:\n"
1204 " vendor_id: %d\n"
1205 " device_id: %d\n"
1206 " device_rev_id: %d\n"
1207 " sdvo_version_major: %d\n"
1208 " sdvo_version_minor: %d\n"
1209 " sdvo_inputs_mask: %d\n"
1210 " smooth_scaling: %d\n"
1211 " sharp_scaling: %d\n"
1212 " up_scaling: %d\n"
1213 " down_scaling: %d\n"
1214 " stall_support: %d\n"
1215 " output_flags: %d\n",
1216 caps->vendor_id,
1217 caps->device_id,
1218 caps->device_rev_id,
1219 caps->sdvo_version_major,
1220 caps->sdvo_version_minor,
1221 caps->sdvo_inputs_mask,
1222 caps->smooth_scaling,
1223 caps->sharp_scaling,
1224 caps->up_scaling,
1225 caps->down_scaling,
1226 caps->stall_support,
1227 caps->output_flags);
1228
1229 return true;
1230 }
1231
intel_sdvo_supports_hotplug(struct intel_sdvo * intel_sdvo)1232 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1233 {
1234 struct drm_device *dev = intel_sdvo->base.base.dev;
1235 u8 response[2];
1236
1237 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1238 * on the line. */
1239 if (IS_I945G(dev) || IS_I945GM(dev))
1240 return false;
1241
1242 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1243 &response, 2) && response[0];
1244 }
1245
intel_sdvo_enable_hotplug(struct intel_encoder * encoder)1246 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1247 {
1248 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1249
1250 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1251 &intel_sdvo->hotplug_active, 2);
1252 }
1253
1254 static bool
intel_sdvo_multifunc_encoder(struct intel_sdvo * intel_sdvo)1255 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1256 {
1257 /* Is there more than one type of output? */
1258 return bitcount16(intel_sdvo->caps.output_flags) > 1;
1259 }
1260
1261 static struct edid *
intel_sdvo_get_edid(struct drm_connector * connector)1262 intel_sdvo_get_edid(struct drm_connector *connector)
1263 {
1264 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1265 return drm_get_edid(connector, sdvo->ddc);
1266 }
1267
1268 /* Mac mini hack -- use the same DDC as the analog connector */
1269 static struct edid *
intel_sdvo_get_analog_edid(struct drm_connector * connector)1270 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1271 {
1272 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1273
1274 return drm_get_edid(connector,
1275 dev_priv->gmbus[dev_priv->crt_ddc_pin]);
1276 }
1277
1278 static enum drm_connector_status
intel_sdvo_tmds_sink_detect(struct drm_connector * connector)1279 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1280 {
1281 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1282 enum drm_connector_status status;
1283 struct edid *edid;
1284
1285 edid = intel_sdvo_get_edid(connector);
1286
1287 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1288 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1289
1290 /*
1291 * Don't use the 1 as the argument of DDC bus switch to get
1292 * the EDID. It is used for SDVO SPD ROM.
1293 */
1294 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1295 intel_sdvo->ddc_bus = ddc;
1296 edid = intel_sdvo_get_edid(connector);
1297 if (edid)
1298 break;
1299 }
1300 /*
1301 * If we found the EDID on the other bus,
1302 * assume that is the correct DDC bus.
1303 */
1304 if (edid == NULL)
1305 intel_sdvo->ddc_bus = saved_ddc;
1306 }
1307
1308 /*
1309 * When there is no edid and no monitor is connected with VGA
1310 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1311 */
1312 if (edid == NULL)
1313 edid = intel_sdvo_get_analog_edid(connector);
1314
1315 status = connector_status_unknown;
1316 if (edid != NULL) {
1317 /* DDC bus is shared, match EDID to connector type */
1318 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1319 status = connector_status_connected;
1320 if (intel_sdvo->is_hdmi) {
1321 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1322 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1323 }
1324 } else
1325 status = connector_status_disconnected;
1326 connector->display_info.raw_edid = NULL;
1327 free(edid, DRM_MEM_KMS);
1328 }
1329
1330 if (status == connector_status_connected) {
1331 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1332 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1333 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1334 }
1335
1336 return status;
1337 }
1338
1339 static bool
intel_sdvo_connector_matches_edid(struct intel_sdvo_connector * sdvo,struct edid * edid)1340 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1341 struct edid *edid)
1342 {
1343 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1344 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1345
1346 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1347 connector_is_digital, monitor_is_digital);
1348 return connector_is_digital == monitor_is_digital;
1349 }
1350
1351 static enum drm_connector_status
intel_sdvo_detect(struct drm_connector * connector,bool force)1352 intel_sdvo_detect(struct drm_connector *connector, bool force)
1353 {
1354 uint16_t response;
1355 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1356 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1357 enum drm_connector_status ret;
1358
1359 if (!intel_sdvo_write_cmd(intel_sdvo,
1360 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1361 return connector_status_unknown;
1362
1363 /* add 30ms delay when the output type might be TV */
1364 if (intel_sdvo->caps.output_flags &
1365 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1366 drm_msleep(30, "915svo");
1367
1368 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1369 return connector_status_unknown;
1370
1371 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1372 response & 0xff, response >> 8,
1373 intel_sdvo_connector->output_flag);
1374
1375 if (response == 0)
1376 return connector_status_disconnected;
1377
1378 intel_sdvo->attached_output = response;
1379
1380 intel_sdvo->has_hdmi_monitor = false;
1381 intel_sdvo->has_hdmi_audio = false;
1382
1383 if ((intel_sdvo_connector->output_flag & response) == 0)
1384 ret = connector_status_disconnected;
1385 else if (IS_TMDS(intel_sdvo_connector))
1386 ret = intel_sdvo_tmds_sink_detect(connector);
1387 else {
1388 struct edid *edid;
1389
1390 /* if we have an edid check it matches the connection */
1391 edid = intel_sdvo_get_edid(connector);
1392 if (edid == NULL)
1393 edid = intel_sdvo_get_analog_edid(connector);
1394 if (edid != NULL) {
1395 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1396 edid))
1397 ret = connector_status_connected;
1398 else
1399 ret = connector_status_disconnected;
1400
1401 connector->display_info.raw_edid = NULL;
1402 free(edid, DRM_MEM_KMS);
1403 } else
1404 ret = connector_status_connected;
1405 }
1406
1407 /* May update encoder flag for like clock for SDVO TV, etc.*/
1408 if (ret == connector_status_connected) {
1409 intel_sdvo->is_tv = false;
1410 intel_sdvo->is_lvds = false;
1411 intel_sdvo->base.needs_tv_clock = false;
1412
1413 if (response & SDVO_TV_MASK) {
1414 intel_sdvo->is_tv = true;
1415 intel_sdvo->base.needs_tv_clock = true;
1416 }
1417 if (response & SDVO_LVDS_MASK)
1418 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1419 }
1420
1421 return ret;
1422 }
1423
intel_sdvo_get_ddc_modes(struct drm_connector * connector)1424 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1425 {
1426 struct edid *edid;
1427
1428 /* set the bus switch and get the modes */
1429 edid = intel_sdvo_get_edid(connector);
1430
1431 /*
1432 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1433 * link between analog and digital outputs. So, if the regular SDVO
1434 * DDC fails, check to see if the analog output is disconnected, in
1435 * which case we'll look there for the digital DDC data.
1436 */
1437 if (edid == NULL)
1438 edid = intel_sdvo_get_analog_edid(connector);
1439
1440 if (edid != NULL) {
1441 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1442 edid)) {
1443 drm_mode_connector_update_edid_property(connector, edid);
1444 drm_add_edid_modes(connector, edid);
1445 }
1446
1447 connector->display_info.raw_edid = NULL;
1448 free(edid, DRM_MEM_KMS);
1449 }
1450 }
1451
1452 /*
1453 * Set of SDVO TV modes.
1454 * Note! This is in reply order (see loop in get_tv_modes).
1455 * XXX: all 60Hz refresh?
1456 */
1457 static const struct drm_display_mode sdvo_tv_modes[] = {
1458 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1459 416, 0, 200, 201, 232, 233, 0,
1460 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1461 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1462 416, 0, 240, 241, 272, 273, 0,
1463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1464 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1465 496, 0, 300, 301, 332, 333, 0,
1466 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1467 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1468 736, 0, 350, 351, 382, 383, 0,
1469 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1470 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1471 736, 0, 400, 401, 432, 433, 0,
1472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1473 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1474 736, 0, 480, 481, 512, 513, 0,
1475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1476 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1477 800, 0, 480, 481, 512, 513, 0,
1478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1479 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1480 800, 0, 576, 577, 608, 609, 0,
1481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1482 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1483 816, 0, 350, 351, 382, 383, 0,
1484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1485 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1486 816, 0, 400, 401, 432, 433, 0,
1487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1488 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1489 816, 0, 480, 481, 512, 513, 0,
1490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1491 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1492 816, 0, 540, 541, 572, 573, 0,
1493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1494 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1495 816, 0, 576, 577, 608, 609, 0,
1496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1498 864, 0, 576, 577, 608, 609, 0,
1499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1501 896, 0, 600, 601, 632, 633, 0,
1502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1503 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1504 928, 0, 624, 625, 656, 657, 0,
1505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1506 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1507 1016, 0, 766, 767, 798, 799, 0,
1508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1509 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1510 1120, 0, 768, 769, 800, 801, 0,
1511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1512 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1513 1376, 0, 1024, 1025, 1056, 1057, 0,
1514 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1515 };
1516
intel_sdvo_get_tv_modes(struct drm_connector * connector)1517 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1518 {
1519 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1520 struct intel_sdvo_sdtv_resolution_request tv_res;
1521 uint32_t reply = 0, format_map = 0;
1522 int i;
1523
1524 /* Read the list of supported input resolutions for the selected TV
1525 * format.
1526 */
1527 format_map = 1 << intel_sdvo->tv_format_index;
1528 memcpy(&tv_res, &format_map,
1529 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1530
1531 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1532 return;
1533
1534 CTASSERT(sizeof(tv_res) == 3);
1535 if (!intel_sdvo_write_cmd(intel_sdvo,
1536 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1537 &tv_res, sizeof(tv_res)))
1538 return;
1539 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1540 return;
1541
1542 for (i = 0; i < DRM_ARRAY_SIZE(sdvo_tv_modes); i++)
1543 if (reply & (1 << i)) {
1544 struct drm_display_mode *nmode;
1545 nmode = drm_mode_duplicate(connector->dev,
1546 &sdvo_tv_modes[i]);
1547 if (nmode)
1548 drm_mode_probed_add(connector, nmode);
1549 }
1550 }
1551
intel_sdvo_get_lvds_modes(struct drm_connector * connector)1552 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1553 {
1554 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1555 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1556 struct drm_display_mode *newmode;
1557
1558 /*
1559 * Attempt to get the mode list from DDC.
1560 * Assume that the preferred modes are
1561 * arranged in priority order.
1562 */
1563 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1564 if (!list_empty(&connector->probed_modes))
1565 goto end;
1566
1567 /* Fetch modes from VBT */
1568 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1569 newmode = drm_mode_duplicate(connector->dev,
1570 dev_priv->sdvo_lvds_vbt_mode);
1571 if (newmode != NULL) {
1572 /* Guarantee the mode is preferred */
1573 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1574 DRM_MODE_TYPE_DRIVER);
1575 drm_mode_probed_add(connector, newmode);
1576 }
1577 }
1578
1579 end:
1580 list_for_each_entry(newmode, &connector->probed_modes, head) {
1581 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1582 intel_sdvo->sdvo_lvds_fixed_mode =
1583 drm_mode_duplicate(connector->dev, newmode);
1584
1585 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1586 0);
1587
1588 intel_sdvo->is_lvds = true;
1589 break;
1590 }
1591 }
1592
1593 }
1594
intel_sdvo_get_modes(struct drm_connector * connector)1595 static int intel_sdvo_get_modes(struct drm_connector *connector)
1596 {
1597 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1598
1599 if (IS_TV(intel_sdvo_connector))
1600 intel_sdvo_get_tv_modes(connector);
1601 else if (IS_LVDS(intel_sdvo_connector))
1602 intel_sdvo_get_lvds_modes(connector);
1603 else
1604 intel_sdvo_get_ddc_modes(connector);
1605
1606 return !list_empty(&connector->probed_modes);
1607 }
1608
1609 static void
intel_sdvo_destroy_enhance_property(struct drm_connector * connector)1610 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1611 {
1612 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1613 struct drm_device *dev = connector->dev;
1614
1615 if (intel_sdvo_connector->left)
1616 drm_property_destroy(dev, intel_sdvo_connector->left);
1617 if (intel_sdvo_connector->right)
1618 drm_property_destroy(dev, intel_sdvo_connector->right);
1619 if (intel_sdvo_connector->top)
1620 drm_property_destroy(dev, intel_sdvo_connector->top);
1621 if (intel_sdvo_connector->bottom)
1622 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1623 if (intel_sdvo_connector->hpos)
1624 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1625 if (intel_sdvo_connector->vpos)
1626 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1627 if (intel_sdvo_connector->saturation)
1628 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1629 if (intel_sdvo_connector->contrast)
1630 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1631 if (intel_sdvo_connector->hue)
1632 drm_property_destroy(dev, intel_sdvo_connector->hue);
1633 if (intel_sdvo_connector->sharpness)
1634 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1635 if (intel_sdvo_connector->flicker_filter)
1636 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1637 if (intel_sdvo_connector->flicker_filter_2d)
1638 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1639 if (intel_sdvo_connector->flicker_filter_adaptive)
1640 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1641 if (intel_sdvo_connector->tv_luma_filter)
1642 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1643 if (intel_sdvo_connector->tv_chroma_filter)
1644 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1645 if (intel_sdvo_connector->dot_crawl)
1646 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1647 if (intel_sdvo_connector->brightness)
1648 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1649 }
1650
intel_sdvo_destroy(struct drm_connector * connector)1651 static void intel_sdvo_destroy(struct drm_connector *connector)
1652 {
1653 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1654
1655 if (intel_sdvo_connector->tv_format)
1656 drm_property_destroy(connector->dev,
1657 intel_sdvo_connector->tv_format);
1658
1659 intel_sdvo_destroy_enhance_property(connector);
1660 #if 0
1661 drm_sysfs_connector_remove(connector);
1662 #endif
1663 drm_connector_cleanup(connector);
1664 free(connector, DRM_MEM_KMS);
1665 }
1666
intel_sdvo_detect_hdmi_audio(struct drm_connector * connector)1667 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1668 {
1669 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1670 struct edid *edid;
1671 bool has_audio = false;
1672
1673 if (!intel_sdvo->is_hdmi)
1674 return false;
1675
1676 edid = intel_sdvo_get_edid(connector);
1677 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1678 has_audio = drm_detect_monitor_audio(edid);
1679
1680 return has_audio;
1681 }
1682
1683 static int
intel_sdvo_set_property(struct drm_connector * connector,struct drm_property * property,uint64_t val)1684 intel_sdvo_set_property(struct drm_connector *connector,
1685 struct drm_property *property,
1686 uint64_t val)
1687 {
1688 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1689 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1690 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1691 uint16_t temp_value;
1692 uint8_t cmd;
1693 int ret;
1694
1695 ret = drm_connector_property_set_value(connector, property, val);
1696 if (ret)
1697 return ret;
1698
1699 if (property == dev_priv->force_audio_property) {
1700 int i = val;
1701 bool has_audio;
1702
1703 if (i == intel_sdvo_connector->force_audio)
1704 return 0;
1705
1706 intel_sdvo_connector->force_audio = i;
1707
1708 if (i == HDMI_AUDIO_AUTO)
1709 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1710 else
1711 has_audio = (i == HDMI_AUDIO_ON);
1712
1713 if (has_audio == intel_sdvo->has_hdmi_audio)
1714 return 0;
1715
1716 intel_sdvo->has_hdmi_audio = has_audio;
1717 goto done;
1718 }
1719
1720 if (property == dev_priv->broadcast_rgb_property) {
1721 if (val == !!intel_sdvo->color_range)
1722 return 0;
1723
1724 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1725 goto done;
1726 }
1727
1728 #define CHECK_PROPERTY(name, NAME) \
1729 if (intel_sdvo_connector->name == property) { \
1730 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1731 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1732 cmd = SDVO_CMD_SET_##NAME; \
1733 intel_sdvo_connector->cur_##name = temp_value; \
1734 goto set_value; \
1735 }
1736
1737 if (property == intel_sdvo_connector->tv_format) {
1738 if (val >= TV_FORMAT_NUM)
1739 return -EINVAL;
1740
1741 if (intel_sdvo->tv_format_index ==
1742 intel_sdvo_connector->tv_format_supported[val])
1743 return 0;
1744
1745 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1746 goto done;
1747 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1748 temp_value = val;
1749 if (intel_sdvo_connector->left == property) {
1750 drm_connector_property_set_value(connector,
1751 intel_sdvo_connector->right, val);
1752 if (intel_sdvo_connector->left_margin == temp_value)
1753 return 0;
1754
1755 intel_sdvo_connector->left_margin = temp_value;
1756 intel_sdvo_connector->right_margin = temp_value;
1757 temp_value = intel_sdvo_connector->max_hscan -
1758 intel_sdvo_connector->left_margin;
1759 cmd = SDVO_CMD_SET_OVERSCAN_H;
1760 goto set_value;
1761 } else if (intel_sdvo_connector->right == property) {
1762 drm_connector_property_set_value(connector,
1763 intel_sdvo_connector->left, val);
1764 if (intel_sdvo_connector->right_margin == temp_value)
1765 return 0;
1766
1767 intel_sdvo_connector->left_margin = temp_value;
1768 intel_sdvo_connector->right_margin = temp_value;
1769 temp_value = intel_sdvo_connector->max_hscan -
1770 intel_sdvo_connector->left_margin;
1771 cmd = SDVO_CMD_SET_OVERSCAN_H;
1772 goto set_value;
1773 } else if (intel_sdvo_connector->top == property) {
1774 drm_connector_property_set_value(connector,
1775 intel_sdvo_connector->bottom, val);
1776 if (intel_sdvo_connector->top_margin == temp_value)
1777 return 0;
1778
1779 intel_sdvo_connector->top_margin = temp_value;
1780 intel_sdvo_connector->bottom_margin = temp_value;
1781 temp_value = intel_sdvo_connector->max_vscan -
1782 intel_sdvo_connector->top_margin;
1783 cmd = SDVO_CMD_SET_OVERSCAN_V;
1784 goto set_value;
1785 } else if (intel_sdvo_connector->bottom == property) {
1786 drm_connector_property_set_value(connector,
1787 intel_sdvo_connector->top, val);
1788 if (intel_sdvo_connector->bottom_margin == temp_value)
1789 return 0;
1790
1791 intel_sdvo_connector->top_margin = temp_value;
1792 intel_sdvo_connector->bottom_margin = temp_value;
1793 temp_value = intel_sdvo_connector->max_vscan -
1794 intel_sdvo_connector->top_margin;
1795 cmd = SDVO_CMD_SET_OVERSCAN_V;
1796 goto set_value;
1797 }
1798 CHECK_PROPERTY(hpos, HPOS)
1799 CHECK_PROPERTY(vpos, VPOS)
1800 CHECK_PROPERTY(saturation, SATURATION)
1801 CHECK_PROPERTY(contrast, CONTRAST)
1802 CHECK_PROPERTY(hue, HUE)
1803 CHECK_PROPERTY(brightness, BRIGHTNESS)
1804 CHECK_PROPERTY(sharpness, SHARPNESS)
1805 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1806 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1807 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1808 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1809 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1810 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1811 }
1812
1813 return -EINVAL; /* unknown property */
1814
1815 set_value:
1816 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1817 return -EIO;
1818
1819
1820 done:
1821 if (intel_sdvo->base.base.crtc) {
1822 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1823 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1824 crtc->y, crtc->fb);
1825 }
1826
1827 return 0;
1828 #undef CHECK_PROPERTY
1829 }
1830
1831 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1832 .dpms = intel_sdvo_dpms,
1833 .mode_fixup = intel_sdvo_mode_fixup,
1834 .prepare = intel_encoder_prepare,
1835 .mode_set = intel_sdvo_mode_set,
1836 .commit = intel_encoder_commit,
1837 };
1838
1839 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1840 .dpms = drm_helper_connector_dpms,
1841 .detect = intel_sdvo_detect,
1842 .fill_modes = drm_helper_probe_single_connector_modes,
1843 .set_property = intel_sdvo_set_property,
1844 .destroy = intel_sdvo_destroy,
1845 };
1846
1847 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1848 .get_modes = intel_sdvo_get_modes,
1849 .mode_valid = intel_sdvo_mode_valid,
1850 .best_encoder = intel_best_encoder,
1851 };
1852
intel_sdvo_enc_destroy(struct drm_encoder * encoder)1853 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1854 {
1855 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1856
1857 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1858 drm_mode_destroy(encoder->dev,
1859 intel_sdvo->sdvo_lvds_fixed_mode);
1860
1861 device_delete_child(intel_sdvo->base.base.dev->device,
1862 intel_sdvo->ddc_iic_bus);
1863 intel_encoder_destroy(encoder);
1864 }
1865
1866 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1867 .destroy = intel_sdvo_enc_destroy,
1868 };
1869
1870 static void
intel_sdvo_guess_ddc_bus(struct intel_sdvo * sdvo)1871 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1872 {
1873 uint16_t mask = 0;
1874 unsigned int num_bits;
1875
1876 /* Make a mask of outputs less than or equal to our own priority in the
1877 * list.
1878 */
1879 switch (sdvo->controlled_output) {
1880 case SDVO_OUTPUT_LVDS1:
1881 mask |= SDVO_OUTPUT_LVDS1;
1882 case SDVO_OUTPUT_LVDS0:
1883 mask |= SDVO_OUTPUT_LVDS0;
1884 case SDVO_OUTPUT_TMDS1:
1885 mask |= SDVO_OUTPUT_TMDS1;
1886 case SDVO_OUTPUT_TMDS0:
1887 mask |= SDVO_OUTPUT_TMDS0;
1888 case SDVO_OUTPUT_RGB1:
1889 mask |= SDVO_OUTPUT_RGB1;
1890 case SDVO_OUTPUT_RGB0:
1891 mask |= SDVO_OUTPUT_RGB0;
1892 break;
1893 }
1894
1895 /* Count bits to find what number we are in the priority list. */
1896 mask &= sdvo->caps.output_flags;
1897 num_bits = bitcount16(mask);
1898 /* If more than 3 outputs, default to DDC bus 3 for now. */
1899 if (num_bits > 3)
1900 num_bits = 3;
1901
1902 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1903 sdvo->ddc_bus = 1 << num_bits;
1904 }
1905
1906 /**
1907 * Choose the appropriate DDC bus for control bus switch command for this
1908 * SDVO output based on the controlled output.
1909 *
1910 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1911 * outputs, then LVDS outputs.
1912 */
1913 static void
intel_sdvo_select_ddc_bus(struct drm_i915_private * dev_priv,struct intel_sdvo * sdvo,u32 reg)1914 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1915 struct intel_sdvo *sdvo, u32 reg)
1916 {
1917 struct sdvo_device_mapping *mapping;
1918
1919 if (IS_SDVOB(reg))
1920 mapping = &(dev_priv->sdvo_mappings[0]);
1921 else
1922 mapping = &(dev_priv->sdvo_mappings[1]);
1923
1924 if (mapping->initialized)
1925 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1926 else
1927 intel_sdvo_guess_ddc_bus(sdvo);
1928 }
1929
1930 static void
intel_sdvo_select_i2c_bus(struct drm_i915_private * dev_priv,struct intel_sdvo * sdvo,u32 reg)1931 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1932 struct intel_sdvo *sdvo, u32 reg)
1933 {
1934 struct sdvo_device_mapping *mapping;
1935 u8 pin;
1936
1937 if (IS_SDVOB(reg))
1938 mapping = &dev_priv->sdvo_mappings[0];
1939 else
1940 mapping = &dev_priv->sdvo_mappings[1];
1941
1942 pin = GMBUS_PORT_DPB;
1943 if (mapping->initialized)
1944 pin = mapping->i2c_pin;
1945
1946 if (pin < GMBUS_NUM_PORTS) {
1947 sdvo->i2c = dev_priv->gmbus[pin];
1948 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1949 intel_gmbus_force_bit(sdvo->i2c, true);
1950 } else {
1951 sdvo->i2c = dev_priv->gmbus[GMBUS_PORT_DPB];
1952 }
1953 }
1954
1955 static bool
intel_sdvo_is_hdmi_connector(struct intel_sdvo * intel_sdvo,int device)1956 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1957 {
1958 return intel_sdvo_check_supp_encode(intel_sdvo);
1959 }
1960
1961 static u8
intel_sdvo_get_slave_addr(struct drm_device * dev,int sdvo_reg)1962 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1963 {
1964 struct drm_i915_private *dev_priv = dev->dev_private;
1965 struct sdvo_device_mapping *my_mapping, *other_mapping;
1966
1967 if (IS_SDVOB(sdvo_reg)) {
1968 my_mapping = &dev_priv->sdvo_mappings[0];
1969 other_mapping = &dev_priv->sdvo_mappings[1];
1970 } else {
1971 my_mapping = &dev_priv->sdvo_mappings[1];
1972 other_mapping = &dev_priv->sdvo_mappings[0];
1973 }
1974
1975 /* If the BIOS described our SDVO device, take advantage of it. */
1976 if (my_mapping->slave_addr)
1977 return my_mapping->slave_addr;
1978
1979 /* If the BIOS only described a different SDVO device, use the
1980 * address that it isn't using.
1981 */
1982 if (other_mapping->slave_addr) {
1983 if (other_mapping->slave_addr == 0x70)
1984 return 0x72;
1985 else
1986 return 0x70;
1987 }
1988
1989 /* No SDVO device info is found for another DVO port,
1990 * so use mapping assumption we had before BIOS parsing.
1991 */
1992 if (IS_SDVOB(sdvo_reg))
1993 return 0x70;
1994 else
1995 return 0x72;
1996 }
1997
1998 static void
intel_sdvo_connector_init(struct intel_sdvo_connector * connector,struct intel_sdvo * encoder)1999 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2000 struct intel_sdvo *encoder)
2001 {
2002 drm_connector_init(encoder->base.base.dev,
2003 &connector->base.base,
2004 &intel_sdvo_connector_funcs,
2005 connector->base.base.connector_type);
2006
2007 drm_connector_helper_add(&connector->base.base,
2008 &intel_sdvo_connector_helper_funcs);
2009
2010 connector->base.base.interlace_allowed = 1;
2011 connector->base.base.doublescan_allowed = 0;
2012 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2013
2014 intel_connector_attach_encoder(&connector->base, &encoder->base);
2015 #if 0
2016 drm_sysfs_connector_add(&connector->base.base);
2017 #endif
2018 }
2019
2020 static void
intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector * connector)2021 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2022 {
2023 struct drm_device *dev = connector->base.base.dev;
2024
2025 intel_attach_force_audio_property(&connector->base.base);
2026 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2027 intel_attach_broadcast_rgb_property(&connector->base.base);
2028 }
2029
2030 static bool
intel_sdvo_dvi_init(struct intel_sdvo * intel_sdvo,int device)2031 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2032 {
2033 struct drm_encoder *encoder = &intel_sdvo->base.base;
2034 struct drm_connector *connector;
2035 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2036 struct intel_connector *intel_connector;
2037 struct intel_sdvo_connector *intel_sdvo_connector;
2038
2039 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2040 DRM_MEM_KMS, M_WAITOK | M_ZERO);
2041
2042 if (device == 0) {
2043 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2044 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2045 } else if (device == 1) {
2046 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2047 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2048 }
2049
2050 intel_connector = &intel_sdvo_connector->base;
2051 connector = &intel_connector->base;
2052 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2053 connector->polled = DRM_CONNECTOR_POLL_HPD;
2054 intel_sdvo->hotplug_active[0] |= 1 << device;
2055 /* Some SDVO devices have one-shot hotplug interrupts.
2056 * Ensure that they get re-enabled when an interrupt happens.
2057 */
2058 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2059 intel_sdvo_enable_hotplug(intel_encoder);
2060 }
2061 else
2062 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2063 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2064 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2065
2066 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2067 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2068 intel_sdvo->is_hdmi = true;
2069 }
2070 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2071 (1 << INTEL_ANALOG_CLONE_BIT));
2072
2073 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2074 if (intel_sdvo->is_hdmi)
2075 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2076
2077 return true;
2078 }
2079
2080 static bool
intel_sdvo_tv_init(struct intel_sdvo * intel_sdvo,int type)2081 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2082 {
2083 struct drm_encoder *encoder = &intel_sdvo->base.base;
2084 struct drm_connector *connector;
2085 struct intel_connector *intel_connector;
2086 struct intel_sdvo_connector *intel_sdvo_connector;
2087
2088 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2089 DRM_MEM_KMS, M_WAITOK | M_ZERO);
2090 if (!intel_sdvo_connector)
2091 return false;
2092
2093 intel_connector = &intel_sdvo_connector->base;
2094 connector = &intel_connector->base;
2095 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2096 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2097
2098 intel_sdvo->controlled_output |= type;
2099 intel_sdvo_connector->output_flag = type;
2100
2101 intel_sdvo->is_tv = true;
2102 intel_sdvo->base.needs_tv_clock = true;
2103 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2104
2105 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2106
2107 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2108 goto err;
2109
2110 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2111 goto err;
2112
2113 return true;
2114
2115 err:
2116 intel_sdvo_destroy(connector);
2117 return false;
2118 }
2119
2120 static bool
intel_sdvo_analog_init(struct intel_sdvo * intel_sdvo,int device)2121 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2122 {
2123 struct drm_encoder *encoder = &intel_sdvo->base.base;
2124 struct drm_connector *connector;
2125 struct intel_connector *intel_connector;
2126 struct intel_sdvo_connector *intel_sdvo_connector;
2127
2128 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2129 DRM_MEM_KMS, M_WAITOK | M_ZERO);
2130
2131 intel_connector = &intel_sdvo_connector->base;
2132 connector = &intel_connector->base;
2133 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2134 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2135 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2136
2137 if (device == 0) {
2138 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2139 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2140 } else if (device == 1) {
2141 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2142 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2143 }
2144
2145 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2146 (1 << INTEL_ANALOG_CLONE_BIT));
2147
2148 intel_sdvo_connector_init(intel_sdvo_connector,
2149 intel_sdvo);
2150 return true;
2151 }
2152
2153 static bool
intel_sdvo_lvds_init(struct intel_sdvo * intel_sdvo,int device)2154 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2155 {
2156 struct drm_encoder *encoder = &intel_sdvo->base.base;
2157 struct drm_connector *connector;
2158 struct intel_connector *intel_connector;
2159 struct intel_sdvo_connector *intel_sdvo_connector;
2160
2161 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2162 DRM_MEM_KMS, M_WAITOK | M_ZERO);
2163
2164 intel_connector = &intel_sdvo_connector->base;
2165 connector = &intel_connector->base;
2166 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2167 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2168
2169 if (device == 0) {
2170 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2171 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2172 } else if (device == 1) {
2173 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2174 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2175 }
2176
2177 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2178 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2179
2180 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2181 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2182 goto err;
2183
2184 return true;
2185
2186 err:
2187 intel_sdvo_destroy(connector);
2188 return false;
2189 }
2190
2191 static bool
intel_sdvo_output_setup(struct intel_sdvo * intel_sdvo,uint16_t flags)2192 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2193 {
2194 intel_sdvo->is_tv = false;
2195 intel_sdvo->base.needs_tv_clock = false;
2196 intel_sdvo->is_lvds = false;
2197
2198 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2199
2200 if (flags & SDVO_OUTPUT_TMDS0)
2201 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2202 return false;
2203
2204 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2205 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2206 return false;
2207
2208 /* TV has no XXX1 function block */
2209 if (flags & SDVO_OUTPUT_SVID0)
2210 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2211 return false;
2212
2213 if (flags & SDVO_OUTPUT_CVBS0)
2214 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2215 return false;
2216
2217 if (flags & SDVO_OUTPUT_RGB0)
2218 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2219 return false;
2220
2221 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2222 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2223 return false;
2224
2225 if (flags & SDVO_OUTPUT_LVDS0)
2226 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2227 return false;
2228
2229 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2230 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2231 return false;
2232
2233 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2234 unsigned char bytes[2];
2235
2236 intel_sdvo->controlled_output = 0;
2237 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2238 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2239 SDVO_NAME(intel_sdvo),
2240 bytes[0], bytes[1]);
2241 return false;
2242 }
2243 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2244
2245 return true;
2246 }
2247
intel_sdvo_tv_create_property(struct intel_sdvo * intel_sdvo,struct intel_sdvo_connector * intel_sdvo_connector,int type)2248 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2249 struct intel_sdvo_connector *intel_sdvo_connector,
2250 int type)
2251 {
2252 struct drm_device *dev = intel_sdvo->base.base.dev;
2253 struct intel_sdvo_tv_format format;
2254 uint32_t format_map, i;
2255
2256 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2257 return false;
2258
2259 CTASSERT(sizeof(format) == 6);
2260 if (!intel_sdvo_get_value(intel_sdvo,
2261 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2262 &format, sizeof(format)))
2263 return false;
2264
2265 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2266
2267 if (format_map == 0)
2268 return false;
2269
2270 intel_sdvo_connector->format_supported_num = 0;
2271 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2272 if (format_map & (1 << i))
2273 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2274
2275
2276 intel_sdvo_connector->tv_format =
2277 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2278 "mode", intel_sdvo_connector->format_supported_num);
2279 if (!intel_sdvo_connector->tv_format)
2280 return false;
2281
2282 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2283 drm_property_add_enum(
2284 intel_sdvo_connector->tv_format, i,
2285 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2286
2287 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2288 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2289 intel_sdvo_connector->tv_format, 0);
2290 return true;
2291
2292 }
2293
2294 #define ENHANCEMENT(name, NAME) do { \
2295 if (enhancements.name) { \
2296 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2297 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2298 return false; \
2299 intel_sdvo_connector->max_##name = data_value[0]; \
2300 intel_sdvo_connector->cur_##name = response; \
2301 intel_sdvo_connector->name = \
2302 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2303 if (!intel_sdvo_connector->name) return false; \
2304 drm_connector_attach_property(connector, \
2305 intel_sdvo_connector->name, \
2306 intel_sdvo_connector->cur_##name); \
2307 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2308 data_value[0], data_value[1], response); \
2309 } \
2310 } while (0)
2311
2312 static bool
intel_sdvo_create_enhance_property_tv(struct intel_sdvo * intel_sdvo,struct intel_sdvo_connector * intel_sdvo_connector,struct intel_sdvo_enhancements_reply enhancements)2313 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2314 struct intel_sdvo_connector *intel_sdvo_connector,
2315 struct intel_sdvo_enhancements_reply enhancements)
2316 {
2317 struct drm_device *dev = intel_sdvo->base.base.dev;
2318 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2319 uint16_t response, data_value[2];
2320
2321 /* when horizontal overscan is supported, Add the left/right property */
2322 if (enhancements.overscan_h) {
2323 if (!intel_sdvo_get_value(intel_sdvo,
2324 SDVO_CMD_GET_MAX_OVERSCAN_H,
2325 &data_value, 4))
2326 return false;
2327
2328 if (!intel_sdvo_get_value(intel_sdvo,
2329 SDVO_CMD_GET_OVERSCAN_H,
2330 &response, 2))
2331 return false;
2332
2333 intel_sdvo_connector->max_hscan = data_value[0];
2334 intel_sdvo_connector->left_margin = data_value[0] - response;
2335 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2336 intel_sdvo_connector->left =
2337 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2338 if (!intel_sdvo_connector->left)
2339 return false;
2340
2341 drm_connector_attach_property(connector,
2342 intel_sdvo_connector->left,
2343 intel_sdvo_connector->left_margin);
2344
2345 intel_sdvo_connector->right =
2346 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2347 if (!intel_sdvo_connector->right)
2348 return false;
2349
2350 drm_connector_attach_property(connector,
2351 intel_sdvo_connector->right,
2352 intel_sdvo_connector->right_margin);
2353 DRM_DEBUG_KMS("h_overscan: max %d, "
2354 "default %d, current %d\n",
2355 data_value[0], data_value[1], response);
2356 }
2357
2358 if (enhancements.overscan_v) {
2359 if (!intel_sdvo_get_value(intel_sdvo,
2360 SDVO_CMD_GET_MAX_OVERSCAN_V,
2361 &data_value, 4))
2362 return false;
2363
2364 if (!intel_sdvo_get_value(intel_sdvo,
2365 SDVO_CMD_GET_OVERSCAN_V,
2366 &response, 2))
2367 return false;
2368
2369 intel_sdvo_connector->max_vscan = data_value[0];
2370 intel_sdvo_connector->top_margin = data_value[0] - response;
2371 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2372 intel_sdvo_connector->top =
2373 drm_property_create_range(dev, 0,
2374 "top_margin", 0, data_value[0]);
2375 if (!intel_sdvo_connector->top)
2376 return false;
2377
2378 drm_connector_attach_property(connector,
2379 intel_sdvo_connector->top,
2380 intel_sdvo_connector->top_margin);
2381
2382 intel_sdvo_connector->bottom =
2383 drm_property_create_range(dev, 0,
2384 "bottom_margin", 0, data_value[0]);
2385 if (!intel_sdvo_connector->bottom)
2386 return false;
2387
2388 drm_connector_attach_property(connector,
2389 intel_sdvo_connector->bottom,
2390 intel_sdvo_connector->bottom_margin);
2391 DRM_DEBUG_KMS("v_overscan: max %d, "
2392 "default %d, current %d\n",
2393 data_value[0], data_value[1], response);
2394 }
2395
2396 ENHANCEMENT(hpos, HPOS);
2397 ENHANCEMENT(vpos, VPOS);
2398 ENHANCEMENT(saturation, SATURATION);
2399 ENHANCEMENT(contrast, CONTRAST);
2400 ENHANCEMENT(hue, HUE);
2401 ENHANCEMENT(sharpness, SHARPNESS);
2402 ENHANCEMENT(brightness, BRIGHTNESS);
2403 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2404 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2405 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2406 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2407 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2408
2409 if (enhancements.dot_crawl) {
2410 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2411 return false;
2412
2413 intel_sdvo_connector->max_dot_crawl = 1;
2414 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2415 intel_sdvo_connector->dot_crawl =
2416 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2417 if (!intel_sdvo_connector->dot_crawl)
2418 return false;
2419
2420 drm_connector_attach_property(connector,
2421 intel_sdvo_connector->dot_crawl,
2422 intel_sdvo_connector->cur_dot_crawl);
2423 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2424 }
2425
2426 return true;
2427 }
2428
2429 static bool
intel_sdvo_create_enhance_property_lvds(struct intel_sdvo * intel_sdvo,struct intel_sdvo_connector * intel_sdvo_connector,struct intel_sdvo_enhancements_reply enhancements)2430 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2431 struct intel_sdvo_connector *intel_sdvo_connector,
2432 struct intel_sdvo_enhancements_reply enhancements)
2433 {
2434 struct drm_device *dev = intel_sdvo->base.base.dev;
2435 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2436 uint16_t response, data_value[2];
2437
2438 ENHANCEMENT(brightness, BRIGHTNESS);
2439
2440 return true;
2441 }
2442 #undef ENHANCEMENT
2443
intel_sdvo_create_enhance_property(struct intel_sdvo * intel_sdvo,struct intel_sdvo_connector * intel_sdvo_connector)2444 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2445 struct intel_sdvo_connector *intel_sdvo_connector)
2446 {
2447 union {
2448 struct intel_sdvo_enhancements_reply reply;
2449 uint16_t response;
2450 } enhancements;
2451
2452 CTASSERT(sizeof(enhancements) == 2);
2453
2454 enhancements.response = 0;
2455 intel_sdvo_get_value(intel_sdvo,
2456 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2457 &enhancements, sizeof(enhancements));
2458 if (enhancements.response == 0) {
2459 DRM_DEBUG_KMS("No enhancement is supported\n");
2460 return true;
2461 }
2462
2463 if (IS_TV(intel_sdvo_connector))
2464 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2465 else if (IS_LVDS(intel_sdvo_connector))
2466 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2467 else
2468 return true;
2469 }
2470
2471 struct intel_sdvo_ddc_proxy_sc {
2472 struct intel_sdvo *intel_sdvo;
2473 device_t port;
2474 };
2475
2476 static int
intel_sdvo_ddc_proxy_probe(device_t idev)2477 intel_sdvo_ddc_proxy_probe(device_t idev)
2478 {
2479
2480 return (BUS_PROBE_DEFAULT);
2481 }
2482
2483 static int
intel_sdvo_ddc_proxy_attach(device_t idev)2484 intel_sdvo_ddc_proxy_attach(device_t idev)
2485 {
2486 struct intel_sdvo_ddc_proxy_sc *sc;
2487
2488 sc = device_get_softc(idev);
2489 sc->port = device_add_child(idev, "iicbus", -1);
2490 if (sc->port == NULL)
2491 return (ENXIO);
2492 device_quiet(sc->port);
2493 bus_generic_attach(idev);
2494 return (0);
2495 }
2496
2497 static int
intel_sdvo_ddc_proxy_detach(device_t idev)2498 intel_sdvo_ddc_proxy_detach(device_t idev)
2499 {
2500 struct intel_sdvo_ddc_proxy_sc *sc;
2501 device_t port;
2502
2503 sc = device_get_softc(idev);
2504 port = sc->port;
2505 bus_generic_detach(idev);
2506 if (port != NULL)
2507 device_delete_child(idev, port);
2508 return (0);
2509 }
2510
2511 static int
intel_sdvo_ddc_proxy_reset(device_t idev,u_char speed,u_char addr,u_char * oldaddr)2512 intel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr,
2513 u_char *oldaddr)
2514 {
2515 struct intel_sdvo_ddc_proxy_sc *sc;
2516 struct intel_sdvo *sdvo;
2517
2518 sc = device_get_softc(idev);
2519 sdvo = sc->intel_sdvo;
2520
2521 return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr,
2522 oldaddr));
2523 }
2524
2525 static int
intel_sdvo_ddc_proxy_transfer(device_t idev,struct iic_msg * msgs,uint32_t num)2526 intel_sdvo_ddc_proxy_transfer(device_t idev, struct iic_msg *msgs, uint32_t num)
2527 {
2528 struct intel_sdvo_ddc_proxy_sc *sc;
2529 struct intel_sdvo *sdvo;
2530
2531 sc = device_get_softc(idev);
2532 sdvo = sc->intel_sdvo;
2533
2534 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2535 return (EIO);
2536
2537 return (iicbus_transfer(sdvo->i2c, msgs, num));
2538 }
2539
2540 static bool
intel_sdvo_init_ddc_proxy(struct intel_sdvo * sdvo,struct drm_device * dev,int sdvo_reg)2541 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, struct drm_device *dev,
2542 int sdvo_reg)
2543 {
2544 struct intel_sdvo_ddc_proxy_sc *sc;
2545 int ret;
2546
2547 sdvo->ddc_iic_bus = device_add_child(dev->device,
2548 "intel_sdvo_ddc_proxy", sdvo_reg);
2549 if (sdvo->ddc_iic_bus == NULL) {
2550 DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo_reg);
2551 return (false);
2552 }
2553 device_quiet(sdvo->ddc_iic_bus);
2554 ret = device_probe_and_attach(sdvo->ddc_iic_bus);
2555 if (ret != 0) {
2556 DRM_ERROR("cannot attach proxy bus %d error %d\n",
2557 sdvo_reg, ret);
2558 device_delete_child(dev->device, sdvo->ddc_iic_bus);
2559 return (false);
2560 }
2561 sc = device_get_softc(sdvo->ddc_iic_bus);
2562 sc->intel_sdvo = sdvo;
2563
2564 sdvo->ddc = sc->port;
2565 return (true);
2566 }
2567
2568 static device_method_t intel_sdvo_ddc_proxy_methods[] = {
2569 DEVMETHOD(device_probe, intel_sdvo_ddc_proxy_probe),
2570 DEVMETHOD(device_attach, intel_sdvo_ddc_proxy_attach),
2571 DEVMETHOD(device_detach, intel_sdvo_ddc_proxy_detach),
2572 DEVMETHOD(iicbus_reset, intel_sdvo_ddc_proxy_reset),
2573 DEVMETHOD(iicbus_transfer, intel_sdvo_ddc_proxy_transfer),
2574 DEVMETHOD_END
2575 };
2576 static driver_t intel_sdvo_ddc_proxy_driver = {
2577 "intel_sdvo_ddc_proxy",
2578 intel_sdvo_ddc_proxy_methods,
2579 sizeof(struct intel_sdvo_ddc_proxy_sc)
2580 };
2581 static devclass_t intel_sdvo_devclass;
2582 DRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drmn, intel_sdvo_ddc_proxy_driver,
2583 intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST);
2584
2585
intel_sdvo_init(struct drm_device * dev,int sdvo_reg)2586 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2587 {
2588 struct drm_i915_private *dev_priv = dev->dev_private;
2589 struct intel_encoder *intel_encoder;
2590 struct intel_sdvo *intel_sdvo;
2591 int i;
2592
2593 intel_sdvo = malloc(sizeof(struct intel_sdvo), DRM_MEM_KMS,
2594 M_WAITOK | M_ZERO);
2595
2596 intel_sdvo->sdvo_reg = sdvo_reg;
2597 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2598 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2599 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev, sdvo_reg)) {
2600 free(intel_sdvo, DRM_MEM_KMS);
2601 return false;
2602 }
2603
2604 /* encoder type will be decided later */
2605 intel_encoder = &intel_sdvo->base;
2606 intel_encoder->type = INTEL_OUTPUT_SDVO;
2607 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2608
2609 /* Read the regs to test if we can talk to the device */
2610 for (i = 0; i < 0x40; i++) {
2611 u8 byte;
2612
2613 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2614 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2615 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2616 goto err;
2617 }
2618 }
2619
2620 if (IS_SDVOB(sdvo_reg))
2621 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2622 else
2623 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2624
2625 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2626
2627 /* In default case sdvo lvds is false */
2628 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2629 goto err;
2630
2631 /* Set up hotplug command - note paranoia about contents of reply.
2632 * We assume that the hardware is in a sane state, and only touch
2633 * the bits we think we understand.
2634 */
2635 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2636 &intel_sdvo->hotplug_active, 2);
2637 intel_sdvo->hotplug_active[0] &= ~0x3;
2638
2639 if (!intel_sdvo_output_setup(intel_sdvo,
2640 intel_sdvo->caps.output_flags)) {
2641 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2642 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2643 goto err;
2644 }
2645
2646 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2647
2648 /* Set the input timing to the screen. Assume always input 0. */
2649 if (!intel_sdvo_set_target_input(intel_sdvo))
2650 goto err;
2651
2652 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2653 &intel_sdvo->pixel_clock_min,
2654 &intel_sdvo->pixel_clock_max))
2655 goto err;
2656
2657 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2658 "clock range %dMHz - %dMHz, "
2659 "input 1: %c, input 2: %c, "
2660 "output 1: %c, output 2: %c\n",
2661 SDVO_NAME(intel_sdvo),
2662 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2663 intel_sdvo->caps.device_rev_id,
2664 intel_sdvo->pixel_clock_min / 1000,
2665 intel_sdvo->pixel_clock_max / 1000,
2666 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2667 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2668 /* check currently supported outputs */
2669 intel_sdvo->caps.output_flags &
2670 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2671 intel_sdvo->caps.output_flags &
2672 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2673 return true;
2674
2675 err:
2676 drm_encoder_cleanup(&intel_encoder->base);
2677 free(intel_sdvo, DRM_MEM_KMS);
2678
2679 return false;
2680 }
2681