1 /* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
2
3 /*-
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
7 *
8 * This code is derived from software written for Brini by Mark Brinicombe
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * RiscBSD kernel project
38 *
39 * machdep.c
40 *
41 * Machine dependant functions for kernel setup
42 *
43 * This file needs a lot of work.
44 *
45 * Created : 17/09/94
46 */
47
48 #include <sys/cdefs.h>
49 __FBSDID("$FreeBSD: stable/9/sys/arm/xscale/i80321/iq31244_machdep.c 218666 2011-02-13 20:02:46Z cognet $");
50
51 #define _ARM32_BUS_DMA_PRIVATE
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/sysproto.h>
55 #include <sys/signalvar.h>
56 #include <sys/imgact.h>
57 #include <sys/kernel.h>
58 #include <sys/ktr.h>
59 #include <sys/linker.h>
60 #include <sys/lock.h>
61 #include <sys/malloc.h>
62 #include <sys/mutex.h>
63 #include <sys/pcpu.h>
64 #include <sys/proc.h>
65 #include <sys/ptrace.h>
66 #include <sys/cons.h>
67 #include <sys/bio.h>
68 #include <sys/bus.h>
69 #include <sys/buf.h>
70 #include <sys/exec.h>
71 #include <sys/kdb.h>
72 #include <sys/msgbuf.h>
73 #include <machine/reg.h>
74 #include <machine/cpu.h>
75
76 #include <vm/vm.h>
77 #include <vm/pmap.h>
78 #include <vm/vm_object.h>
79 #include <vm/vm_page.h>
80 #include <vm/vm_pager.h>
81 #include <vm/vm_map.h>
82 #include <vm/vnode_pager.h>
83 #include <machine/pmap.h>
84 #include <machine/vmparam.h>
85 #include <machine/pcb.h>
86 #include <machine/undefined.h>
87 #include <machine/machdep.h>
88 #include <machine/metadata.h>
89 #include <machine/armreg.h>
90 #include <machine/bus.h>
91 #include <sys/reboot.h>
92
93 #include <arm/xscale/i80321/i80321reg.h>
94 #include <arm/xscale/i80321/i80321var.h>
95 #include <arm/xscale/i80321/iq80321reg.h>
96 #include <arm/xscale/i80321/obiovar.h>
97
98 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
99 #define KERNEL_PT_IOPXS 1
100 #define KERNEL_PT_BEFOREKERN 2
101 #define KERNEL_PT_AFKERNEL 3 /* L2 table for mapping after kernel */
102 #define KERNEL_PT_AFKERNEL_NUM 9
103
104 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
105 #define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
106
107 /* Define various stack sizes in pages */
108 #define IRQ_STACK_SIZE 1
109 #define ABT_STACK_SIZE 1
110 #define UND_STACK_SIZE 1
111
112 extern u_int data_abort_handler_address;
113 extern u_int prefetch_abort_handler_address;
114 extern u_int undefined_handler_address;
115
116 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
117
118 extern void *_end;
119
120 extern int *end;
121
122 struct pcpu __pcpu;
123 struct pcpu *pcpup = &__pcpu;
124
125 /* Physical and virtual addresses for some global pages */
126
127 vm_paddr_t phys_avail[10];
128 vm_paddr_t dump_avail[4];
129 vm_offset_t physical_pages;
130
131 struct pv_addr systempage;
132 struct pv_addr msgbufpv;
133 struct pv_addr irqstack;
134 struct pv_addr undstack;
135 struct pv_addr abtstack;
136 struct pv_addr kernelstack;
137 struct pv_addr minidataclean;
138
139 static struct trapframe proc0_tf;
140
141 #define IQ80321_OBIO_BASE 0xfe800000UL
142 #define IQ80321_OBIO_SIZE 0x00100000UL
143 /* Static device mappings. */
144 static const struct pmap_devmap iq80321_devmap[] = {
145 /*
146 * Map the on-board devices VA == PA so that we can access them
147 * with the MMU on or off.
148 */
149 {
150 IQ80321_OBIO_BASE,
151 IQ80321_OBIO_BASE,
152 IQ80321_OBIO_SIZE,
153 VM_PROT_READ|VM_PROT_WRITE,
154 PTE_NOCACHE,
155 },
156 {
157 IQ80321_IOW_VBASE,
158 VERDE_OUT_XLATE_IO_WIN0_BASE,
159 VERDE_OUT_XLATE_IO_WIN_SIZE,
160 VM_PROT_READ|VM_PROT_WRITE,
161 PTE_NOCACHE,
162 },
163
164 {
165 IQ80321_80321_VBASE,
166 VERDE_PMMR_BASE,
167 VERDE_PMMR_SIZE,
168 VM_PROT_READ|VM_PROT_WRITE,
169 PTE_NOCACHE,
170 },
171 {
172 0,
173 0,
174 0,
175 0,
176 0,
177 }
178 };
179
180 #define SDRAM_START 0xa0000000
181
182 extern vm_offset_t xscale_cache_clean_addr;
183
184 void *
initarm(void * arg,void * arg2)185 initarm(void *arg, void *arg2)
186 {
187 struct pv_addr kernel_l1pt;
188 struct pv_addr dpcpu;
189 int loop, i;
190 u_int l1pagetable;
191 vm_offset_t freemempos;
192 vm_offset_t freemem_pt;
193 vm_offset_t afterkern;
194 vm_offset_t freemem_after;
195 vm_offset_t lastaddr;
196 uint32_t memsize, memstart;
197
198 set_cpufuncs();
199 lastaddr = fake_preload_metadata();
200 pcpu_init(pcpup, 0, sizeof(struct pcpu));
201 PCPU_SET(curthread, &thread0);
202
203 /* Do basic tuning, hz etc */
204 init_param1();
205
206 freemempos = 0xa0200000;
207 /* Define a macro to simplify memory allocation */
208 #define valloc_pages(var, np) \
209 alloc_pages((var).pv_pa, (np)); \
210 (var).pv_va = (var).pv_pa + 0x20000000;
211
212 #define alloc_pages(var, np) \
213 freemempos -= (np * PAGE_SIZE); \
214 (var) = freemempos; \
215 memset((char *)(var), 0, ((np) * PAGE_SIZE));
216
217 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
218 freemempos -= PAGE_SIZE;
219 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
220 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
221 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
222 valloc_pages(kernel_pt_table[loop],
223 L2_TABLE_SIZE / PAGE_SIZE);
224 } else {
225 kernel_pt_table[loop].pv_pa = freemempos +
226 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
227 L2_TABLE_SIZE_REAL;
228 kernel_pt_table[loop].pv_va =
229 kernel_pt_table[loop].pv_pa + 0x20000000;
230 }
231 }
232 freemem_pt = freemempos;
233 freemempos = 0xa0100000;
234 /*
235 * Allocate a page for the system page mapped to V0x00000000
236 * This page will just contain the system vectors and can be
237 * shared by all processes.
238 */
239 valloc_pages(systempage, 1);
240
241 /* Allocate dynamic per-cpu area. */
242 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
243 dpcpu_init((void *)dpcpu.pv_va, 0);
244
245 /* Allocate stacks for all modes */
246 valloc_pages(irqstack, IRQ_STACK_SIZE);
247 valloc_pages(abtstack, ABT_STACK_SIZE);
248 valloc_pages(undstack, UND_STACK_SIZE);
249 valloc_pages(kernelstack, KSTACK_PAGES);
250 alloc_pages(minidataclean.pv_pa, 1);
251 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
252 #ifdef ARM_USE_SMALL_ALLOC
253 freemempos -= PAGE_SIZE;
254 freemem_pt = trunc_page(freemem_pt);
255 freemem_after = freemempos - ((freemem_pt - 0xa0100000) /
256 PAGE_SIZE) * sizeof(struct arm_small_page);
257 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000)
258 , (void *)0xc0100000, freemem_pt - 0xa0100000, 1);
259 freemem_after -= ((freemem_after - 0xa0001000) / PAGE_SIZE) *
260 sizeof(struct arm_small_page);
261 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000)
262 , (void *)0xc0001000, trunc_page(freemem_after) - 0xa0001000, 0);
263 freemempos = trunc_page(freemem_after);
264 freemempos -= PAGE_SIZE;
265 #endif
266 /*
267 * Allocate memory for the l1 and l2 page tables. The scheme to avoid
268 * wasting memory by allocating the l1pt on the first 16k memory was
269 * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
270 * this to work (which is supposed to be the case).
271 */
272
273 /*
274 * Now we start construction of the L1 page table
275 * We start by mapping the L2 page tables into the L1.
276 * This means that we can replace L1 mappings later on if necessary
277 */
278 l1pagetable = kernel_l1pt.pv_va;
279
280 /* Map the L2 pages tables in the L1 page table */
281 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
282 &kernel_pt_table[KERNEL_PT_SYS]);
283 pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
284 &kernel_pt_table[KERNEL_PT_IOPXS]);
285 pmap_link_l2pt(l1pagetable, KERNBASE,
286 &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
287 pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
288 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
289 pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
290 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
291 pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
292 (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
293 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
294 freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
295 afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & ~(L1_S_SIZE
296 - 1));
297 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
298 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
299 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
300 }
301 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
302 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
303
304
305 #ifdef ARM_USE_SMALL_ALLOC
306 if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) {
307 arm_add_smallalloc_pages((void *)(freemem_after),
308 (void*)(freemem_after + PAGE_SIZE),
309 afterkern - (freemem_after + PAGE_SIZE), 0);
310
311 }
312 #endif
313
314 /* Map the Mini-Data cache clean area. */
315 xscale_setup_minidata(l1pagetable, afterkern,
316 minidataclean.pv_pa);
317
318 /* Map the vector page. */
319 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
320 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
321 pmap_devmap_bootstrap(l1pagetable, iq80321_devmap);
322 /*
323 * Give the XScale global cache clean code an appropriately
324 * sized chunk of unmapped VA space starting at 0xff000000
325 * (our device mappings end before this address).
326 */
327 xscale_cache_clean_addr = 0xff000000U;
328
329 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
330 setttb(kernel_l1pt.pv_pa);
331 cpu_tlb_flushID();
332 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
333 /*
334 * Pages were allocated during the secondary bootstrap for the
335 * stacks for different CPU modes.
336 * We must now set the r13 registers in the different CPU modes to
337 * point to these stacks.
338 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
339 * of the stack memory.
340 */
341
342
343 set_stackptr(PSR_IRQ32_MODE,
344 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
345 set_stackptr(PSR_ABT32_MODE,
346 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
347 set_stackptr(PSR_UND32_MODE,
348 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
349
350
351
352 /*
353 * We must now clean the cache again....
354 * Cleaning may be done by reading new data to displace any
355 * dirty data in the cache. This will have happened in setttb()
356 * but since we are boot strapping the addresses used for the read
357 * may have just been remapped and thus the cache could be out
358 * of sync. A re-clean after the switch will cure this.
359 * After booting there are no gross relocations of the kernel thus
360 * this problem will not occur after initarm().
361 */
362 cpu_idcache_wbinv_all();
363 /*
364 * Fetch the SDRAM start/size from the i80321 SDRAM configration
365 * registers.
366 */
367 i80321_calibrate_delay();
368 i80321_sdram_bounds(&obio_bs_tag, IQ80321_80321_VBASE + VERDE_MCU_BASE,
369 &memstart, &memsize);
370 physmem = memsize / PAGE_SIZE;
371 cninit();
372
373 /* Set stack for exception handlers */
374
375 data_abort_handler_address = (u_int)data_abort_handler;
376 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
377 undefined_handler_address = (u_int)undefinedinstruction_bounce;
378 undefined_init();
379
380 proc_linkup0(&proc0, &thread0);
381 thread0.td_kstack = kernelstack.pv_va;
382 thread0.td_pcb = (struct pcb *)
383 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
384 thread0.td_pcb->pcb_flags = 0;
385 thread0.td_frame = &proc0_tf;
386 pcpup->pc_curpcb = thread0.td_pcb;
387
388 /* Enable MMU, I-cache, D-cache, write buffer. */
389
390 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
391
392
393
394 pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
395 /*
396 * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before
397 * calling pmap_bootstrap.
398 */
399 dump_avail[0] = 0xa0000000;
400 dump_avail[1] = 0xa0000000 + memsize;
401 dump_avail[2] = 0;
402 dump_avail[3] = 0;
403
404 pmap_bootstrap(pmap_curmaxkvaddr,
405 0xd0000000, &kernel_l1pt);
406 msgbufp = (void*)msgbufpv.pv_va;
407 msgbufinit(msgbufp, msgbufsize);
408 mutex_init();
409
410 i = 0;
411 #ifdef ARM_USE_SMALL_ALLOC
412 phys_avail[i++] = 0xa0000000;
413 phys_avail[i++] = 0xa0001000; /*
414 *XXX: Gross hack to get our
415 * pages in the vm_page_array
416 . */
417 #endif
418 phys_avail[i++] = round_page(virtual_avail - KERNBASE + SDRAM_START);
419 phys_avail[i++] = trunc_page(0xa0000000 + memsize - 1);
420 phys_avail[i++] = 0;
421 phys_avail[i] = 0;
422
423 init_param2(physmem);
424 kdb_init();
425 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
426 sizeof(struct pcb)));
427 }
428
429
430 extern int
machdep_pci_route_interrupt(device_t pcib,device_t dev,int pin)431 machdep_pci_route_interrupt(device_t pcib, device_t dev, int pin)
432 {
433 int bus;
434 int device;
435 int func;
436 uint32_t busno;
437 struct i80321_pci_softc *sc = device_get_softc(pcib);
438 bus = pci_get_bus(dev);
439 device = pci_get_slot(dev);
440 func = pci_get_function(dev);
441 busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
442 busno = PCIXSR_BUSNO(busno);
443 if (busno == 0xff)
444 busno = 0;
445 if (bus != busno)
446 goto no_mapping;
447 switch (device) {
448 /* IQ31244 PCI */
449 case 1: /* PCIX-PCIX bridge */
450 /*
451 * The S-ATA chips are behind the bridge, and all of
452 * the S-ATA interrupts are wired together.
453 */
454 return (ICU_INT_XINT(2));
455 case 2: /* PCI slot */
456 /* All pins are wired together. */
457 return (ICU_INT_XINT(3));
458 case 3: /* i82546 dual Gig-E */
459 if (pin == 1 || pin == 2)
460 return (ICU_INT_XINT(0));
461 goto no_mapping;
462 /* IQ80321 PCI */
463 case 4: /* i82544 Gig-E */
464 case 8: /*
465 * Apparently you can set the device for the ethernet adapter
466 * to 8 with a jumper, so handle that as well
467 */
468 if (pin == 1)
469 return (ICU_INT_XINT(0));
470 goto no_mapping;
471 case 6: /* S-PCI-X slot */
472 if (pin == 1)
473 return (ICU_INT_XINT(2));
474 if (pin == 2)
475 return (ICU_INT_XINT(3));
476 goto no_mapping;
477 default:
478 no_mapping:
479 printf("No mapping for %d/%d/%d/%c\n", bus, device, func, pin);
480
481 }
482 return (0);
483
484 }
485