xref: /freebsd-14-stable/sys/arm/freescale/imx/imx51_ipuv3.c (revision 685dc743dc3b5645e34836464128e1c0558b404b)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
5  * Copyright (c) 2012, 2013 The FreeBSD Foundation
6  * All rights reserved.
7  *
8  * Portions of this software were developed by Oleksandr Rybalko
9  * under sponsorship from the FreeBSD Foundation.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30  * SUCH DAMAGE.
31  *
32  */
33 #include <sys/cdefs.h>
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/bio.h>
37 #include <sys/bus.h>
38 #include <sys/conf.h>
39 #include <sys/endian.h>
40 #include <sys/kernel.h>
41 #include <sys/kthread.h>
42 #include <sys/lock.h>
43 #include <sys/malloc.h>
44 #include <sys/module.h>
45 #include <sys/mutex.h>
46 #include <sys/queue.h>
47 #include <sys/resource.h>
48 #include <sys/rman.h>
49 #include <sys/time.h>
50 #include <sys/timetc.h>
51 #include <sys/fbio.h>
52 #include <sys/consio.h>
53 
54 #include <sys/kdb.h>
55 
56 #include <vm/vm.h>
57 #include <vm/pmap.h>
58 
59 #include <machine/bus.h>
60 #include <machine/fdt.h>
61 #include <machine/resource.h>
62 #include <machine/intr.h>
63 
64 #include <dev/ofw/ofw_bus.h>
65 #include <dev/ofw/ofw_bus_subr.h>
66 
67 #include <dev/fb/fbreg.h>
68 #include <dev/syscons/syscons.h>
69 
70 #include <arm/freescale/imx/imx51_ccmvar.h>
71 
72 #include <arm/freescale/imx/imx51_ipuv3reg.h>
73 
74 #define	IMX51_IPU_HSP_CLOCK	665000000
75 #define	IPU3FB_FONT_HEIGHT	16
76 
77 struct ipu3sc_softc {
78 	device_t		dev;
79 	bus_addr_t		pbase;
80 	bus_addr_t		vbase;
81 
82 	bus_space_tag_t		iot;
83 	bus_space_handle_t	ioh;
84 	bus_space_handle_t	cm_ioh;
85 	bus_space_handle_t	dp_ioh;
86 	bus_space_handle_t	di0_ioh;
87 	bus_space_handle_t	di1_ioh;
88 	bus_space_handle_t	dctmpl_ioh;
89 	bus_space_handle_t	dc_ioh;
90 	bus_space_handle_t	dmfc_ioh;
91 	bus_space_handle_t	idmac_ioh;
92 	bus_space_handle_t	cpmem_ioh;
93 };
94 
95 struct video_adapter_softc {
96 	/* Videoadpater part */
97 	video_adapter_t	va;
98 
99 	intptr_t	fb_addr;
100 	intptr_t	fb_paddr;
101 	unsigned int	fb_size;
102 
103 	int		bpp;
104 	int		depth;
105 	unsigned int	height;
106 	unsigned int	width;
107 	unsigned int	stride;
108 
109 	unsigned int	xmargin;
110 	unsigned int	ymargin;
111 
112 	unsigned char	*font;
113 	int		initialized;
114 };
115 
116 static struct ipu3sc_softc *ipu3sc_softc;
117 static struct video_adapter_softc va_softc;
118 
119 /* FIXME: not only 2 bytes color supported */
120 static uint16_t colors[16] = {
121 	0x0000,	/* black */
122 	0x001f,	/* blue */
123 	0x07e0,	/* green */
124 	0x07ff,	/* cyan */
125 	0xf800,	/* red */
126 	0xf81f,	/* magenta */
127 	0x3800,	/* brown */
128 	0xc618,	/* light grey */
129 	0xc618,	/* XXX: dark grey */
130 	0x001f,	/* XXX: light blue */
131 	0x07e0,	/* XXX: light green */
132 	0x07ff,	/* XXX: light cyan */
133 	0xf800,	/* XXX: light red */
134 	0xf81f,	/* XXX: light magenta */
135 	0xffe0,	/* yellow */
136 	0xffff,	/* white */
137 };
138 static uint32_t colors_24[16] = {
139 	0x000000,/* Black	*/
140 	0x000080,/* Blue	*/
141 	0x008000,/* Green 	*/
142 	0x008080,/* Cyan 	*/
143 	0x800000,/* Red 	*/
144 	0x800080,/* Magenta	*/
145 	0xcc6600,/* brown	*/
146 	0xC0C0C0,/* Silver 	*/
147 	0x808080,/* Gray 	*/
148 	0x0000FF,/* Light Blue 	*/
149 	0x00FF00,/* Light Green */
150 	0x00FFFF,/* Light Cyan 	*/
151 	0xFF0000,/* Light Red 	*/
152 	0xFF00FF,/* Light Magenta */
153 	0xFFFF00,/* Yellow 	*/
154 	0xFFFFFF,/* White 	*/
155 
156 };
157 
158 #define	IPUV3_READ(ipuv3, module, reg)					\
159 	bus_space_read_4((ipuv3)->iot, (ipuv3)->module##_ioh, (reg))
160 #define	IPUV3_WRITE(ipuv3, module, reg, val)				\
161 	bus_space_write_4((ipuv3)->iot, (ipuv3)->module##_ioh, (reg), (val))
162 
163 #define	CPMEM_CHANNEL_OFFSET(_c)	((_c) * 0x40)
164 #define	CPMEM_WORD_OFFSET(_w)		((_w) * 0x20)
165 #define	CPMEM_DP_OFFSET(_d)		((_d) * 0x10000)
166 #define	IMX_IPU_DP0		0
167 #define	IMX_IPU_DP1		1
168 #define	CPMEM_CHANNEL(_dp, _ch, _w)					\
169 	    (CPMEM_DP_OFFSET(_dp) + CPMEM_CHANNEL_OFFSET(_ch) +		\
170 		CPMEM_WORD_OFFSET(_w))
171 #define	CPMEM_OFFSET(_dp, _ch, _w, _o)					\
172 	    (CPMEM_CHANNEL((_dp), (_ch), (_w)) + (_o))
173 
174 #define	IPUV3_DEBUG 100
175 
176 #ifdef IPUV3_DEBUG
177 #define	SUBMOD_DUMP_REG(_sc, _m, _l)					\
178 	{								\
179 		int i;							\
180 		printf("*** " #_m " ***\n");				\
181 		for (i = 0; i <= (_l); i += 4) {			\
182 			if ((i % 32) == 0)				\
183 				printf("%04x: ", i & 0xffff);		\
184 			printf("0x%08x%c", IPUV3_READ((_sc), _m, i),	\
185 			    ((i + 4) % 32)?' ':'\n');			\
186 		}							\
187 		printf("\n");						\
188 	}
189 #endif
190 
191 #ifdef IPUV3_DEBUG
192 int ipuv3_debug = IPUV3_DEBUG;
193 #define	DPRINTFN(n,x)   if (ipuv3_debug>(n)) printf x; else
194 #else
195 #define	DPRINTFN(n,x)
196 #endif
197 
198 static int	ipu3_fb_probe(device_t);
199 static int	ipu3_fb_attach(device_t);
200 
201 static int
ipu3_fb_malloc(struct ipu3sc_softc * sc,size_t size)202 ipu3_fb_malloc(struct ipu3sc_softc *sc, size_t size)
203 {
204 
205 	sc->vbase = (uint32_t)contigmalloc(size, M_DEVBUF, M_ZERO, 0, ~0,
206 	    PAGE_SIZE, 0);
207 	sc->pbase = vtophys(sc->vbase);
208 
209 	return (0);
210 }
211 
212 static void
ipu3_fb_init(void * arg)213 ipu3_fb_init(void *arg)
214 {
215 	struct ipu3sc_softc *sc = arg;
216 	struct video_adapter_softc *va_sc = &va_softc;
217 	uint64_t w0sh96;
218 	uint32_t w1sh96;
219 
220 	/* FW W0[137:125] - 96 = [41:29] */
221 	/* FH W0[149:138] - 96 = [53:42] */
222 	w0sh96 = IPUV3_READ(sc, cpmem, CPMEM_OFFSET(IMX_IPU_DP1, 23, 0, 16));
223 	w0sh96 <<= 32;
224 	w0sh96 |= IPUV3_READ(sc, cpmem, CPMEM_OFFSET(IMX_IPU_DP1, 23, 0, 12));
225 
226 	va_sc->width = ((w0sh96 >> 29) & 0x1fff) + 1;
227 	va_sc->height = ((w0sh96 >> 42) & 0x0fff) + 1;
228 
229 	/* SLY W1[115:102] - 96 = [19:6] */
230 	w1sh96 = IPUV3_READ(sc, cpmem, CPMEM_OFFSET(IMX_IPU_DP1, 23, 1, 12));
231 	va_sc->stride = ((w1sh96 >> 6) & 0x3fff) + 1;
232 
233 	printf("%dx%d [%d]\n", va_sc->width, va_sc->height, va_sc->stride);
234 	va_sc->fb_size = va_sc->height * va_sc->stride;
235 
236 	ipu3_fb_malloc(sc, va_sc->fb_size);
237 
238 	/* DP1 + config_ch_23 + word_2 */
239 	IPUV3_WRITE(sc, cpmem, CPMEM_OFFSET(IMX_IPU_DP1, 23, 1, 0),
240 	    ((sc->pbase >> 3) | ((sc->pbase >> 3) << 29)) & 0xffffffff);
241 
242 	IPUV3_WRITE(sc, cpmem, CPMEM_OFFSET(IMX_IPU_DP1, 23, 1, 4),
243 	    ((sc->pbase >> 3) >> 3) & 0xffffffff);
244 
245 	va_sc->fb_addr = (intptr_t)sc->vbase;
246 	va_sc->fb_paddr = (intptr_t)sc->pbase;
247 	va_sc->bpp = va_sc->stride / va_sc->width;
248 	va_sc->depth = va_sc->bpp * 8;
249 }
250 
251 static int
ipu3_fb_probe(device_t dev)252 ipu3_fb_probe(device_t dev)
253 {
254 	int error;
255 
256 	if (!ofw_bus_status_okay(dev))
257 		return (ENXIO);
258 
259 	if (!ofw_bus_is_compatible(dev, "fsl,ipu3"))
260 		return (ENXIO);
261 
262 	device_set_desc(dev, "i.MX5x Image Processing Unit v3 (FB)");
263 
264 	error = sc_probe_unit(device_get_unit(dev),
265 	    device_get_flags(dev) | SC_AUTODETECT_KBD);
266 
267 	if (error != 0)
268 		return (error);
269 
270 	return (BUS_PROBE_DEFAULT);
271 }
272 
273 static int
ipu3_fb_attach(device_t dev)274 ipu3_fb_attach(device_t dev)
275 {
276 	struct ipu3sc_softc *sc = device_get_softc(dev);
277 	bus_space_tag_t iot;
278 	bus_space_handle_t ioh;
279 	phandle_t node;
280 	pcell_t reg;
281 	int err;
282 	uintptr_t base;
283 
284 	if (ipu3sc_softc)
285 		return (ENXIO);
286 
287 	ipu3sc_softc = sc;
288 
289 	if (bootverbose)
290 		device_printf(dev, "clock gate status is %d\n",
291 		    imx51_get_clk_gating(IMX51CLK_IPU_HSP_CLK_ROOT));
292 
293 	sc->dev = dev;
294 
295 	err = (sc_attach_unit(device_get_unit(dev),
296 	    device_get_flags(dev) | SC_AUTODETECT_KBD));
297 
298 	if (err) {
299 		device_printf(dev, "failed to attach syscons\n");
300 		goto fail;
301 	}
302 
303 	sc = device_get_softc(dev);
304 	sc->iot = iot = fdtbus_bs_tag;
305 
306 	/*
307 	 * Retrieve the device address based on the start address in the
308 	 * DTS.  The DTS for i.MX51 specifies 0x5e000000 as the first register
309 	 * address, so we just subtract IPU_CM_BASE to get the offset at which
310 	 * the IPU device was memory mapped.
311 	 * On i.MX53, the offset is 0.
312 	 */
313 	node = ofw_bus_get_node(dev);
314 	if ((OF_getencprop(node, "reg", &reg, sizeof(reg))) <= 0)
315 		base = 0;
316 	else
317 		base = reg - IPU_CM_BASE(0);
318 	/* map controller registers */
319 	err = bus_space_map(iot, IPU_CM_BASE(base), IPU_CM_SIZE, 0, &ioh);
320 	if (err)
321 		goto fail_retarn_cm;
322 	sc->cm_ioh = ioh;
323 
324 	/* map Display Multi FIFO Controller registers */
325 	err = bus_space_map(iot, IPU_DMFC_BASE(base), IPU_DMFC_SIZE, 0, &ioh);
326 	if (err)
327 		goto fail_retarn_dmfc;
328 	sc->dmfc_ioh = ioh;
329 
330 	/* map Display Interface 0 registers */
331 	err = bus_space_map(iot, IPU_DI0_BASE(base), IPU_DI0_SIZE, 0, &ioh);
332 	if (err)
333 		goto fail_retarn_di0;
334 	sc->di0_ioh = ioh;
335 
336 	/* map Display Interface 1 registers */
337 	err = bus_space_map(iot, IPU_DI1_BASE(base), IPU_DI0_SIZE, 0, &ioh);
338 	if (err)
339 		goto fail_retarn_di1;
340 	sc->di1_ioh = ioh;
341 
342 	/* map Display Processor registers */
343 	err = bus_space_map(iot, IPU_DP_BASE(base), IPU_DP_SIZE, 0, &ioh);
344 	if (err)
345 		goto fail_retarn_dp;
346 	sc->dp_ioh = ioh;
347 
348 	/* map Display Controller registers */
349 	err = bus_space_map(iot, IPU_DC_BASE(base), IPU_DC_SIZE, 0, &ioh);
350 	if (err)
351 		goto fail_retarn_dc;
352 	sc->dc_ioh = ioh;
353 
354 	/* map Image DMA Controller registers */
355 	err = bus_space_map(iot, IPU_IDMAC_BASE(base), IPU_IDMAC_SIZE, 0,
356 	    &ioh);
357 	if (err)
358 		goto fail_retarn_idmac;
359 	sc->idmac_ioh = ioh;
360 
361 	/* map CPMEM registers */
362 	err = bus_space_map(iot, IPU_CPMEM_BASE(base), IPU_CPMEM_SIZE, 0,
363 	    &ioh);
364 	if (err)
365 		goto fail_retarn_cpmem;
366 	sc->cpmem_ioh = ioh;
367 
368 	/* map DCTEMPL registers */
369 	err = bus_space_map(iot, IPU_DCTMPL_BASE(base), IPU_DCTMPL_SIZE, 0,
370 	    &ioh);
371 	if (err)
372 		goto fail_retarn_dctmpl;
373 	sc->dctmpl_ioh = ioh;
374 
375 #ifdef notyet
376 	sc->ih = imx51_ipuv3_intr_establish(IMX51_INT_IPUV3, IPL_BIO,
377 	    ipuv3intr, sc);
378 	if (sc->ih == NULL) {
379 		device_printf(sc->dev,
380 		    "unable to establish interrupt at irq %d\n",
381 		    IMX51_INT_IPUV3);
382 		return (ENXIO);
383 	}
384 #endif
385 
386 	/*
387 	 * We have to wait until interrupts are enabled.
388 	 * Mailbox relies on it to get data from VideoCore
389 	 */
390 	ipu3_fb_init(sc);
391 
392 	return (0);
393 
394 fail:
395 	return (ENXIO);
396 fail_retarn_dctmpl:
397 	bus_space_unmap(sc->iot, sc->cpmem_ioh, IPU_CPMEM_SIZE);
398 fail_retarn_cpmem:
399 	bus_space_unmap(sc->iot, sc->idmac_ioh, IPU_IDMAC_SIZE);
400 fail_retarn_idmac:
401 	bus_space_unmap(sc->iot, sc->dc_ioh, IPU_DC_SIZE);
402 fail_retarn_dp:
403 	bus_space_unmap(sc->iot, sc->dp_ioh, IPU_DP_SIZE);
404 fail_retarn_dc:
405 	bus_space_unmap(sc->iot, sc->di1_ioh, IPU_DI1_SIZE);
406 fail_retarn_di1:
407 	bus_space_unmap(sc->iot, sc->di0_ioh, IPU_DI0_SIZE);
408 fail_retarn_di0:
409 	bus_space_unmap(sc->iot, sc->dmfc_ioh, IPU_DMFC_SIZE);
410 fail_retarn_dmfc:
411 	bus_space_unmap(sc->iot, sc->dc_ioh, IPU_CM_SIZE);
412 fail_retarn_cm:
413 	device_printf(sc->dev,
414 	    "failed to map registers (errno=%d)\n", err);
415 	return (err);
416 }
417 
418 static device_method_t ipu3_fb_methods[] = {
419 	/* Device interface */
420 	DEVMETHOD(device_probe,		ipu3_fb_probe),
421 	DEVMETHOD(device_attach,	ipu3_fb_attach),
422 	{ 0, 0 }
423 };
424 
425 static driver_t ipu3_fb_driver = {
426 	"fb",
427 	ipu3_fb_methods,
428 	sizeof(struct ipu3sc_softc),
429 };
430 
431 DRIVER_MODULE(ipu3fb, simplebus, ipu3_fb_driver, 0, 0);
432 
433 /*
434  * Video driver routines and glue.
435  */
436 static int			ipu3fb_configure(int);
437 static vi_probe_t		ipu3fb_probe;
438 static vi_init_t		ipu3fb_init;
439 static vi_get_info_t		ipu3fb_get_info;
440 static vi_query_mode_t		ipu3fb_query_mode;
441 static vi_set_mode_t		ipu3fb_set_mode;
442 static vi_save_font_t		ipu3fb_save_font;
443 static vi_load_font_t		ipu3fb_load_font;
444 static vi_show_font_t		ipu3fb_show_font;
445 static vi_save_palette_t	ipu3fb_save_palette;
446 static vi_load_palette_t	ipu3fb_load_palette;
447 static vi_set_border_t		ipu3fb_set_border;
448 static vi_save_state_t		ipu3fb_save_state;
449 static vi_load_state_t		ipu3fb_load_state;
450 static vi_set_win_org_t		ipu3fb_set_win_org;
451 static vi_read_hw_cursor_t	ipu3fb_read_hw_cursor;
452 static vi_set_hw_cursor_t	ipu3fb_set_hw_cursor;
453 static vi_set_hw_cursor_shape_t	ipu3fb_set_hw_cursor_shape;
454 static vi_blank_display_t	ipu3fb_blank_display;
455 static vi_mmap_t		ipu3fb_mmap;
456 static vi_ioctl_t		ipu3fb_ioctl;
457 static vi_clear_t		ipu3fb_clear;
458 static vi_fill_rect_t		ipu3fb_fill_rect;
459 static vi_bitblt_t		ipu3fb_bitblt;
460 static vi_diag_t		ipu3fb_diag;
461 static vi_save_cursor_palette_t	ipu3fb_save_cursor_palette;
462 static vi_load_cursor_palette_t	ipu3fb_load_cursor_palette;
463 static vi_copy_t		ipu3fb_copy;
464 static vi_putp_t		ipu3fb_putp;
465 static vi_putc_t		ipu3fb_putc;
466 static vi_puts_t		ipu3fb_puts;
467 static vi_putm_t		ipu3fb_putm;
468 
469 static video_switch_t ipu3fbvidsw = {
470 	.probe			= ipu3fb_probe,
471 	.init			= ipu3fb_init,
472 	.get_info		= ipu3fb_get_info,
473 	.query_mode		= ipu3fb_query_mode,
474 	.set_mode		= ipu3fb_set_mode,
475 	.save_font		= ipu3fb_save_font,
476 	.load_font		= ipu3fb_load_font,
477 	.show_font		= ipu3fb_show_font,
478 	.save_palette		= ipu3fb_save_palette,
479 	.load_palette		= ipu3fb_load_palette,
480 	.set_border		= ipu3fb_set_border,
481 	.save_state		= ipu3fb_save_state,
482 	.load_state		= ipu3fb_load_state,
483 	.set_win_org		= ipu3fb_set_win_org,
484 	.read_hw_cursor		= ipu3fb_read_hw_cursor,
485 	.set_hw_cursor		= ipu3fb_set_hw_cursor,
486 	.set_hw_cursor_shape	= ipu3fb_set_hw_cursor_shape,
487 	.blank_display		= ipu3fb_blank_display,
488 	.mmap			= ipu3fb_mmap,
489 	.ioctl			= ipu3fb_ioctl,
490 	.clear			= ipu3fb_clear,
491 	.fill_rect		= ipu3fb_fill_rect,
492 	.bitblt			= ipu3fb_bitblt,
493 	.diag			= ipu3fb_diag,
494 	.save_cursor_palette	= ipu3fb_save_cursor_palette,
495 	.load_cursor_palette	= ipu3fb_load_cursor_palette,
496 	.copy			= ipu3fb_copy,
497 	.putp			= ipu3fb_putp,
498 	.putc			= ipu3fb_putc,
499 	.puts			= ipu3fb_puts,
500 	.putm			= ipu3fb_putm,
501 };
502 
503 VIDEO_DRIVER(ipu3fb, ipu3fbvidsw, ipu3fb_configure);
504 
505 extern sc_rndr_sw_t txtrndrsw;
506 RENDERER(ipu3fb, 0, txtrndrsw, gfb_set);
507 RENDERER_MODULE(ipu3fb, gfb_set);
508 
509 static uint16_t ipu3fb_static_window[ROW*COL];
510 extern u_char dflt_font_16[];
511 
512 static int
ipu3fb_configure(int flags)513 ipu3fb_configure(int flags)
514 {
515 	struct video_adapter_softc *sc;
516 
517 	sc = &va_softc;
518 
519 	if (sc->initialized)
520 		return 0;
521 
522 	sc->width = 640;
523 	sc->height = 480;
524 	sc->bpp = 2;
525 	sc->stride = sc->width * sc->bpp;
526 
527 	ipu3fb_init(0, &sc->va, 0);
528 
529 	sc->initialized = 1;
530 
531 	return (0);
532 }
533 
534 static int
ipu3fb_probe(int unit,video_adapter_t ** adp,void * arg,int flags)535 ipu3fb_probe(int unit, video_adapter_t **adp, void *arg, int flags)
536 {
537 
538 	return (0);
539 }
540 
541 static int
ipu3fb_init(int unit,video_adapter_t * adp,int flags)542 ipu3fb_init(int unit, video_adapter_t *adp, int flags)
543 {
544 	struct video_adapter_softc *sc;
545 	video_info_t *vi;
546 
547 	sc = (struct video_adapter_softc *)adp;
548 	vi = &adp->va_info;
549 
550 	vid_init_struct(adp, "ipu3fb", -1, unit);
551 
552 	sc->font = dflt_font_16;
553 	vi->vi_cheight = IPU3FB_FONT_HEIGHT;
554 	vi->vi_cwidth = 8;
555 	vi->vi_width = sc->width/8;
556 	vi->vi_height = sc->height/vi->vi_cheight;
557 
558 	/*
559 	 * Clamp width/height to syscons maximums
560 	 */
561 	if (vi->vi_width > COL)
562 		vi->vi_width = COL;
563 	if (vi->vi_height > ROW)
564 		vi->vi_height = ROW;
565 
566 	sc->xmargin = (sc->width - (vi->vi_width * vi->vi_cwidth)) / 2;
567 	sc->ymargin = (sc->height - (vi->vi_height * vi->vi_cheight))/2;
568 
569 	adp->va_window = (vm_offset_t) ipu3fb_static_window;
570 	adp->va_flags |= V_ADP_FONT /* | V_ADP_COLOR | V_ADP_MODECHANGE */;
571 	adp->va_line_width = sc->stride;
572 	adp->va_buffer_size = sc->fb_size;
573 
574 	vid_register(&sc->va);
575 
576 	return (0);
577 }
578 
579 static int
ipu3fb_get_info(video_adapter_t * adp,int mode,video_info_t * info)580 ipu3fb_get_info(video_adapter_t *adp, int mode, video_info_t *info)
581 {
582 
583 	bcopy(&adp->va_info, info, sizeof(*info));
584 	return (0);
585 }
586 
587 static int
ipu3fb_query_mode(video_adapter_t * adp,video_info_t * info)588 ipu3fb_query_mode(video_adapter_t *adp, video_info_t *info)
589 {
590 
591 	return (0);
592 }
593 
594 static int
ipu3fb_set_mode(video_adapter_t * adp,int mode)595 ipu3fb_set_mode(video_adapter_t *adp, int mode)
596 {
597 
598 	return (0);
599 }
600 
601 static int
ipu3fb_save_font(video_adapter_t * adp,int page,int size,int width,u_char * data,int c,int count)602 ipu3fb_save_font(video_adapter_t *adp, int page, int size, int width,
603     u_char *data, int c, int count)
604 {
605 
606 	return (0);
607 }
608 
609 static int
ipu3fb_load_font(video_adapter_t * adp,int page,int size,int width,u_char * data,int c,int count)610 ipu3fb_load_font(video_adapter_t *adp, int page, int size, int width,
611     u_char *data, int c, int count)
612 {
613 	struct video_adapter_softc *sc;
614 
615 	sc = (struct video_adapter_softc *)adp;
616 	sc->font = data;
617 
618 	return (0);
619 }
620 
621 static int
ipu3fb_show_font(video_adapter_t * adp,int page)622 ipu3fb_show_font(video_adapter_t *adp, int page)
623 {
624 
625 	return (0);
626 }
627 
628 static int
ipu3fb_save_palette(video_adapter_t * adp,u_char * palette)629 ipu3fb_save_palette(video_adapter_t *adp, u_char *palette)
630 {
631 
632 	return (0);
633 }
634 
635 static int
ipu3fb_load_palette(video_adapter_t * adp,u_char * palette)636 ipu3fb_load_palette(video_adapter_t *adp, u_char *palette)
637 {
638 
639 	return (0);
640 }
641 
642 static int
ipu3fb_set_border(video_adapter_t * adp,int border)643 ipu3fb_set_border(video_adapter_t *adp, int border)
644 {
645 
646 	return (ipu3fb_blank_display(adp, border));
647 }
648 
649 static int
ipu3fb_save_state(video_adapter_t * adp,void * p,size_t size)650 ipu3fb_save_state(video_adapter_t *adp, void *p, size_t size)
651 {
652 
653 	return (0);
654 }
655 
656 static int
ipu3fb_load_state(video_adapter_t * adp,void * p)657 ipu3fb_load_state(video_adapter_t *adp, void *p)
658 {
659 
660 	return (0);
661 }
662 
663 static int
ipu3fb_set_win_org(video_adapter_t * adp,off_t offset)664 ipu3fb_set_win_org(video_adapter_t *adp, off_t offset)
665 {
666 
667 	return (0);
668 }
669 
670 static int
ipu3fb_read_hw_cursor(video_adapter_t * adp,int * col,int * row)671 ipu3fb_read_hw_cursor(video_adapter_t *adp, int *col, int *row)
672 {
673 
674 	*col = *row = 0;
675 	return (0);
676 }
677 
678 static int
ipu3fb_set_hw_cursor(video_adapter_t * adp,int col,int row)679 ipu3fb_set_hw_cursor(video_adapter_t *adp, int col, int row)
680 {
681 
682 	return (0);
683 }
684 
685 static int
ipu3fb_set_hw_cursor_shape(video_adapter_t * adp,int base,int height,int celsize,int blink)686 ipu3fb_set_hw_cursor_shape(video_adapter_t *adp, int base, int height,
687     int celsize, int blink)
688 {
689 
690 	return (0);
691 }
692 
693 static int
ipu3fb_blank_display(video_adapter_t * adp,int mode)694 ipu3fb_blank_display(video_adapter_t *adp, int mode)
695 {
696 
697 	return (0);
698 }
699 
700 static int
ipu3fb_mmap(video_adapter_t * adp,vm_ooffset_t offset,vm_paddr_t * paddr,int prot,vm_memattr_t * memattr)701 ipu3fb_mmap(video_adapter_t *adp, vm_ooffset_t offset, vm_paddr_t *paddr,
702     int prot, vm_memattr_t *memattr)
703 {
704 	struct video_adapter_softc *sc;
705 
706 	sc = (struct video_adapter_softc *)adp;
707 
708 	/*
709 	 * This might be a legacy VGA mem request: if so, just point it at the
710 	 * framebuffer, since it shouldn't be touched
711 	 */
712 	if (offset < sc->stride * sc->height) {
713 		*paddr = sc->fb_paddr + offset;
714 		return (0);
715 	}
716 
717 	return (EINVAL);
718 }
719 
720 static int
ipu3fb_ioctl(video_adapter_t * adp,u_long cmd,caddr_t data)721 ipu3fb_ioctl(video_adapter_t *adp, u_long cmd, caddr_t data)
722 {
723 	struct video_adapter_softc *sc;
724 	struct fbtype *fb;
725 
726 	sc = (struct video_adapter_softc *)adp;
727 
728 	switch (cmd) {
729 	case FBIOGTYPE:
730 		fb = (struct fbtype *)data;
731 		fb->fb_type = FBTYPE_PCIMISC;
732 		fb->fb_height = sc->height;
733 		fb->fb_width = sc->width;
734 		fb->fb_depth = sc->depth;
735 		if (sc->depth <= 1 || sc->depth > 8)
736 			fb->fb_cmsize = 0;
737 		else
738 			fb->fb_cmsize = 1 << sc->depth;
739 		fb->fb_size = sc->fb_size;
740 		break;
741 	default:
742 		return (fb_commonioctl(adp, cmd, data));
743 	}
744 
745 	return (0);
746 }
747 
748 static int
ipu3fb_clear(video_adapter_t * adp)749 ipu3fb_clear(video_adapter_t *adp)
750 {
751 
752 	return (ipu3fb_blank_display(adp, 0));
753 }
754 
755 static int
ipu3fb_fill_rect(video_adapter_t * adp,int val,int x,int y,int cx,int cy)756 ipu3fb_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
757 {
758 
759 	return (0);
760 }
761 
762 static int
ipu3fb_bitblt(video_adapter_t * adp,...)763 ipu3fb_bitblt(video_adapter_t *adp, ...)
764 {
765 
766 	return (0);
767 }
768 
769 static int
ipu3fb_diag(video_adapter_t * adp,int level)770 ipu3fb_diag(video_adapter_t *adp, int level)
771 {
772 
773 	return (0);
774 }
775 
776 static int
ipu3fb_save_cursor_palette(video_adapter_t * adp,u_char * palette)777 ipu3fb_save_cursor_palette(video_adapter_t *adp, u_char *palette)
778 {
779 
780 	return (0);
781 }
782 
783 static int
ipu3fb_load_cursor_palette(video_adapter_t * adp,u_char * palette)784 ipu3fb_load_cursor_palette(video_adapter_t *adp, u_char *palette)
785 {
786 
787 	return (0);
788 }
789 
790 static int
ipu3fb_copy(video_adapter_t * adp,vm_offset_t src,vm_offset_t dst,int n)791 ipu3fb_copy(video_adapter_t *adp, vm_offset_t src, vm_offset_t dst, int n)
792 {
793 
794 	return (0);
795 }
796 
797 static int
ipu3fb_putp(video_adapter_t * adp,vm_offset_t off,uint32_t p,uint32_t a,int size,int bpp,int bit_ltor,int byte_ltor)798 ipu3fb_putp(video_adapter_t *adp, vm_offset_t off, uint32_t p, uint32_t a,
799     int size, int bpp, int bit_ltor, int byte_ltor)
800 {
801 
802 	return (0);
803 }
804 
805 static int
ipu3fb_putc(video_adapter_t * adp,vm_offset_t off,uint8_t c,uint8_t a)806 ipu3fb_putc(video_adapter_t *adp, vm_offset_t off, uint8_t c, uint8_t a)
807 {
808 	struct video_adapter_softc *sc;
809 	int col, row, bpp;
810 	int b, i, j, k;
811 	uint8_t *addr;
812 	u_char *p;
813 	uint32_t fg, bg, color;
814 
815 	sc = (struct video_adapter_softc *)adp;
816 	bpp = sc->bpp;
817 
818 	if (sc->fb_addr == 0)
819 		return (0);
820 	row = (off / adp->va_info.vi_width) * adp->va_info.vi_cheight;
821 	col = (off % adp->va_info.vi_width) * adp->va_info.vi_cwidth;
822 	p = sc->font + c * IPU3FB_FONT_HEIGHT;
823 	addr = (uint8_t *)sc->fb_addr
824 	    + (row + sc->ymargin) * (sc->stride)
825 	    + bpp * (col + sc->xmargin);
826 
827 	if (bpp == 2) {
828 		bg = colors[(a >> 4) & 0x0f];
829 		fg = colors[a & 0x0f];
830 	} else if (bpp == 3) {
831 		bg = colors_24[(a >> 4) & 0x0f];
832 		fg = colors_24[a & 0x0f];
833 	} else {
834 		return (ENXIO);
835 	}
836 
837 	for (i = 0; i < IPU3FB_FONT_HEIGHT; i++) {
838 		for (j = 0, k = 7; j < 8; j++, k--) {
839 			if ((p[i] & (1 << k)) == 0)
840 				color = bg;
841 			else
842 				color = fg;
843 			/* FIXME: BPP maybe different */
844 			for (b = 0; b < bpp; b ++)
845 				addr[bpp * j + b] =
846 				    (color >> (b << 3)) & 0xff;
847 		}
848 
849 		addr += (sc->stride);
850 	}
851 
852         return (0);
853 }
854 
855 static int
ipu3fb_puts(video_adapter_t * adp,vm_offset_t off,u_int16_t * s,int len)856 ipu3fb_puts(video_adapter_t *adp, vm_offset_t off, u_int16_t *s, int len)
857 {
858 	int i;
859 
860 	for (i = 0; i < len; i++)
861 		ipu3fb_putc(adp, off + i, s[i] & 0xff, (s[i] & 0xff00) >> 8);
862 
863 	return (0);
864 }
865 
866 static int
ipu3fb_putm(video_adapter_t * adp,int x,int y,uint8_t * pixel_image,uint32_t pixel_mask,int size,int width)867 ipu3fb_putm(video_adapter_t *adp, int x, int y, uint8_t *pixel_image,
868     uint32_t pixel_mask, int size, int width)
869 {
870 
871 	return (0);
872 }
873