xref: /freebsd-13-stable/sys/powerpc/powernv/opal_dev.c (revision 3bc80996974a61a4223eae4c1ccd47b6ee32a48a)
1 /*-
2  * Copyright (c) 2015 Nathan Whitehorn
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/module.h>
31 #include <sys/bus.h>
32 #include <sys/conf.h>
33 #include <sys/clock.h>
34 #include <sys/cpu.h>
35 #include <sys/eventhandler.h>
36 #include <sys/kernel.h>
37 #include <sys/kthread.h>
38 #include <sys/reboot.h>
39 #include <sys/sysctl.h>
40 #include <sys/endian.h>
41 
42 #include <vm/vm.h>
43 #include <vm/pmap.h>
44 
45 #include <dev/ofw/ofw_bus.h>
46 #include <dev/ofw/ofw_bus_subr.h>
47 #include <dev/ofw/openfirm.h>
48 
49 #include "clock_if.h"
50 #include "opal.h"
51 
52 static int	opaldev_probe(device_t);
53 static int	opaldev_attach(device_t);
54 /* clock interface */
55 static int	opal_gettime(device_t dev, struct timespec *ts);
56 static int	opal_settime(device_t dev, struct timespec *ts);
57 /* ofw bus interface */
58 static const struct ofw_bus_devinfo *opaldev_get_devinfo(device_t dev,
59     device_t child);
60 
61 static void	opal_shutdown(void *arg, int howto);
62 static void	opal_handle_shutdown_message(void *unused,
63     struct opal_msg *msg);
64 static void	opal_intr(void *);
65 
66 static device_method_t  opaldev_methods[] = {
67 	/* Device interface */
68 	DEVMETHOD(device_probe,		opaldev_probe),
69 	DEVMETHOD(device_attach,	opaldev_attach),
70 
71 	/* clock interface */
72 	DEVMETHOD(clock_gettime,	opal_gettime),
73 	DEVMETHOD(clock_settime,	opal_settime),
74 
75 	/* Bus interface */
76 	DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str),
77 
78         /* ofw_bus interface */
79 	DEVMETHOD(ofw_bus_get_devinfo,	opaldev_get_devinfo),
80 	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
81 	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
82 	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
83 	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
84 	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
85 
86 	DEVMETHOD_END
87 };
88 
89 static driver_t opaldev_driver = {
90 	"opal",
91 	opaldev_methods,
92 	0
93 };
94 
95 static devclass_t opaldev_devclass;
96 
97 EARLY_DRIVER_MODULE(opaldev, ofwbus, opaldev_driver, opaldev_devclass, 0, 0,
98     BUS_PASS_BUS);
99 
100 static void opal_heartbeat(void);
101 static void opal_handle_messages(void);
102 
103 static struct proc *opal_hb_proc;
104 static struct kproc_desc opal_heartbeat_kp = {
105 	"opal_heartbeat",
106 	opal_heartbeat,
107 	&opal_hb_proc
108 };
109 
110 SYSINIT(opal_heartbeat_setup, SI_SUB_KTHREAD_IDLE, SI_ORDER_ANY, kproc_start,
111     &opal_heartbeat_kp);
112 
113 static int opal_heartbeat_ms;
114 EVENTHANDLER_LIST_DEFINE(OPAL_ASYNC_COMP);
115 EVENTHANDLER_LIST_DEFINE(OPAL_EPOW);
116 EVENTHANDLER_LIST_DEFINE(OPAL_SHUTDOWN);
117 EVENTHANDLER_LIST_DEFINE(OPAL_HMI_EVT);
118 EVENTHANDLER_LIST_DEFINE(OPAL_DPO);
119 EVENTHANDLER_LIST_DEFINE(OPAL_OCC);
120 
121 #define	OPAL_SOFT_OFF		0
122 #define	OPAL_SOFT_REBOOT	1
123 
124 static void
opal_heartbeat(void)125 opal_heartbeat(void)
126 {
127 	uint64_t events;
128 
129 	if (opal_heartbeat_ms == 0)
130 		kproc_exit(0);
131 
132 	while (1) {
133 		events = 0;
134 		/* Turn the OPAL state crank */
135 		opal_call(OPAL_POLL_EVENTS, vtophys(&events));
136 		if (be64toh(events) & OPAL_EVENT_MSG_PENDING)
137 			opal_handle_messages();
138 		tsleep(opal_hb_proc, 0, "opal",
139 		    MSEC_2_TICKS(opal_heartbeat_ms));
140 	}
141 }
142 
143 static int
opaldev_probe(device_t dev)144 opaldev_probe(device_t dev)
145 {
146 	phandle_t iparent;
147 	pcell_t *irqs;
148 	int i, n_irqs;
149 
150 	if (!ofw_bus_is_compatible(dev, "ibm,opal-v3"))
151 		return (ENXIO);
152 	if (opal_check() != 0)
153 		return (ENXIO);
154 
155 	device_set_desc(dev, "OPAL Abstraction Firmware");
156 
157 	/* Manually add IRQs before attaching */
158 	if (OF_hasprop(ofw_bus_get_node(dev), "opal-interrupts")) {
159 		iparent = OF_finddevice("/interrupt-controller@0");
160 		iparent = OF_xref_from_node(iparent);
161 
162 		n_irqs = OF_getproplen(ofw_bus_get_node(dev),
163                     "opal-interrupts") / sizeof(*irqs);
164 		irqs = malloc(n_irqs * sizeof(*irqs), M_DEVBUF, M_WAITOK);
165 		OF_getencprop(ofw_bus_get_node(dev), "opal-interrupts", irqs,
166 		    n_irqs * sizeof(*irqs));
167 		for (i = 0; i < n_irqs; i++)
168 			bus_set_resource(dev, SYS_RES_IRQ, i,
169 			    ofw_bus_map_intr(dev, iparent, 1, &irqs[i]), 1);
170 		free(irqs, M_DEVBUF);
171 	}
172 
173 	return (BUS_PROBE_SPECIFIC);
174 }
175 
176 static int
opaldev_attach(device_t dev)177 opaldev_attach(device_t dev)
178 {
179 	phandle_t child;
180 	device_t cdev;
181 	uint64_t junk;
182 	int i, rv;
183 	uint32_t async_count;
184 	struct ofw_bus_devinfo *dinfo;
185 	struct resource *irq;
186 
187 	/* Test for RTC support and register clock if it works */
188 	rv = opal_call(OPAL_RTC_READ, vtophys(&junk), vtophys(&junk));
189 	do {
190 		rv = opal_call(OPAL_RTC_READ, vtophys(&junk), vtophys(&junk));
191 		if (rv == OPAL_BUSY_EVENT)
192 			rv = opal_call(OPAL_POLL_EVENTS, 0);
193 	} while (rv == OPAL_BUSY_EVENT);
194 
195 	if (rv == OPAL_SUCCESS)
196 		clock_register(dev, 2000);
197 
198 	EVENTHANDLER_REGISTER(OPAL_SHUTDOWN, opal_handle_shutdown_message,
199 	    NULL, EVENTHANDLER_PRI_ANY);
200 	EVENTHANDLER_REGISTER(shutdown_final, opal_shutdown, NULL,
201 	    SHUTDOWN_PRI_LAST);
202 
203 	OF_getencprop(ofw_bus_get_node(dev), "ibm,heartbeat-ms",
204 	    &opal_heartbeat_ms, sizeof(opal_heartbeat_ms));
205 	/* Bind to interrupts */
206 	for (i = 0; (irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
207 	    RF_ACTIVE)) != NULL; i++)
208 		bus_setup_intr(dev, irq, INTR_TYPE_TTY | INTR_MPSAFE |
209 		    INTR_ENTROPY, NULL, opal_intr, (void *)rman_get_start(irq),
210 		    NULL);
211 
212 	OF_getencprop(ofw_bus_get_node(dev), "opal-msg-async-num",
213 	    &async_count, sizeof(async_count));
214 	opal_init_async_tokens(async_count);
215 
216 	for (child = OF_child(ofw_bus_get_node(dev)); child != 0;
217 	    child = OF_peer(child)) {
218 		dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO);
219 		if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) {
220 			free(dinfo, M_DEVBUF);
221 			continue;
222 		}
223 		cdev = device_add_child(dev, NULL, -1);
224 		if (cdev == NULL) {
225 			device_printf(dev, "<%s>: device_add_child failed\n",
226 			    dinfo->obd_name);
227 			ofw_bus_gen_destroy_devinfo(dinfo);
228 			free(dinfo, M_DEVBUF);
229 			continue;
230 		}
231 		device_set_ivars(cdev, dinfo);
232 	}
233 
234 	return (bus_generic_attach(dev));
235 }
236 
237 static int
bcd2bin32(int bcd)238 bcd2bin32(int bcd)
239 {
240 	int out = 0;
241 
242 	out += bcd2bin(bcd & 0xff);
243 	out += 100*bcd2bin((bcd & 0x0000ff00) >> 8);
244 	out += 10000*bcd2bin((bcd & 0x00ff0000) >> 16);
245 	out += 1000000*bcd2bin((bcd & 0xffff0000) >> 24);
246 
247 	return (out);
248 }
249 
250 static int
bin2bcd32(int bin)251 bin2bcd32(int bin)
252 {
253 	int out = 0;
254 	int tmp;
255 
256 	tmp = bin % 100;
257 	out += bin2bcd(tmp) * 0x1;
258 	bin = bin / 100;
259 
260 	tmp = bin % 100;
261 	out += bin2bcd(tmp) * 0x100;
262 	bin = bin / 100;
263 
264 	tmp = bin % 100;
265 	out += bin2bcd(tmp) * 0x10000;
266 
267 	return (out);
268 }
269 
270 static int
opal_gettime(device_t dev,struct timespec * ts)271 opal_gettime(device_t dev, struct timespec *ts)
272 {
273 	int rv;
274 	struct clocktime ct;
275 	uint32_t ymd;
276 	uint64_t hmsm;
277 
278 	rv = opal_call(OPAL_RTC_READ, vtophys(&ymd), vtophys(&hmsm));
279 	while (rv == OPAL_BUSY_EVENT)  {
280 		opal_call(OPAL_POLL_EVENTS, 0);
281 		pause("opalrtc", 1);
282 		rv = opal_call(OPAL_RTC_READ, vtophys(&ymd), vtophys(&hmsm));
283 	}
284 
285 	if (rv != OPAL_SUCCESS)
286 		return (ENXIO);
287 
288 	hmsm = be64toh(hmsm);
289 	ymd = be32toh(ymd);
290 
291 	ct.nsec	= bcd2bin32((hmsm & 0x000000ffffff0000) >> 16) * 1000;
292 	ct.sec	= bcd2bin((hmsm & 0x0000ff0000000000) >> 40);
293 	ct.min	= bcd2bin((hmsm & 0x00ff000000000000) >> 48);
294 	ct.hour	= bcd2bin((hmsm & 0xff00000000000000) >> 56);
295 
296 	ct.day	= bcd2bin((ymd & 0x000000ff) >> 0);
297 	ct.mon	= bcd2bin((ymd & 0x0000ff00) >> 8);
298 	ct.year = bcd2bin32((ymd & 0xffff0000) >> 16);
299 
300 	return (clock_ct_to_ts(&ct, ts));
301 }
302 
303 static int
opal_settime(device_t dev,struct timespec * ts)304 opal_settime(device_t dev, struct timespec *ts)
305 {
306 	int rv;
307 	struct clocktime ct;
308 	uint32_t ymd = 0;
309 	uint64_t hmsm = 0;
310 
311 	clock_ts_to_ct(ts, &ct);
312 
313 	ymd |= (uint32_t)bin2bcd(ct.day);
314 	ymd |= ((uint32_t)bin2bcd(ct.mon) << 8);
315 	ymd |= ((uint32_t)bin2bcd32(ct.year) << 16);
316 
317 	hmsm |= ((uint64_t)bin2bcd32(ct.nsec/1000) << 16);
318 	hmsm |= ((uint64_t)bin2bcd(ct.sec) << 40);
319 	hmsm |= ((uint64_t)bin2bcd(ct.min) << 48);
320 	hmsm |= ((uint64_t)bin2bcd(ct.hour) << 56);
321 
322 	/*
323 	 * We do NOT swap endian here, because the values are being sent
324 	 * via registers instead of indirect via memory.
325 	 */
326 	do {
327 		rv = opal_call(OPAL_RTC_WRITE, ymd, hmsm);
328 		if (rv == OPAL_BUSY_EVENT) {
329 			rv = opal_call(OPAL_POLL_EVENTS, 0);
330 			pause("opalrtc", 1);
331 		}
332 	} while (rv == OPAL_BUSY_EVENT);
333 
334 	if (rv != OPAL_SUCCESS)
335 		return (ENXIO);
336 
337 	return (0);
338 }
339 
340 static const struct ofw_bus_devinfo *
opaldev_get_devinfo(device_t dev,device_t child)341 opaldev_get_devinfo(device_t dev, device_t child)
342 {
343 	return (device_get_ivars(child));
344 }
345 
346 static void
opal_shutdown(void * arg,int howto)347 opal_shutdown(void *arg, int howto)
348 {
349 
350 	if (howto & RB_HALT)
351 		opal_call(OPAL_CEC_POWER_DOWN, 0 /* Normal power off */);
352 	else
353 		opal_call(OPAL_CEC_REBOOT);
354 
355 	opal_call(OPAL_RETURN_CPU);
356 }
357 
358 static void
opal_handle_shutdown_message(void * unused,struct opal_msg * msg)359 opal_handle_shutdown_message(void *unused, struct opal_msg *msg)
360 {
361 	int howto;
362 
363 	switch (be64toh(msg->params[0])) {
364 	case OPAL_SOFT_OFF:
365 		howto = RB_POWEROFF;
366 		break;
367 	case OPAL_SOFT_REBOOT:
368 		howto = RB_REROOT;
369 		break;
370 	}
371 	shutdown_nice(howto);
372 }
373 
374 static void
opal_handle_messages(void)375 opal_handle_messages(void)
376 {
377 	static struct opal_msg msg;
378 	uint64_t rv;
379 	uint32_t type;
380 
381 	rv = opal_call(OPAL_GET_MSG, vtophys(&msg), sizeof(msg));
382 
383 	switch (rv) {
384 	case OPAL_SUCCESS:
385 		break;
386 	case OPAL_RESOURCE:
387 		/* no available messages - return */
388 		return;
389 	case OPAL_PARAMETER:
390 		printf("%s error: invalid buffer. Please file a bug report.\n", __func__);
391 		return;
392 	case OPAL_PARTIAL:
393 		printf("%s error: buffer is too small and messages was discarded. Please file a bug report.\n", __func__);
394 		return;
395 	default:
396 		printf("%s opal_call returned unknown result <%lu>\n", __func__, rv);
397 		return;
398 	}
399 
400 	type = be32toh(msg.msg_type);
401 	switch (type) {
402 	case OPAL_MSG_ASYNC_COMP:
403 		EVENTHANDLER_DIRECT_INVOKE(OPAL_ASYNC_COMP, &msg);
404 		break;
405 	case OPAL_MSG_EPOW:
406 		EVENTHANDLER_DIRECT_INVOKE(OPAL_EPOW, &msg);
407 		break;
408 	case OPAL_MSG_SHUTDOWN:
409 		EVENTHANDLER_DIRECT_INVOKE(OPAL_SHUTDOWN, &msg);
410 		break;
411 	case OPAL_MSG_HMI_EVT:
412 		EVENTHANDLER_DIRECT_INVOKE(OPAL_HMI_EVT, &msg);
413 		break;
414 	case OPAL_MSG_DPO:
415 		EVENTHANDLER_DIRECT_INVOKE(OPAL_DPO, &msg);
416 		break;
417 	case OPAL_MSG_OCC:
418 		EVENTHANDLER_DIRECT_INVOKE(OPAL_OCC, &msg);
419 		break;
420 	default:
421 		printf("%s Unknown OPAL message type %d\n", __func__, type);
422 	}
423 }
424 
425 static void
opal_intr(void * xintr)426 opal_intr(void *xintr)
427 {
428 	uint64_t events = 0;
429 
430 	opal_call(OPAL_HANDLE_INTERRUPT, (uint32_t)(uint64_t)xintr,
431 	    vtophys(&events));
432 	/* Wake up the heartbeat, if it's been setup. */
433 	if (be64toh(events) != 0 && opal_hb_proc != NULL)
434 		wakeup(opal_hb_proc);
435 
436 }
437