1# 2# This file adds to the values in AR91XX_BASE.hints. 3# 4 5# Hard-code the PHY for now, until there's switch phy support. 6# hint.arge.0.phymask=0x000c 7hint.arge.0.phymask=0x0000 8hint.arge.0.media=1000 9hint.arge.0.fduplex=1 10# Where is the MAC address stored in flash for this particular unit. 11hint.arge.0.eeprommac=0x1f01fc00 12 13# This isn't used, but configure it anyway. 14# This should eventually just not be configured, but the if then 15# needs to be properly disabled or spurious interrupts occur. 16hint.arge.1.phymask=0x0 17 18# Where the ART is 19hint.ath.0.eepromaddr=0x1fff1000 20 21# 22# Define a slightly custom flash layout. 23 24# The default flash layout: 25# 26# 128k: uboot 27# 1024k: kernel 28# 4096k: rootfs 29# 2816: unknown 30# 64k: board config? 31# 64k: ART 32# 33# from printenv: 34# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init 35# mtdparts=ar9100-nor0:128k(u-boot),1024k(kernel),4096k(rootfs),64k(art) 36 37# This isn't a lot of space! 38# So: 39# 128k: uboot 40# 2048k: kernel 41# 5888k: rootfs 42# 64k: config 43# 64k: ART 44 45hint.map.0.at="flash/spi0" 46hint.map.0.start=0x00000000 47hint.map.0.end=0x00020000 48hint.map.0.name="uboot" 49hint.map.0.readonly=1 50 51hint.map.1.at="flash/spi0" 52hint.map.1.start=0x00020000 53hint.map.1.end="search:0x00100000:0x10000:.!/bin/sh" 54hint.map.1.name="kernel" 55hint.map.1.readonly=1 56 57hint.map.2.at="flash/spi0" 58hint.map.2.start="search:0x00100000:0x10000:.!/bin/sh" 59hint.map.2.end=0x007e0000 60hint.map.2.name="rootfs" 61hint.map.2.readonly=1 62 63hint.map.3.at="flash/spi0" 64hint.map.3.start=0x007e0000 65hint.map.3.end=0x007f0000 66hint.map.3.name="cfg" 67hint.map.3.readonly=0 68 69# This is radio calibration section. It is (or should be!) unique 70# for each board, to take into account thermal and electrical differences 71# as well as the regulatory compliance data. 72# 73hint.map.4.at="flash/spi0" 74hint.map.4.start=0x007f0000 75hint.map.4.end=0x00800000 76hint.map.4.name="art" 77hint.map.4.readonly=1 78 79# GPIO specific configuration block 80 81# Don't flip on anything that isn't already enabled. 82# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're 83# not used here. 84hint.gpio.0.function_set=0x00002000 85hint.gpio.0.function_clear=0x00000000 86 87# These are the GPIO LEDs and buttons which can be software controlled. 88hint.gpio.0.pinmask=0x001c02ae 89 90# pin 1 - USB (LED) 91# pin 2 - System (LED) 92# Pin 3 - Reset (input) 93# Pin 5 - QSS (LED) 94# Pin 7 - QSS Button (input) 95# Pin 8 - wired into the chip reset line 96# Pin 9 - WLAN 97# Pin 10 - UART TX (not GPIO) 98# Pin 13 - UART RX (not GPIO) 99# Pin 18 - RTL8366RB switch data line 100# Pin 19 - RTL8366RB switch clock line 101# Pin 20 - "GPIO20" 102 103# LEDs are configured separately and driven by the LED device 104#hint.gpioled.0.at="gpiobus0" 105#hint.gpioled.0.name="usb" 106#hint.gpioled.0.pins=0x0002 107 108hint.gpioled.1.at="gpiobus0" 109hint.gpioled.1.name="system" 110hint.gpioled.1.pins=0x0004 111 112hint.gpioled.2.at="gpiobus0" 113hint.gpioled.2.name="qss" 114hint.gpioled.2.pins=0x0020 115 116hint.gpioled.3.at="gpiobus0" 117hint.gpioled.3.name="wlan" 118hint.gpioled.3.pins=0x0200 119 120# GPIO I2C bus 121hint.gpioiic.0.at="gpiobus0" 122hint.gpioiic.0.pins=0xc0000 123hint.gpioiic.0.scl=1 124hint.gpioiic.0.sda=0 125 126# I2C bus 127# Don't be strict about I2C protocol - the relaxed semantics are required 128# by the realtek switch PHY. 129hint.iicbus.0.strict=0 130 131# Bit bang bus - override default delay 132#hint.iicbb.0.udelay=3 133