1# 2# This file adds to the values in AR933X_BASE.hints 3# 4 5# mdiobus on arge1 6hint.argemdio.0.at="nexus0" 7hint.argemdio.0.maddr=0x1a000000 8hint.argemdio.0.msize=0x1000 9hint.argemdio.0.order=0 10 11# Embedded Atheros Switch 12hint.arswitch.0.at="mdio0" 13 14# XXX this should really say it's an AR933x switch, as there 15# are some vlan specific differences here! 16hint.arswitch.0.is_7240=1 17hint.arswitch.0.numphys=4 18hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY 19hint.arswitch.0.is_rgmii=0 20hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII 21 22# arge0 - MII, autoneg, phy(4) 23hint.arge.0.phymask=0x10 # PHY4 24hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus 25hint.arge.0.eeprommac=0x1fff0000 26 27# arge1 - GMII, 1000/full 28hint.arge.1.phymask=0x0 # No directly mapped PHYs 29hint.arge.1.media=1000 30hint.arge.1.fduplex=1 31hint.arge.1.eeprommac=0x1fff0006 32 33# Where the ART is - last 64k in the flash 34# 0x9fff1000 ? 35hint.ath.0.eepromaddr=0x1fff0000 36hint.ath.0.eepromsize=16384 37 38# The TL-WR740N v4 is a default AP121 - it comes with 4MB flash. 39# 40# The boot parameters: 41# bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs init=/sbin/init 42# mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),2752k(rootfs), 43# 896k(uImage),64k(NVRAM),64k(ART) 44# bootcmd=bootm 0x9f020000 45# 46# .. so uboot is 128K, there's no ubootenv, and the runtime image starts 47# at 0x9f020000. 48 49hint.map.0.at="flash/spi0" 50hint.map.0.start=0x00000000 51hint.map.0.end=0x000020000 52hint.map.0.name="uboot" 53hint.map.0.readonly=1 54 55hint.map.1.at="flash/spi0" 56hint.map.1.start=0x00020000 57hint.map.1.end=0x003e0000 58hint.map.1.name="kernel" 59hint.map.1.readonly=0 60 61hint.map.2.at="flash/spi0" 62hint.map.2.start=0x003e0000 63hint.map.2.end=0x003f0000 64hint.map.2.name="cfg" 65hint.map.2.readonly=0 66 67# This is radio calibration section. It is (or should be!) unique 68# for each board, to take into account thermal and electrical differences 69# as well as the regulatory compliance data. 70# 71hint.map.3.at="flash/spi0" 72hint.map.3.start=0x003f0000 73hint.map.3.end=0x0x400000 74hint.map.3.name="art" 75hint.map.3.readonly=1 76 77# GPIO specific configuration block 78 79# Don't flip on anything that isn't already enabled. 80# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're 81# not used here. 82hint.gpio.0.function_set=0x00000000 83hint.gpio.0.function_clear=0x00000000 84 85# These are the GPIO LEDs and buttons which can be software controlled. 86# hint.gpio.0.pinmask=0x00fc1803 87