1# 2# 3hint.apb.0.at="nexus0" 4hint.apb.0.irq=4 5 6# uart0 7hint.uart.0.at="apb0" 8# see atheros/uart_cpu_ar71xx.c why +3 9hint.uart.0.maddr=0x18020003 10hint.uart.0.msize=0x18 11hint.uart.0.irq=3 12 13#ohci 14hint.ohci.0.at="apb0" 15hint.ohci.0.maddr=0x1c000000 16hint.ohci.0.msize=0x01000000 17hint.ohci.0.irq=6 18 19#ehci 20hint.ehci.0.at="nexus0" 21hint.ehci.0.maddr=0x1b000100 22hint.ehci.0.msize=0x01000000 23hint.ehci.0.irq=1 24 25# pci 26hint.pcib.0.at="nexus0" 27hint.pcib.0.irq=0 28 29hint.arge.0.at="nexus0" 30hint.arge.0.maddr=0x19000000 31hint.arge.0.msize=0x1000 32hint.arge.0.irq=2 33 34# phymask, media and fduplex depend upon the specific 35# board. 36# So each board will override the settings as needed. 37 38hint.arge.1.at="nexus0" 39hint.arge.1.maddr=0x1a000000 40hint.arge.1.msize=0x1000 41hint.arge.1.irq=3 42 43# SPI flash 44hint.spi.0.at="nexus0" 45hint.spi.0.maddr=0x1f000000 46hint.spi.0.msize=0x10 47 48hint.mx25l.0.at="spibus0" 49hint.mx25l.0.cs=0 50 51# Watchdog 52hint.ar71xx_wdog.0.at="nexus0" 53 54# GPIO 55hint.gpio.0.at="apb0" 56hint.gpio.0.maddr=0x18040000 57hint.gpio.0.msize=0x1000 58hint.gpio.0.irq=2 59 60# Each board should override the GPIO bus pins with the configuration 61# relevant to it. Thus no pins are defined here. 62 63# hwpmc device 64hint.ar71xx_pmc.0.at="apb0" 65hint.ar71xx_pmc.0.irq=5 66