1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org> All rights reserved.
5 * Copyright (c) 2009 M. Warner Losh <imp@FreeBSD.org>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $Id$
29 */
30 #include "opt_uart.h"
31
32 #include <sys/cdefs.h>
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/bus.h>
36 #include <sys/cons.h>
37
38 #include <machine/bus.h>
39
40 #include <dev/uart/uart.h>
41 #include <dev/uart/uart_cpu.h>
42
43 #include <mips/cavium/octeon_pcmap_regs.h>
44
45 #include <contrib/octeon-sdk/cvmx.h>
46
47 bus_space_tag_t uart_bus_space_io;
48 bus_space_tag_t uart_bus_space_mem;
49
50 /*
51 * Specailized uart bus space. We present a 1 apart byte oriented
52 * bus to the outside world, but internally translate to/from the 8-apart
53 * 64-bit word bus that's on the octeon. We only support simple read/write
54 * in this space. Everything else is undefined.
55 */
56 static uint8_t
ou_bs_r_1(void * t,bus_space_handle_t handle,bus_size_t offset)57 ou_bs_r_1(void *t, bus_space_handle_t handle, bus_size_t offset)
58 {
59
60 return (cvmx_read64_uint64(handle + offset));
61 }
62
63 static uint16_t
ou_bs_r_2(void * t,bus_space_handle_t handle,bus_size_t offset)64 ou_bs_r_2(void *t, bus_space_handle_t handle, bus_size_t offset)
65 {
66
67 return (cvmx_read64_uint64(handle + offset));
68 }
69
70 static uint32_t
ou_bs_r_4(void * t,bus_space_handle_t handle,bus_size_t offset)71 ou_bs_r_4(void *t, bus_space_handle_t handle, bus_size_t offset)
72 {
73
74 return (cvmx_read64_uint64(handle + offset));
75 }
76
77 static uint64_t
ou_bs_r_8(void * t,bus_space_handle_t handle,bus_size_t offset)78 ou_bs_r_8(void *t, bus_space_handle_t handle, bus_size_t offset)
79 {
80
81 return (cvmx_read64_uint64(handle + offset));
82 }
83
84 static void
ou_bs_w_1(void * t,bus_space_handle_t bsh,bus_size_t offset,uint8_t value)85 ou_bs_w_1(void *t, bus_space_handle_t bsh, bus_size_t offset, uint8_t value)
86 {
87
88 cvmx_write64_uint64(bsh + offset, value);
89 }
90
91 static void
ou_bs_w_2(void * t,bus_space_handle_t bsh,bus_size_t offset,uint16_t value)92 ou_bs_w_2(void *t, bus_space_handle_t bsh, bus_size_t offset, uint16_t value)
93 {
94
95 cvmx_write64_uint64(bsh + offset, value);
96 }
97
98 static void
ou_bs_w_4(void * t,bus_space_handle_t bsh,bus_size_t offset,uint32_t value)99 ou_bs_w_4(void *t, bus_space_handle_t bsh, bus_size_t offset, uint32_t value)
100 {
101
102 cvmx_write64_uint64(bsh + offset, value);
103 }
104
105 static void
ou_bs_w_8(void * t,bus_space_handle_t bsh,bus_size_t offset,uint64_t value)106 ou_bs_w_8(void *t, bus_space_handle_t bsh, bus_size_t offset, uint64_t value)
107 {
108
109 cvmx_write64_uint64(bsh + offset, value);
110 }
111
112 struct bus_space octeon_uart_tag = {
113 .bs_map = generic_bs_map,
114 .bs_unmap = generic_bs_unmap,
115 .bs_subregion = generic_bs_subregion,
116 .bs_barrier = generic_bs_barrier,
117 .bs_r_1 = ou_bs_r_1,
118 .bs_r_2 = ou_bs_r_2,
119 .bs_r_4 = ou_bs_r_4,
120 .bs_r_8 = ou_bs_r_8,
121 .bs_w_1 = ou_bs_w_1,
122 .bs_w_2 = ou_bs_w_2,
123 .bs_w_4 = ou_bs_w_4,
124 .bs_w_8 = ou_bs_w_8,
125 };
126
127 extern struct uart_class uart_oct16550_class;
128
129 int
uart_cpu_eqres(struct uart_bas * b1,struct uart_bas * b2)130 uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
131 {
132
133 return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
134 }
135
136 int
uart_cpu_getdev(int devtype,struct uart_devinfo * di)137 uart_cpu_getdev(int devtype, struct uart_devinfo *di)
138 {
139 struct uart_class *class = &uart_oct16550_class;
140
141 /*
142 * These fields need to be setup corretly for uart_getenv to
143 * work in all cases.
144 */
145 uart_bus_space_io = NULL; /* No io map for this device */
146 uart_bus_space_mem = &octeon_uart_tag;
147 di->bas.bst = uart_bus_space_mem;
148
149 /*
150 * If env specification for UART exists it takes precedence:
151 * hw.uart.console="mm:0xf1012000" or similar
152 */
153 if (uart_getenv(devtype, di, class) == 0)
154 return (0);
155
156 /*
157 * Fallback to UART0 for console.
158 */
159 di->ops = uart_getops(class);
160 di->bas.chan = 0;
161 /* XXX */
162 if (bus_space_map(di->bas.bst, CVMX_MIO_UARTX_RBR(0),
163 uart_getrange(class), 0, &di->bas.bsh) != 0)
164 return (ENXIO);
165 di->bas.regshft = 3;
166 di->bas.rclk = 0;
167 di->baudrate = 115200;
168 di->databits = 8;
169 di->stopbits = 1;
170 di->parity = UART_PARITY_NONE;
171
172 return (0);
173 }
174