1/* 2 * Copyright (c) 2011 Jakub Klama <jceel@FreeBSD.org> 3 * Copyright (c) 2015 Hiroki Mori 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * Ralink RT1310A Device Tree Source. 27 */ 28 29/ { 30 compatible = "ralink,rt1310a-soc"; 31 #address-cells = <1>; 32 #size-cells = <1>; 33 34 aliases { 35 serial0 = &serial0; 36 }; 37 38 cpus { 39 #address-cells = <1>; 40 #size-cells = <0>; 41 42 cpu@0 { 43 device_type = "cpu"; 44 compatible = "ARM,926EJ-S"; 45 reg = <0x0>; 46 d-cache-line-size = <32>; // 32 bytes 47 i-cache-line-size = <32>; // 32 bytes 48 d-cache-size = <0x4000>; // L1, 16K 49 i-cache-size = <0x4000>; // L1, 16K 50 timebase-frequency = <0>; 51 bus-frequency = <0>; 52 clock-frequency = <0>; 53 }; 54 }; 55 56 memory { 57 device_type = "memory"; 58 reg = <0x40000000 0x1000000>; // 16M at 0x40000000 59 }; 60 61 localbus@1f000000 { 62 #address-cells = <1>; 63 #size-cells = <1>; 64 compatible = "simple-bus"; 65 ranges = <0x0 0x1f000000 0x400000>; 66 }; 67 68 ahb@19C00000 { 69 #address-cells = <1>; 70 #size-cells = <1>; 71 compatible = "simple-bus"; 72 ranges = <0x0 0x19C00000 0xE0000>; 73 bus-frequency = <13000000>; 74 75 PIC: pic@40000 { 76 interrupt-controller; 77 #address-cells = <0>; 78 #interrupt-cells = <1>; 79 reg = <0x40000 0x20000>; 80 compatible = "rt,pic"; 81 }; 82 83 fvmdio@0 { 84 #address-cells = <1>; 85 #size-cells = <0>; 86 compatible = "fv,mdio"; 87 reg = <0x80000 0x20000>; 88 }; 89 90 enet0:fv_mac0@80000 { 91 compatible = "fv,ethernet"; 92 reg = <0x80000 0x20000>; 93 interrupts = <7>; 94 interrupt-parent = <&PIC>; 95 96 }; 97 98 enet1:fv_mac1@A0000 { 99 compatible = "fv,ethernet"; 100 reg = <0xA0000 0x20000>; 101 interrupts = <8>; 102 interrupt-parent = <&PIC>; 103 }; 104 105 }; 106 107 apb@1E800000 { 108 #address-cells = <1>; 109 #size-cells = <1>; 110 compatible = "simple-bus"; 111 ranges = <0x0 0x1E800000 0x800000>; 112 bus-frequency = <75000000>; 113 114 timer@000000 { 115 compatible = "rt,timer"; 116 reg = <0x0 0x10 117 0x10 0x10 118 0x20 0x10 119 0x30 0x10>; 120 interrupts = <3 4 5>; 121 interrupt-parent = <&PIC>; 122 }; 123 124 rtc@20000 { 125 compatible = "rt,rtc"; 126 interrupts = <6>; 127 reg = <0x20000 0x20000>; 128 }; 129 130 serial0: serial@40000 { 131 compatible = "ns16550"; 132 reg = <0x40000 0x20000>; 133 interrupts = <1>; 134 reg-shift = <2>; 135 clock-frequency = <6758400>; 136 current-speed = <38400>; 137 interrupt-parent = <&PIC>; 138 }; 139 140 gpio0: gpio@A0000 { 141 compatible = "ralink,rt1310-gpio"; 142 gpio-controller; 143 #gpio-cells = <2>; 144 interrupts = <8>; 145 reg = <0xA0000 0x20000>; 146 }; 147 }; 148 149 150/* 151 chosen { 152 stdin = "serial0"; 153 stdout = "serial0"; 154 }; 155*/ 156}; 157 158