1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (C) 2012 Ben Gray <bgray@freebsd.org>.
5 * Copyright (C) 2018 The FreeBSD Foundation.
6 *
7 * This software was developed by Arshan Khanifar <arshankhanifar@gmail.com>
8 * under sponsorship from the FreeBSD Foundation.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 /*
34 * USB-To-Ethernet adapter driver for Microchip's LAN78XX and related families.
35 *
36 * USB 3.1 to 10/100/1000 Mbps Ethernet
37 * LAN7800 http://www.microchip.com/wwwproducts/en/LAN7800
38 *
39 * USB 2.0 to 10/100/1000 Mbps Ethernet
40 * LAN7850 http://www.microchip.com/wwwproducts/en/LAN7850
41 *
42 * USB 2 to 10/100/1000 Mbps Ethernet with built-in USB hub
43 * LAN7515 (no datasheet available, but probes and functions as LAN7800)
44 *
45 * This driver is based on the if_smsc driver, with lan78xx-specific
46 * functionality modelled on Microchip's Linux lan78xx driver.
47 *
48 * UNIMPLEMENTED FEATURES
49 * ------------------
50 * A number of features supported by the lan78xx are not yet implemented in
51 * this driver:
52 *
53 * - TX checksum offloading: Nothing has been implemented yet.
54 * - Direct address translation filtering: Implemented but untested.
55 * - VLAN tag removal.
56 * - Support for USB interrupt endpoints.
57 * - Latency Tolerance Messaging (LTM) support.
58 * - TCP LSO support.
59 *
60 */
61
62 #include <sys/param.h>
63 #include <sys/bus.h>
64 #include <sys/callout.h>
65 #include <sys/condvar.h>
66 #include <sys/kernel.h>
67 #include <sys/lock.h>
68 #include <sys/malloc.h>
69 #include <sys/module.h>
70 #include <sys/mutex.h>
71 #include <sys/priv.h>
72 #include <sys/queue.h>
73 #include <sys/random.h>
74 #include <sys/socket.h>
75 #include <sys/stddef.h>
76 #include <sys/stdint.h>
77 #include <sys/sx.h>
78 #include <sys/sysctl.h>
79 #include <sys/systm.h>
80 #include <sys/unistd.h>
81
82 #include <net/if.h>
83 #include <net/if_var.h>
84 #include <net/if_media.h>
85
86 #include <dev/mii/mii.h>
87 #include <dev/mii/miivar.h>
88
89 #include <netinet/in.h>
90 #include <netinet/ip.h>
91
92 #include "opt_platform.h"
93
94 #ifdef FDT
95 #include <dev/fdt/fdt_common.h>
96 #include <dev/ofw/ofw_bus.h>
97 #include <dev/ofw/ofw_bus_subr.h>
98 #include <dev/usb/usb_fdt_support.h>
99 #endif
100
101 #include <dev/usb/usb.h>
102 #include <dev/usb/usbdi.h>
103 #include <dev/usb/usbdi_util.h>
104 #include "usbdevs.h"
105
106 #define USB_DEBUG_VAR lan78xx_debug
107 #include <dev/usb/usb_debug.h>
108 #include <dev/usb/usb_process.h>
109
110 #include <dev/usb/net/usb_ethernet.h>
111
112 #include <dev/usb/net/if_mugereg.h>
113
114 #include "miibus_if.h"
115
116 #ifdef USB_DEBUG
117 static int muge_debug = 0;
118
119 SYSCTL_NODE(_hw_usb, OID_AUTO, muge, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
120 "Microchip LAN78xx USB-GigE");
121 SYSCTL_INT(_hw_usb_muge, OID_AUTO, debug, CTLFLAG_RWTUN, &muge_debug, 0,
122 "Debug level");
123 #endif
124
125 #define MUGE_DEFAULT_TX_CSUM_ENABLE (false)
126 #define MUGE_DEFAULT_TSO_ENABLE (false)
127
128 /* Supported Vendor and Product IDs. */
129 static const struct usb_device_id lan78xx_devs[] = {
130 #define MUGE_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) }
131 MUGE_DEV(LAN7800_ETH, 0),
132 MUGE_DEV(LAN7801_ETH, 0),
133 MUGE_DEV(LAN7850_ETH, 0),
134 #undef MUGE_DEV
135 };
136
137 #ifdef USB_DEBUG
138 #define muge_dbg_printf(sc, fmt, args...) \
139 do { \
140 if (muge_debug > 0) \
141 device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \
142 } while(0)
143 #else
144 #define muge_dbg_printf(sc, fmt, args...) do { } while (0)
145 #endif
146
147 #define muge_warn_printf(sc, fmt, args...) \
148 device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args)
149
150 #define muge_err_printf(sc, fmt, args...) \
151 device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args)
152
153 #define ETHER_IS_VALID(addr) \
154 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
155
156 /* USB endpoints. */
157
158 enum {
159 MUGE_BULK_DT_RD,
160 MUGE_BULK_DT_WR,
161 #if 0 /* Ignore interrupt endpoints for now as we poll on MII status. */
162 MUGE_INTR_DT_WR,
163 MUGE_INTR_DT_RD,
164 #endif
165 MUGE_N_TRANSFER,
166 };
167
168 struct muge_softc {
169 struct usb_ether sc_ue;
170 struct mtx sc_mtx;
171 struct usb_xfer *sc_xfer[MUGE_N_TRANSFER];
172 int sc_phyno;
173 uint32_t sc_leds;
174 uint16_t sc_led_modes;
175 uint16_t sc_led_modes_mask;
176
177 /* Settings for the mac control (MAC_CSR) register. */
178 uint32_t sc_rfe_ctl;
179 uint32_t sc_mdix_ctl;
180 uint16_t chipid;
181 uint16_t chiprev;
182 uint32_t sc_mchash_table[ETH_DP_SEL_VHF_HASH_LEN];
183 uint32_t sc_pfilter_table[MUGE_NUM_PFILTER_ADDRS_][2];
184
185 uint32_t sc_flags;
186 #define MUGE_FLAG_LINK 0x0001
187 #define MUGE_FLAG_INIT_DONE 0x0002
188 };
189
190 #define MUGE_IFACE_IDX 0
191
192 #define MUGE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
193 #define MUGE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
194 #define MUGE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t)
195
196 static device_probe_t muge_probe;
197 static device_attach_t muge_attach;
198 static device_detach_t muge_detach;
199
200 static usb_callback_t muge_bulk_read_callback;
201 static usb_callback_t muge_bulk_write_callback;
202
203 static miibus_readreg_t lan78xx_miibus_readreg;
204 static miibus_writereg_t lan78xx_miibus_writereg;
205 static miibus_statchg_t lan78xx_miibus_statchg;
206
207 static int muge_attach_post_sub(struct usb_ether *ue);
208 static uether_fn_t muge_attach_post;
209 static uether_fn_t muge_init;
210 static uether_fn_t muge_stop;
211 static uether_fn_t muge_start;
212 static uether_fn_t muge_tick;
213 static uether_fn_t muge_setmulti;
214 static uether_fn_t muge_setpromisc;
215
216 static int muge_ifmedia_upd(struct ifnet *);
217 static void muge_ifmedia_sts(struct ifnet *, struct ifmediareq *);
218
219 static int lan78xx_chip_init(struct muge_softc *sc);
220 static int muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
221
222 static const struct usb_config muge_config[MUGE_N_TRANSFER] = {
223 [MUGE_BULK_DT_WR] = {
224 .type = UE_BULK,
225 .endpoint = UE_ADDR_ANY,
226 .direction = UE_DIR_OUT,
227 .frames = 16,
228 .bufsize = 16 * (MCLBYTES + 16),
229 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
230 .callback = muge_bulk_write_callback,
231 .timeout = 10000, /* 10 seconds */
232 },
233
234 [MUGE_BULK_DT_RD] = {
235 .type = UE_BULK,
236 .endpoint = UE_ADDR_ANY,
237 .direction = UE_DIR_IN,
238 .bufsize = 20480, /* bytes */
239 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
240 .callback = muge_bulk_read_callback,
241 .timeout = 0, /* no timeout */
242 },
243 /*
244 * The chip supports interrupt endpoints, however they aren't
245 * needed as we poll on the MII status.
246 */
247 };
248
249 static const struct usb_ether_methods muge_ue_methods = {
250 .ue_attach_post = muge_attach_post,
251 .ue_attach_post_sub = muge_attach_post_sub,
252 .ue_start = muge_start,
253 .ue_ioctl = muge_ioctl,
254 .ue_init = muge_init,
255 .ue_stop = muge_stop,
256 .ue_tick = muge_tick,
257 .ue_setmulti = muge_setmulti,
258 .ue_setpromisc = muge_setpromisc,
259 .ue_mii_upd = muge_ifmedia_upd,
260 .ue_mii_sts = muge_ifmedia_sts,
261 };
262
263 /**
264 * lan78xx_read_reg - Read a 32-bit register on the device
265 * @sc: driver soft context
266 * @off: offset of the register
267 * @data: pointer a value that will be populated with the register value
268 *
269 * LOCKING:
270 * The device lock must be held before calling this function.
271 *
272 * RETURNS:
273 * 0 on success, a USB_ERR_?? error code on failure.
274 */
275 static int
lan78xx_read_reg(struct muge_softc * sc,uint32_t off,uint32_t * data)276 lan78xx_read_reg(struct muge_softc *sc, uint32_t off, uint32_t *data)
277 {
278 struct usb_device_request req;
279 uint32_t buf;
280 usb_error_t err;
281
282 MUGE_LOCK_ASSERT(sc, MA_OWNED);
283
284 req.bmRequestType = UT_READ_VENDOR_DEVICE;
285 req.bRequest = UVR_READ_REG;
286 USETW(req.wValue, 0);
287 USETW(req.wIndex, off);
288 USETW(req.wLength, 4);
289
290 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
291 if (err != 0)
292 muge_warn_printf(sc, "Failed to read register 0x%0x\n", off);
293 *data = le32toh(buf);
294 return (err);
295 }
296
297 /**
298 * lan78xx_write_reg - Write a 32-bit register on the device
299 * @sc: driver soft context
300 * @off: offset of the register
301 * @data: the 32-bit value to write into the register
302 *
303 * LOCKING:
304 * The device lock must be held before calling this function.
305 *
306 * RETURNS:
307 * 0 on success, a USB_ERR_?? error code on failure.
308 */
309 static int
lan78xx_write_reg(struct muge_softc * sc,uint32_t off,uint32_t data)310 lan78xx_write_reg(struct muge_softc *sc, uint32_t off, uint32_t data)
311 {
312 struct usb_device_request req;
313 uint32_t buf;
314 usb_error_t err;
315
316 MUGE_LOCK_ASSERT(sc, MA_OWNED);
317
318 buf = htole32(data);
319
320 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
321 req.bRequest = UVR_WRITE_REG;
322 USETW(req.wValue, 0);
323 USETW(req.wIndex, off);
324 USETW(req.wLength, 4);
325
326 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
327 if (err != 0)
328 muge_warn_printf(sc, "Failed to write register 0x%0x\n", off);
329 return (err);
330 }
331
332 /**
333 * lan78xx_wait_for_bits - Poll on a register value until bits are cleared
334 * @sc: soft context
335 * @reg: offset of the register
336 * @bits: if the bits are clear the function returns
337 *
338 * LOCKING:
339 * The device lock must be held before calling this function.
340 *
341 * RETURNS:
342 * 0 on success, or a USB_ERR_?? error code on failure.
343 */
344 static int
lan78xx_wait_for_bits(struct muge_softc * sc,uint32_t reg,uint32_t bits)345 lan78xx_wait_for_bits(struct muge_softc *sc, uint32_t reg, uint32_t bits)
346 {
347 usb_ticks_t start_ticks;
348 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
349 uint32_t val;
350 int err;
351
352 MUGE_LOCK_ASSERT(sc, MA_OWNED);
353
354 start_ticks = (usb_ticks_t)ticks;
355 do {
356 if ((err = lan78xx_read_reg(sc, reg, &val)) != 0)
357 return (err);
358 if (!(val & bits))
359 return (0);
360 uether_pause(&sc->sc_ue, hz / 100);
361 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
362
363 return (USB_ERR_TIMEOUT);
364 }
365
366 /**
367 * lan78xx_eeprom_read_raw - Read the attached EEPROM
368 * @sc: soft context
369 * @off: the eeprom address offset
370 * @buf: stores the bytes
371 * @buflen: the number of bytes to read
372 *
373 * Simply reads bytes from an attached eeprom.
374 *
375 * LOCKING:
376 * The function takes and releases the device lock if not already held.
377 *
378 * RETURNS:
379 * 0 on success, or a USB_ERR_?? error code on failure.
380 */
381 static int
lan78xx_eeprom_read_raw(struct muge_softc * sc,uint16_t off,uint8_t * buf,uint16_t buflen)382 lan78xx_eeprom_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf,
383 uint16_t buflen)
384 {
385 usb_ticks_t start_ticks;
386 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
387 int err;
388 uint32_t val, saved;
389 uint16_t i;
390 bool locked;
391
392 locked = mtx_owned(&sc->sc_mtx); /* XXX */
393 if (!locked)
394 MUGE_LOCK(sc);
395
396 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) {
397 /* EEDO/EECLK muxed with LED0/LED1 on LAN7800. */
398 err = lan78xx_read_reg(sc, ETH_HW_CFG, &val);
399 saved = val;
400
401 val &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_);
402 err = lan78xx_write_reg(sc, ETH_HW_CFG, val);
403 }
404
405 err = lan78xx_wait_for_bits(sc, ETH_E2P_CMD, ETH_E2P_CMD_BUSY_);
406 if (err != 0) {
407 muge_warn_printf(sc, "eeprom busy, failed to read data\n");
408 goto done;
409 }
410
411 /* Start reading the bytes, one at a time. */
412 for (i = 0; i < buflen; i++) {
413 val = ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_READ_;
414 val |= (ETH_E2P_CMD_ADDR_MASK_ & (off + i));
415 if ((err = lan78xx_write_reg(sc, ETH_E2P_CMD, val)) != 0)
416 goto done;
417
418 start_ticks = (usb_ticks_t)ticks;
419 do {
420 if ((err = lan78xx_read_reg(sc, ETH_E2P_CMD, &val)) !=
421 0)
422 goto done;
423 if (!(val & ETH_E2P_CMD_BUSY_) ||
424 (val & ETH_E2P_CMD_TIMEOUT_))
425 break;
426
427 uether_pause(&sc->sc_ue, hz / 100);
428 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
429
430 if (val & (ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_TIMEOUT_)) {
431 muge_warn_printf(sc, "eeprom command failed\n");
432 err = USB_ERR_IOERROR;
433 break;
434 }
435
436 if ((err = lan78xx_read_reg(sc, ETH_E2P_DATA, &val)) != 0)
437 goto done;
438
439 buf[i] = (val & 0xff);
440 }
441
442 done:
443 if (!locked)
444 MUGE_UNLOCK(sc);
445 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) {
446 /* Restore saved LED configuration. */
447 lan78xx_write_reg(sc, ETH_HW_CFG, saved);
448 }
449 return (err);
450 }
451
452 static bool
lan78xx_eeprom_present(struct muge_softc * sc)453 lan78xx_eeprom_present(struct muge_softc *sc)
454 {
455 int ret;
456 uint8_t sig;
457
458 ret = lan78xx_eeprom_read_raw(sc, ETH_E2P_INDICATOR_OFFSET, &sig, 1);
459 return (ret == 0 && sig == ETH_E2P_INDICATOR);
460 }
461
462 /**
463 * lan78xx_otp_read_raw
464 * @sc: soft context
465 * @off: the otp address offset
466 * @buf: stores the bytes
467 * @buflen: the number of bytes to read
468 *
469 * Simply reads bytes from the OTP.
470 *
471 * LOCKING:
472 * The function takes and releases the device lock if not already held.
473 *
474 * RETURNS:
475 * 0 on success, or a USB_ERR_?? error code on failure.
476 *
477 */
478 static int
lan78xx_otp_read_raw(struct muge_softc * sc,uint16_t off,uint8_t * buf,uint16_t buflen)479 lan78xx_otp_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf,
480 uint16_t buflen)
481 {
482 int err;
483 uint32_t val;
484 uint16_t i;
485 bool locked;
486 locked = mtx_owned(&sc->sc_mtx);
487 if (!locked)
488 MUGE_LOCK(sc);
489
490 err = lan78xx_read_reg(sc, OTP_PWR_DN, &val);
491
492 /* Checking if bit is set. */
493 if (val & OTP_PWR_DN_PWRDN_N) {
494 /* Clear it, then wait for it to be cleared. */
495 lan78xx_write_reg(sc, OTP_PWR_DN, 0);
496 err = lan78xx_wait_for_bits(sc, OTP_PWR_DN, OTP_PWR_DN_PWRDN_N);
497 if (err != 0) {
498 muge_warn_printf(sc, "OTP off? failed to read data\n");
499 goto done;
500 }
501 }
502 /* Start reading the bytes, one at a time. */
503 for (i = 0; i < buflen; i++) {
504 err = lan78xx_write_reg(sc, OTP_ADDR1,
505 ((off + i) >> 8) & OTP_ADDR1_15_11);
506 err = lan78xx_write_reg(sc, OTP_ADDR2,
507 ((off + i) & OTP_ADDR2_10_3));
508 err = lan78xx_write_reg(sc, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
509 err = lan78xx_write_reg(sc, OTP_CMD_GO, OTP_CMD_GO_GO_);
510
511 err = lan78xx_wait_for_bits(sc, OTP_STATUS, OTP_STATUS_BUSY_);
512 if (err != 0) {
513 muge_warn_printf(sc, "OTP busy failed to read data\n");
514 goto done;
515 }
516
517 if ((err = lan78xx_read_reg(sc, OTP_RD_DATA, &val)) != 0)
518 goto done;
519
520 buf[i] = (uint8_t)(val & 0xff);
521 }
522
523 done:
524 if (!locked)
525 MUGE_UNLOCK(sc);
526 return (err);
527 }
528
529 /**
530 * lan78xx_otp_read
531 * @sc: soft context
532 * @off: the otp address offset
533 * @buf: stores the bytes
534 * @buflen: the number of bytes to read
535 *
536 * Simply reads bytes from the otp.
537 *
538 * LOCKING:
539 * The function takes and releases device lock if it is not already held.
540 *
541 * RETURNS:
542 * 0 on success, or a USB_ERR_?? error code on failure.
543 */
544 static int
lan78xx_otp_read(struct muge_softc * sc,uint16_t off,uint8_t * buf,uint16_t buflen)545 lan78xx_otp_read(struct muge_softc *sc, uint16_t off, uint8_t *buf,
546 uint16_t buflen)
547 {
548 uint8_t sig;
549 int err;
550
551 err = lan78xx_otp_read_raw(sc, OTP_INDICATOR_OFFSET, &sig, 1);
552 if (err == 0) {
553 if (sig == OTP_INDICATOR_1) {
554 } else if (sig == OTP_INDICATOR_2) {
555 off += 0x100; /* XXX */
556 } else {
557 err = -EINVAL;
558 }
559 if (!err)
560 err = lan78xx_otp_read_raw(sc, off, buf, buflen);
561 }
562 return (err);
563 }
564
565 /**
566 * lan78xx_setmacaddress - Set the mac address in the device
567 * @sc: driver soft context
568 * @addr: pointer to array contain at least 6 bytes of the mac
569 *
570 * LOCKING:
571 * Should be called with the MUGE lock held.
572 *
573 * RETURNS:
574 * Returns 0 on success or a negative error code.
575 */
576 static int
lan78xx_setmacaddress(struct muge_softc * sc,const uint8_t * addr)577 lan78xx_setmacaddress(struct muge_softc *sc, const uint8_t *addr)
578 {
579 int err;
580 uint32_t val;
581
582 muge_dbg_printf(sc,
583 "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n",
584 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
585
586 MUGE_LOCK_ASSERT(sc, MA_OWNED);
587
588 val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
589 if ((err = lan78xx_write_reg(sc, ETH_RX_ADDRL, val)) != 0)
590 goto done;
591
592 val = (addr[5] << 8) | addr[4];
593 err = lan78xx_write_reg(sc, ETH_RX_ADDRH, val);
594
595 done:
596 return (err);
597 }
598
599 /**
600 * lan78xx_set_rx_max_frame_length
601 * @sc: driver soft context
602 * @size: pointer to array contain at least 6 bytes of the mac
603 *
604 * Sets the maximum frame length to be received. Frames bigger than
605 * this size are aborted.
606 *
607 * RETURNS:
608 * Returns 0 on success or a negative error code.
609 */
610 static int
lan78xx_set_rx_max_frame_length(struct muge_softc * sc,int size)611 lan78xx_set_rx_max_frame_length(struct muge_softc *sc, int size)
612 {
613 int err = 0;
614 uint32_t buf;
615 bool rxenabled;
616
617 /* First we have to disable rx before changing the length. */
618 err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf);
619 rxenabled = ((buf & ETH_MAC_RX_EN_) != 0);
620
621 if (rxenabled) {
622 buf &= ~ETH_MAC_RX_EN_;
623 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
624 }
625
626 /* Setting max frame length. */
627 buf &= ~ETH_MAC_RX_MAX_FR_SIZE_MASK_;
628 buf |= (((size + 4) << ETH_MAC_RX_MAX_FR_SIZE_SHIFT_) &
629 ETH_MAC_RX_MAX_FR_SIZE_MASK_);
630 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
631
632 /* If it were enabled before, we enable it back. */
633
634 if (rxenabled) {
635 buf |= ETH_MAC_RX_EN_;
636 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
637 }
638
639 return (0);
640 }
641
642 /**
643 * lan78xx_miibus_readreg - Read a MII/MDIO register
644 * @dev: usb ether device
645 * @phy: the number of phy reading from
646 * @reg: the register address
647 *
648 * LOCKING:
649 * Takes and releases the device mutex lock if not already held.
650 *
651 * RETURNS:
652 * Returns the 16-bits read from the MII register, if this function fails
653 * 0 is returned.
654 */
655 static int
lan78xx_miibus_readreg(device_t dev,int phy,int reg)656 lan78xx_miibus_readreg(device_t dev, int phy, int reg)
657 {
658 struct muge_softc *sc = device_get_softc(dev);
659 uint32_t addr, val;
660 bool locked;
661
662 val = 0;
663 locked = mtx_owned(&sc->sc_mtx);
664 if (!locked)
665 MUGE_LOCK(sc);
666
667 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
668 0) {
669 muge_warn_printf(sc, "MII is busy\n");
670 goto done;
671 }
672
673 addr = (phy << 11) | (reg << 6) |
674 ETH_MII_ACC_MII_READ_ | ETH_MII_ACC_MII_BUSY_;
675 lan78xx_write_reg(sc, ETH_MII_ACC, addr);
676
677 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
678 0) {
679 muge_warn_printf(sc, "MII read timeout\n");
680 goto done;
681 }
682
683 lan78xx_read_reg(sc, ETH_MII_DATA, &val);
684 val = le32toh(val);
685
686 done:
687 if (!locked)
688 MUGE_UNLOCK(sc);
689
690 return (val & 0xFFFF);
691 }
692
693 /**
694 * lan78xx_miibus_writereg - Writes a MII/MDIO register
695 * @dev: usb ether device
696 * @phy: the number of phy writing to
697 * @reg: the register address
698 * @val: the value to write
699 *
700 * Attempts to write a PHY register through the usb controller registers.
701 *
702 * LOCKING:
703 * Takes and releases the device mutex lock if not already held.
704 *
705 * RETURNS:
706 * Always returns 0 regardless of success or failure.
707 */
708 static int
lan78xx_miibus_writereg(device_t dev,int phy,int reg,int val)709 lan78xx_miibus_writereg(device_t dev, int phy, int reg, int val)
710 {
711 struct muge_softc *sc = device_get_softc(dev);
712 uint32_t addr;
713 bool locked;
714
715 if (sc->sc_phyno != phy)
716 return (0);
717
718 locked = mtx_owned(&sc->sc_mtx);
719 if (!locked)
720 MUGE_LOCK(sc);
721
722 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
723 0) {
724 muge_warn_printf(sc, "MII is busy\n");
725 goto done;
726 }
727
728 val = htole32(val);
729 lan78xx_write_reg(sc, ETH_MII_DATA, val);
730
731 addr = (phy << 11) | (reg << 6) |
732 ETH_MII_ACC_MII_WRITE_ | ETH_MII_ACC_MII_BUSY_;
733 lan78xx_write_reg(sc, ETH_MII_ACC, addr);
734
735 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 0)
736 muge_warn_printf(sc, "MII write timeout\n");
737
738 done:
739 if (!locked)
740 MUGE_UNLOCK(sc);
741 return (0);
742 }
743
744 /*
745 * lan78xx_miibus_statchg - Called to detect phy status change
746 * @dev: usb ether device
747 *
748 * This function is called periodically by the system to poll for status
749 * changes of the link.
750 *
751 * LOCKING:
752 * Takes and releases the device mutex lock if not already held.
753 */
754 static void
lan78xx_miibus_statchg(device_t dev)755 lan78xx_miibus_statchg(device_t dev)
756 {
757 struct muge_softc *sc = device_get_softc(dev);
758 struct mii_data *mii = uether_getmii(&sc->sc_ue);
759 struct ifnet *ifp;
760 int err;
761 uint32_t flow = 0;
762 uint32_t fct_flow = 0;
763 bool locked;
764
765 locked = mtx_owned(&sc->sc_mtx);
766 if (!locked)
767 MUGE_LOCK(sc);
768
769 ifp = uether_getifp(&sc->sc_ue);
770 if (mii == NULL || ifp == NULL ||
771 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
772 goto done;
773
774 /* Use the MII status to determine link status */
775 sc->sc_flags &= ~MUGE_FLAG_LINK;
776 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
777 (IFM_ACTIVE | IFM_AVALID)) {
778 muge_dbg_printf(sc, "media is active\n");
779 switch (IFM_SUBTYPE(mii->mii_media_active)) {
780 case IFM_10_T:
781 case IFM_100_TX:
782 sc->sc_flags |= MUGE_FLAG_LINK;
783 muge_dbg_printf(sc, "10/100 ethernet\n");
784 break;
785 case IFM_1000_T:
786 sc->sc_flags |= MUGE_FLAG_LINK;
787 muge_dbg_printf(sc, "Gigabit ethernet\n");
788 break;
789 default:
790 break;
791 }
792 }
793 /* Lost link, do nothing. */
794 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) {
795 muge_dbg_printf(sc, "link flag not set\n");
796 goto done;
797 }
798
799 err = lan78xx_read_reg(sc, ETH_FCT_FLOW, &fct_flow);
800 if (err) {
801 muge_warn_printf(sc,
802 "failed to read initial flow control thresholds, error %d\n",
803 err);
804 goto done;
805 }
806
807 /* Enable/disable full duplex operation and TX/RX pause. */
808 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
809 muge_dbg_printf(sc, "full duplex operation\n");
810
811 /* Enable transmit MAC flow control function. */
812 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
813 flow |= ETH_FLOW_CR_TX_FCEN_ | 0xFFFF;
814
815 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
816 flow |= ETH_FLOW_CR_RX_FCEN_;
817 }
818
819 /* XXX Flow control settings obtained from Microchip's driver. */
820 switch(usbd_get_speed(sc->sc_ue.ue_udev)) {
821 case USB_SPEED_SUPER:
822 fct_flow = 0x817;
823 break;
824 case USB_SPEED_HIGH:
825 fct_flow = 0x211;
826 break;
827 default:
828 break;
829 }
830
831 err += lan78xx_write_reg(sc, ETH_FLOW, flow);
832 err += lan78xx_write_reg(sc, ETH_FCT_FLOW, fct_flow);
833 if (err)
834 muge_warn_printf(sc, "media change failed, error %d\n", err);
835
836 done:
837 if (!locked)
838 MUGE_UNLOCK(sc);
839 }
840
841 /*
842 * lan78xx_set_mdix_auto - Configure the device to enable automatic
843 * crossover and polarity detection. LAN7800 provides HP Auto-MDIX
844 * functionality for seamless crossover and polarity detection.
845 *
846 * @sc: driver soft context
847 *
848 * LOCKING:
849 * Takes and releases the device mutex lock if not already held.
850 */
851 static void
lan78xx_set_mdix_auto(struct muge_softc * sc)852 lan78xx_set_mdix_auto(struct muge_softc *sc)
853 {
854 uint32_t buf, err;
855
856 err = lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
857 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_1);
858
859 buf = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
860 MUGE_EXT_MODE_CTRL);
861 buf &= ~MUGE_EXT_MODE_CTRL_MDIX_MASK_;
862 buf |= MUGE_EXT_MODE_CTRL_AUTO_MDIX_;
863
864 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
865 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
866 MUGE_EXT_MODE_CTRL, buf);
867
868 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
869 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_0);
870
871 if (err != 0)
872 muge_warn_printf(sc, "error setting PHY's MDIX status\n");
873
874 sc->sc_mdix_ctl = buf;
875 }
876
877 /**
878 * lan78xx_phy_init - Initialises the in-built MUGE phy
879 * @sc: driver soft context
880 *
881 * Resets the PHY part of the chip and then initialises it to default
882 * values. The 'link down' and 'auto-negotiation complete' interrupts
883 * from the PHY are also enabled, however we don't monitor the interrupt
884 * endpoints for the moment.
885 *
886 * RETURNS:
887 * Returns 0 on success or EIO if failed to reset the PHY.
888 */
889 static int
lan78xx_phy_init(struct muge_softc * sc)890 lan78xx_phy_init(struct muge_softc *sc)
891 {
892 muge_dbg_printf(sc, "Initializing PHY.\n");
893 uint16_t bmcr, lmsr;
894 usb_ticks_t start_ticks;
895 uint32_t hw_reg;
896 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
897
898 MUGE_LOCK_ASSERT(sc, MA_OWNED);
899
900 /* Reset phy and wait for reset to complete. */
901 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR,
902 BMCR_RESET);
903
904 start_ticks = ticks;
905 do {
906 uether_pause(&sc->sc_ue, hz / 100);
907 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
908 MII_BMCR);
909 } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks));
910
911 if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) {
912 muge_err_printf(sc, "PHY reset timed-out\n");
913 return (EIO);
914 }
915
916 /* Setup phy to interrupt upon link down or autoneg completion. */
917 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
918 MUGE_PHY_INTR_STAT);
919 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
920 MUGE_PHY_INTR_MASK,
921 (MUGE_PHY_INTR_ANEG_COMP | MUGE_PHY_INTR_LINK_CHANGE));
922
923 /* Enable Auto-MDIX for crossover and polarity detection. */
924 lan78xx_set_mdix_auto(sc);
925
926 /* Enable all modes. */
927 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR,
928 ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD |
929 ANAR_CSMA | ANAR_FC | ANAR_PAUSE_ASYM);
930
931 /* Restart auto-negotiation. */
932 bmcr |= BMCR_STARTNEG;
933 bmcr |= BMCR_AUTOEN;
934 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr);
935 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
936
937 /* Configure LED Modes. */
938 if (sc->sc_led_modes_mask != 0) {
939 lmsr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
940 MUGE_PHY_LED_MODE);
941 lmsr &= ~sc->sc_led_modes_mask;
942 lmsr |= sc->sc_led_modes;
943 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
944 MUGE_PHY_LED_MODE, lmsr);
945 }
946
947 /* Enable appropriate LEDs. */
948 if (sc->sc_leds != 0 &&
949 lan78xx_read_reg(sc, ETH_HW_CFG, &hw_reg) == 0) {
950 hw_reg &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_ |
951 ETH_HW_CFG_LED2_EN_ | ETH_HW_CFG_LED3_EN_ );
952 hw_reg |= sc->sc_leds;
953 lan78xx_write_reg(sc, ETH_HW_CFG, hw_reg);
954 }
955 return (0);
956 }
957
958 /**
959 * lan78xx_chip_init - Initialises the chip after power on
960 * @sc: driver soft context
961 *
962 * This initialisation sequence is modelled on the procedure in the Linux
963 * driver.
964 *
965 * RETURNS:
966 * Returns 0 on success or an error code on failure.
967 */
968 static int
lan78xx_chip_init(struct muge_softc * sc)969 lan78xx_chip_init(struct muge_softc *sc)
970 {
971 int err;
972 uint32_t buf;
973 uint32_t burst_cap;
974
975 MUGE_LOCK_ASSERT(sc, MA_OWNED);
976
977 /* Enter H/W config mode. */
978 lan78xx_write_reg(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_);
979
980 if ((err = lan78xx_wait_for_bits(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_)) !=
981 0) {
982 muge_warn_printf(sc,
983 "timed-out waiting for lite reset to complete\n");
984 goto init_failed;
985 }
986
987 /* Set the mac address. */
988 if ((err = lan78xx_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) {
989 muge_warn_printf(sc, "failed to set the MAC address\n");
990 goto init_failed;
991 }
992
993 /* Read and display the revision register. */
994 if ((err = lan78xx_read_reg(sc, ETH_ID_REV, &buf)) < 0) {
995 muge_warn_printf(sc, "failed to read ETH_ID_REV (err = %d)\n",
996 err);
997 goto init_failed;
998 }
999 sc->chipid = (buf & ETH_ID_REV_CHIP_ID_MASK_) >> 16;
1000 sc->chiprev = buf & ETH_ID_REV_CHIP_REV_MASK_;
1001 switch (sc->chipid) {
1002 case ETH_ID_REV_CHIP_ID_7800_:
1003 case ETH_ID_REV_CHIP_ID_7850_:
1004 break;
1005 default:
1006 muge_warn_printf(sc, "Chip ID 0x%04x not yet supported\n",
1007 sc->chipid);
1008 goto init_failed;
1009 }
1010 device_printf(sc->sc_ue.ue_dev, "Chip ID 0x%04x rev %04x\n", sc->chipid,
1011 sc->chiprev);
1012
1013 /* Respond to BULK-IN tokens with a NAK when RX FIFO is empty. */
1014 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) != 0) {
1015 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", err);
1016 goto init_failed;
1017 }
1018 buf |= ETH_USB_CFG_BIR_;
1019 lan78xx_write_reg(sc, ETH_USB_CFG0, buf);
1020
1021 /*
1022 * XXX LTM support will go here.
1023 */
1024
1025 /* Configuring the burst cap. */
1026 switch (usbd_get_speed(sc->sc_ue.ue_udev)) {
1027 case USB_SPEED_SUPER:
1028 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_SS_USB_PKT_SIZE;
1029 break;
1030 case USB_SPEED_HIGH:
1031 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_HS_USB_PKT_SIZE;
1032 break;
1033 default:
1034 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_FS_USB_PKT_SIZE;
1035 }
1036
1037 lan78xx_write_reg(sc, ETH_BURST_CAP, burst_cap);
1038
1039 /* Set the default bulk in delay (same value from Linux driver). */
1040 lan78xx_write_reg(sc, ETH_BULK_IN_DLY, MUGE_DEFAULT_BULK_IN_DELAY);
1041
1042 /* Multiple ethernet frames per USB packets. */
1043 err = lan78xx_read_reg(sc, ETH_HW_CFG, &buf);
1044 buf |= ETH_HW_CFG_MEF_;
1045 err = lan78xx_write_reg(sc, ETH_HW_CFG, buf);
1046
1047 /* Enable burst cap. */
1048 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) < 0) {
1049 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n",
1050 err);
1051 goto init_failed;
1052 }
1053 buf |= ETH_USB_CFG_BCE_;
1054 err = lan78xx_write_reg(sc, ETH_USB_CFG0, buf);
1055
1056 /*
1057 * Set FCL's RX and TX FIFO sizes: according to data sheet this is
1058 * already the default value. But we initialize it to the same value
1059 * anyways, as that's what the Linux driver does.
1060 *
1061 */
1062 buf = (MUGE_MAX_RX_FIFO_SIZE - 512) / 512;
1063 err = lan78xx_write_reg(sc, ETH_FCT_RX_FIFO_END, buf);
1064
1065 buf = (MUGE_MAX_TX_FIFO_SIZE - 512) / 512;
1066 err = lan78xx_write_reg(sc, ETH_FCT_TX_FIFO_END, buf);
1067
1068 /* Enabling interrupts. (Not using them for now) */
1069 err = lan78xx_write_reg(sc, ETH_INT_STS, ETH_INT_STS_CLEAR_ALL_);
1070
1071 /*
1072 * Initializing flow control registers to 0. These registers are
1073 * properly set is handled in link-reset function in the Linux driver.
1074 */
1075 err = lan78xx_write_reg(sc, ETH_FLOW, 0);
1076 err = lan78xx_write_reg(sc, ETH_FCT_FLOW, 0);
1077
1078 /*
1079 * Settings for the RFE, we enable broadcast and destination address
1080 * perfect filtering.
1081 */
1082 err = lan78xx_read_reg(sc, ETH_RFE_CTL, &buf);
1083 buf |= ETH_RFE_CTL_BCAST_EN_ | ETH_RFE_CTL_DA_PERFECT_;
1084 err = lan78xx_write_reg(sc, ETH_RFE_CTL, buf);
1085
1086 /*
1087 * At this point the Linux driver writes multicast tables, and enables
1088 * checksum engines. But in FreeBSD that gets done in muge_init,
1089 * which gets called when the interface is brought up.
1090 */
1091
1092 /* Reset the PHY. */
1093 lan78xx_write_reg(sc, ETH_PMT_CTL, ETH_PMT_CTL_PHY_RST_);
1094 if ((err = lan78xx_wait_for_bits(sc, ETH_PMT_CTL,
1095 ETH_PMT_CTL_PHY_RST_)) != 0) {
1096 muge_warn_printf(sc,
1097 "timed-out waiting for phy reset to complete\n");
1098 goto init_failed;
1099 }
1100
1101 err = lan78xx_read_reg(sc, ETH_MAC_CR, &buf);
1102 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_ &&
1103 !lan78xx_eeprom_present(sc)) {
1104 /* Set automatic duplex and speed on LAN7800 without EEPROM. */
1105 buf |= ETH_MAC_CR_AUTO_DUPLEX_ | ETH_MAC_CR_AUTO_SPEED_;
1106 }
1107 err = lan78xx_write_reg(sc, ETH_MAC_CR, buf);
1108
1109 /*
1110 * Enable PHY interrupts (Not really getting used for now)
1111 * ETH_INT_EP_CTL: interrupt endpoint control register
1112 * phy events cause interrupts to be issued
1113 */
1114 err = lan78xx_read_reg(sc, ETH_INT_EP_CTL, &buf);
1115 buf |= ETH_INT_ENP_PHY_INT;
1116 err = lan78xx_write_reg(sc, ETH_INT_EP_CTL, buf);
1117
1118 /*
1119 * Enables mac's transmitter. It will transmit frames from the buffer
1120 * onto the cable.
1121 */
1122 err = lan78xx_read_reg(sc, ETH_MAC_TX, &buf);
1123 buf |= ETH_MAC_TX_TXEN_;
1124 err = lan78xx_write_reg(sc, ETH_MAC_TX, buf);
1125
1126 /* FIFO is capable of transmitting frames to MAC. */
1127 err = lan78xx_read_reg(sc, ETH_FCT_TX_CTL, &buf);
1128 buf |= ETH_FCT_TX_CTL_EN_;
1129 err = lan78xx_write_reg(sc, ETH_FCT_TX_CTL, buf);
1130
1131 /*
1132 * Set max frame length. In linux this is dev->mtu (which by default
1133 * is 1500) + VLAN_ETH_HLEN = 1518.
1134 */
1135 err = lan78xx_set_rx_max_frame_length(sc, ETHER_MAX_LEN);
1136
1137 /* Initialise the PHY. */
1138 if ((err = lan78xx_phy_init(sc)) != 0)
1139 goto init_failed;
1140
1141 /* Enable MAC RX. */
1142 err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf);
1143 buf |= ETH_MAC_RX_EN_;
1144 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
1145
1146 /* Enable FIFO controller RX. */
1147 err = lan78xx_read_reg(sc, ETH_FCT_RX_CTL, &buf);
1148 buf |= ETH_FCT_TX_CTL_EN_;
1149 err = lan78xx_write_reg(sc, ETH_FCT_RX_CTL, buf);
1150
1151 sc->sc_flags |= MUGE_FLAG_INIT_DONE;
1152 return (0);
1153
1154 init_failed:
1155 muge_err_printf(sc, "lan78xx_chip_init failed (err=%d)\n", err);
1156 return (err);
1157 }
1158
1159 static void
muge_bulk_read_callback(struct usb_xfer * xfer,usb_error_t error)1160 muge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
1161 {
1162 struct muge_softc *sc = usbd_xfer_softc(xfer);
1163 struct usb_ether *ue = &sc->sc_ue;
1164 struct ifnet *ifp = uether_getifp(ue);
1165 struct mbuf *m;
1166 struct usb_page_cache *pc;
1167 uint32_t rx_cmd_a, rx_cmd_b;
1168 uint16_t rx_cmd_c;
1169 int pktlen;
1170 int off;
1171 int actlen;
1172
1173 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
1174 muge_dbg_printf(sc, "rx : actlen %d\n", actlen);
1175
1176 switch (USB_GET_STATE(xfer)) {
1177 case USB_ST_TRANSFERRED:
1178 /*
1179 * There is always a zero length frame after bringing the
1180 * interface up.
1181 */
1182 if (actlen < (sizeof(rx_cmd_a) + ETHER_CRC_LEN))
1183 goto tr_setup;
1184
1185 /*
1186 * There may be multiple packets in the USB frame. Each will
1187 * have a header and each needs to have its own mbuf allocated
1188 * and populated for it.
1189 */
1190 pc = usbd_xfer_get_frame(xfer, 0);
1191 off = 0;
1192
1193 while (off < actlen) {
1194 /* The frame header is aligned on a 4 byte boundary. */
1195 off = ((off + 0x3) & ~0x3);
1196
1197 /* Extract RX CMD A. */
1198 if (off + sizeof(rx_cmd_a) > actlen)
1199 goto tr_setup;
1200 usbd_copy_out(pc, off, &rx_cmd_a, sizeof(rx_cmd_a));
1201 off += (sizeof(rx_cmd_a));
1202 rx_cmd_a = le32toh(rx_cmd_a);
1203
1204 /* Extract RX CMD B. */
1205 if (off + sizeof(rx_cmd_b) > actlen)
1206 goto tr_setup;
1207 usbd_copy_out(pc, off, &rx_cmd_b, sizeof(rx_cmd_b));
1208 off += (sizeof(rx_cmd_b));
1209 rx_cmd_b = le32toh(rx_cmd_b);
1210
1211 /* Extract RX CMD C. */
1212 if (off + sizeof(rx_cmd_c) > actlen)
1213 goto tr_setup;
1214 usbd_copy_out(pc, off, &rx_cmd_c, sizeof(rx_cmd_c));
1215 off += (sizeof(rx_cmd_c));
1216 rx_cmd_c = le16toh(rx_cmd_c);
1217
1218 if (off > actlen)
1219 goto tr_setup;
1220
1221 pktlen = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
1222
1223 muge_dbg_printf(sc,
1224 "rx_cmd_a 0x%08x rx_cmd_b 0x%08x rx_cmd_c 0x%04x "
1225 " pktlen %d actlen %d off %d\n",
1226 rx_cmd_a, rx_cmd_b, rx_cmd_c, pktlen, actlen, off);
1227
1228 if (rx_cmd_a & RX_CMD_A_RED_) {
1229 muge_dbg_printf(sc,
1230 "rx error (hdr 0x%08x)\n", rx_cmd_a);
1231 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1232 } else {
1233 /* Ethernet frame too big or too small? */
1234 if ((pktlen < ETHER_HDR_LEN) ||
1235 (pktlen > (actlen - off)))
1236 goto tr_setup;
1237
1238 /* Create a new mbuf to store the packet. */
1239 m = uether_newbuf();
1240 if (m == NULL) {
1241 muge_warn_printf(sc,
1242 "failed to create new mbuf\n");
1243 if_inc_counter(ifp, IFCOUNTER_IQDROPS,
1244 1);
1245 goto tr_setup;
1246 }
1247 if (pktlen > m->m_len) {
1248 muge_dbg_printf(sc,
1249 "buffer too small %d vs %d bytes",
1250 pktlen, m->m_len);
1251 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1);
1252 m_freem(m);
1253 goto tr_setup;
1254 }
1255 usbd_copy_out(pc, off, mtod(m, uint8_t *),
1256 pktlen);
1257
1258 /*
1259 * Check if RX checksums are computed, and
1260 * offload them
1261 */
1262 if ((ifp->if_capenable & IFCAP_RXCSUM) &&
1263 !(rx_cmd_a & RX_CMD_A_ICSM_)) {
1264 struct ether_header *eh;
1265 eh = mtod(m, struct ether_header *);
1266 /*
1267 * Remove the extra 2 bytes of the csum
1268 *
1269 * The checksum appears to be
1270 * simplistically calculated over the
1271 * protocol headers up to the end of the
1272 * eth frame. Which means if the eth
1273 * frame is padded the csum calculation
1274 * is incorrectly performed over the
1275 * padding bytes as well. Therefore to
1276 * be safe we ignore the H/W csum on
1277 * frames less than or equal to
1278 * 64 bytes.
1279 *
1280 * Protocols checksummed:
1281 * TCP, UDP, ICMP, IGMP, IP
1282 */
1283 if (pktlen > ETHER_MIN_LEN) {
1284 m->m_pkthdr.csum_flags |=
1285 CSUM_DATA_VALID |
1286 CSUM_PSEUDO_HDR;
1287
1288 /*
1289 * Copy the checksum from the
1290 * last 2 bytes of the transfer
1291 * and put in the csum_data
1292 * field.
1293 */
1294 usbd_copy_out(pc,
1295 (off + pktlen),
1296 &m->m_pkthdr.csum_data, 2);
1297
1298 /*
1299 * The data is copied in network
1300 * order, but the csum algorithm
1301 * in the kernel expects it to
1302 * be in host network order.
1303 */
1304 m->m_pkthdr.csum_data =
1305 ntohs(0xffff);
1306
1307 muge_dbg_printf(sc,
1308 "RX checksum offloaded (0x%04x)\n",
1309 m->m_pkthdr.csum_data);
1310 }
1311 }
1312
1313 /* Enqueue the mbuf on the receive queue. */
1314 if (pktlen < (4 + ETHER_HDR_LEN)) {
1315 m_freem(m);
1316 goto tr_setup;
1317 }
1318 /* Remove 4 trailing bytes */
1319 uether_rxmbuf(ue, m, pktlen - 4);
1320 }
1321
1322 /*
1323 * Update the offset to move to the next potential
1324 * packet.
1325 */
1326 off += pktlen;
1327 }
1328 /* FALLTHROUGH */
1329 case USB_ST_SETUP:
1330 tr_setup:
1331 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
1332 usbd_transfer_submit(xfer);
1333 uether_rxflush(ue);
1334 return;
1335 default:
1336 if (error != USB_ERR_CANCELLED) {
1337 muge_warn_printf(sc, "bulk read error, %s\n",
1338 usbd_errstr(error));
1339 usbd_xfer_set_stall(xfer);
1340 goto tr_setup;
1341 }
1342 return;
1343 }
1344 }
1345
1346 /**
1347 * muge_bulk_write_callback - Write callback used to send ethernet frame(s)
1348 * @xfer: the USB transfer
1349 * @error: error code if the transfers is in an errored state
1350 *
1351 * The main write function that pulls ethernet frames off the queue and
1352 * sends them out.
1353 *
1354 */
1355 static void
muge_bulk_write_callback(struct usb_xfer * xfer,usb_error_t error)1356 muge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
1357 {
1358 struct muge_softc *sc = usbd_xfer_softc(xfer);
1359 struct ifnet *ifp = uether_getifp(&sc->sc_ue);
1360 struct usb_page_cache *pc;
1361 struct mbuf *m;
1362 int nframes;
1363 uint32_t frm_len = 0, tx_cmd_a = 0, tx_cmd_b = 0;
1364
1365 switch (USB_GET_STATE(xfer)) {
1366 case USB_ST_TRANSFERRED:
1367 muge_dbg_printf(sc,
1368 "USB TRANSFER status: USB_ST_TRANSFERRED\n");
1369 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1370 /* FALLTHROUGH */
1371 case USB_ST_SETUP:
1372 muge_dbg_printf(sc, "USB TRANSFER status: USB_ST_SETUP\n");
1373 tr_setup:
1374 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0 ||
1375 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) {
1376 muge_dbg_printf(sc,
1377 "sc->sc_flags & MUGE_FLAG_LINK: %d\n",
1378 (sc->sc_flags & MUGE_FLAG_LINK));
1379 muge_dbg_printf(sc,
1380 "ifp->if_drv_flags & IFF_DRV_OACTIVE: %d\n",
1381 (ifp->if_drv_flags & IFF_DRV_OACTIVE));
1382 muge_dbg_printf(sc,
1383 "USB TRANSFER not sending: no link or controller is busy \n");
1384 /*
1385 * Don't send anything if there is no link or
1386 * controller is busy.
1387 */
1388 return;
1389 }
1390 for (nframes = 0;
1391 nframes < 16 && !IFQ_DRV_IS_EMPTY(&ifp->if_snd);
1392 nframes++) {
1393 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1394 if (m == NULL)
1395 break;
1396 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES,
1397 nframes);
1398 frm_len = 0;
1399 pc = usbd_xfer_get_frame(xfer, nframes);
1400
1401 /*
1402 * Each frame is prefixed with two 32-bit values
1403 * describing the length of the packet and buffer.
1404 */
1405 tx_cmd_a = (m->m_pkthdr.len & TX_CMD_A_LEN_MASK_) |
1406 TX_CMD_A_FCS_;
1407 tx_cmd_a = htole32(tx_cmd_a);
1408 usbd_copy_in(pc, 0, &tx_cmd_a, sizeof(tx_cmd_a));
1409
1410 tx_cmd_b = 0;
1411
1412 /* TCP LSO Support will probably be implemented here. */
1413 tx_cmd_b = htole32(tx_cmd_b);
1414 usbd_copy_in(pc, 4, &tx_cmd_b, sizeof(tx_cmd_b));
1415
1416 frm_len += 8;
1417
1418 /* Next copy in the actual packet */
1419 usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len);
1420 frm_len += m->m_pkthdr.len;
1421
1422 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1423
1424 /*
1425 * If there's a BPF listener, bounce a copy of this
1426 * frame to it.
1427 */
1428 BPF_MTAP(ifp, m);
1429 m_freem(m);
1430
1431 /* Set frame length. */
1432 usbd_xfer_set_frame_len(xfer, nframes, frm_len);
1433 }
1434
1435 muge_dbg_printf(sc, "USB TRANSFER nframes: %d\n", nframes);
1436 if (nframes != 0) {
1437 muge_dbg_printf(sc, "USB TRANSFER submit attempt\n");
1438 usbd_xfer_set_frames(xfer, nframes);
1439 usbd_transfer_submit(xfer);
1440 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1441 }
1442 return;
1443
1444 default:
1445 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1446 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1447
1448 if (error != USB_ERR_CANCELLED) {
1449 muge_err_printf(sc,
1450 "usb error on tx: %s\n", usbd_errstr(error));
1451 usbd_xfer_set_stall(xfer);
1452 goto tr_setup;
1453 }
1454 return;
1455 }
1456 }
1457
1458 /**
1459 * muge_set_mac_addr - Initiailizes NIC MAC address
1460 * @ue: the USB ethernet device
1461 *
1462 * Tries to obtain MAC address from number of sources: registers,
1463 * EEPROM, DTB blob. If all sources fail - generates random MAC.
1464 */
1465 static void
muge_set_mac_addr(struct usb_ether * ue)1466 muge_set_mac_addr(struct usb_ether *ue)
1467 {
1468 struct muge_softc *sc = uether_getsc(ue);
1469 uint32_t mac_h, mac_l;
1470
1471 memset(ue->ue_eaddr, 0xff, ETHER_ADDR_LEN);
1472
1473 uint32_t val;
1474 lan78xx_read_reg(sc, 0, &val);
1475
1476 /* Read current MAC address from RX_ADDRx registers. */
1477 if ((lan78xx_read_reg(sc, ETH_RX_ADDRL, &mac_l) == 0) &&
1478 (lan78xx_read_reg(sc, ETH_RX_ADDRH, &mac_h) == 0)) {
1479 ue->ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff);
1480 ue->ue_eaddr[4] = (uint8_t)((mac_h) & 0xff);
1481 ue->ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff);
1482 ue->ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff);
1483 ue->ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff);
1484 ue->ue_eaddr[0] = (uint8_t)((mac_l) & 0xff);
1485 }
1486
1487 /*
1488 * If RX_ADDRx did not provide a valid MAC address, try EEPROM. If that
1489 * doesn't work, try OTP. Whether any of these methods work or not, try
1490 * FDT data, because it is allowed to override the EEPROM/OTP values.
1491 */
1492 if (ETHER_IS_VALID(ue->ue_eaddr)) {
1493 muge_dbg_printf(sc, "MAC assigned from registers\n");
1494 } else if (lan78xx_eeprom_present(sc) && lan78xx_eeprom_read_raw(sc,
1495 ETH_E2P_MAC_OFFSET, ue->ue_eaddr, ETHER_ADDR_LEN) == 0 &&
1496 ETHER_IS_VALID(ue->ue_eaddr)) {
1497 muge_dbg_printf(sc, "MAC assigned from EEPROM\n");
1498 } else if (lan78xx_otp_read(sc, OTP_MAC_OFFSET, ue->ue_eaddr,
1499 ETHER_ADDR_LEN) == 0 && ETHER_IS_VALID(ue->ue_eaddr)) {
1500 muge_dbg_printf(sc, "MAC assigned from OTP\n");
1501 }
1502
1503 #ifdef FDT
1504 /* ue->ue_eaddr modified only if config exists for this dev instance. */
1505 usb_fdt_get_mac_addr(ue->ue_dev, ue);
1506 if (ETHER_IS_VALID(ue->ue_eaddr)) {
1507 muge_dbg_printf(sc, "MAC assigned from FDT data\n");
1508 }
1509 #endif
1510
1511 if (!ETHER_IS_VALID(ue->ue_eaddr)) {
1512 muge_dbg_printf(sc, "MAC assigned randomly\n");
1513 arc4rand(ue->ue_eaddr, ETHER_ADDR_LEN, 0);
1514 ue->ue_eaddr[0] &= ~0x01; /* unicast */
1515 ue->ue_eaddr[0] |= 0x02; /* locally administered */
1516 }
1517 }
1518
1519 /**
1520 * muge_set_leds - Initializes NIC LEDs pattern
1521 * @ue: the USB ethernet device
1522 *
1523 * Tries to store the LED modes.
1524 * Supports only DTB blob like the Linux driver does.
1525 */
1526 static void
muge_set_leds(struct usb_ether * ue)1527 muge_set_leds(struct usb_ether *ue)
1528 {
1529 #ifdef FDT
1530 struct muge_softc *sc = uether_getsc(ue);
1531 phandle_t node;
1532 pcell_t modes[4]; /* 4 LEDs are possible */
1533 ssize_t proplen;
1534 uint32_t count;
1535
1536 if ((node = usb_fdt_get_node(ue->ue_dev, ue->ue_udev)) != -1 &&
1537 (proplen = OF_getencprop(node, "microchip,led-modes", modes,
1538 sizeof(modes))) > 0) {
1539 count = proplen / sizeof( uint32_t );
1540 sc->sc_leds = (count > 0) * ETH_HW_CFG_LEDO_EN_ |
1541 (count > 1) * ETH_HW_CFG_LED1_EN_ |
1542 (count > 2) * ETH_HW_CFG_LED2_EN_ |
1543 (count > 3) * ETH_HW_CFG_LED3_EN_;
1544 while (count-- > 0) {
1545 sc->sc_led_modes |= (modes[count] & 0xf) << (4 * count);
1546 sc->sc_led_modes_mask |= 0xf << (4 * count);
1547 }
1548 muge_dbg_printf(sc, "LED modes set from FDT data\n");
1549 }
1550 #endif
1551 }
1552
1553 /**
1554 * muge_attach_post - Called after the driver attached to the USB interface
1555 * @ue: the USB ethernet device
1556 *
1557 * This is where the chip is intialised for the first time. This is
1558 * different from the muge_init() function in that that one is designed to
1559 * setup the H/W to match the UE settings and can be called after a reset.
1560 *
1561 */
1562 static void
muge_attach_post(struct usb_ether * ue)1563 muge_attach_post(struct usb_ether *ue)
1564 {
1565 struct muge_softc *sc = uether_getsc(ue);
1566
1567 muge_dbg_printf(sc, "Calling muge_attach_post.\n");
1568
1569 /* Setup some of the basics */
1570 sc->sc_phyno = 1;
1571
1572 muge_set_mac_addr(ue);
1573 muge_set_leds(ue);
1574
1575 /* Initialise the chip for the first time */
1576 lan78xx_chip_init(sc);
1577 }
1578
1579 /**
1580 * muge_attach_post_sub - Called after attach to the USB interface
1581 * @ue: the USB ethernet device
1582 *
1583 * Most of this is boilerplate code and copied from the base USB ethernet
1584 * driver. It has been overridden so that we can indicate to the system
1585 * that the chip supports H/W checksumming.
1586 *
1587 * RETURNS:
1588 * Returns 0 on success or a negative error code.
1589 */
1590 static int
muge_attach_post_sub(struct usb_ether * ue)1591 muge_attach_post_sub(struct usb_ether *ue)
1592 {
1593 struct muge_softc *sc;
1594 struct ifnet *ifp;
1595 int error;
1596
1597 sc = uether_getsc(ue);
1598 muge_dbg_printf(sc, "Calling muge_attach_post_sub.\n");
1599 ifp = ue->ue_ifp;
1600 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1601 ifp->if_start = uether_start;
1602 ifp->if_ioctl = muge_ioctl;
1603 ifp->if_init = uether_init;
1604 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
1605 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
1606 IFQ_SET_READY(&ifp->if_snd);
1607
1608 /*
1609 * The chip supports TCP/UDP checksum offloading on TX and RX paths,
1610 * however currently only RX checksum is supported in the driver
1611 * (see top of file).
1612 */
1613 ifp->if_capabilities |= IFCAP_VLAN_MTU;
1614 ifp->if_hwassist = 0;
1615 ifp->if_capabilities |= IFCAP_RXCSUM;
1616
1617 if (MUGE_DEFAULT_TX_CSUM_ENABLE)
1618 ifp->if_capabilities |= IFCAP_TXCSUM;
1619
1620 /*
1621 * In the Linux driver they also enable scatter/gather (NETIF_F_SG)
1622 * here, that's something related to socket buffers used in Linux.
1623 * FreeBSD doesn't have that as an interface feature.
1624 */
1625 if (MUGE_DEFAULT_TSO_ENABLE)
1626 ifp->if_capabilities |= IFCAP_TSO4 | IFCAP_TSO6;
1627
1628 #if 0
1629 /* TX checksuming is disabled since not yet implemented. */
1630 ifp->if_capabilities |= IFCAP_TXCSUM;
1631 ifp->if_capenable |= IFCAP_TXCSUM;
1632 ifp->if_hwassist = CSUM_TCP | CSUM_UDP;
1633 #endif
1634
1635 ifp->if_capenable = ifp->if_capabilities;
1636
1637 bus_topo_lock();
1638 error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, uether_ifmedia_upd,
1639 ue->ue_methods->ue_mii_sts, BMSR_DEFCAPMASK, sc->sc_phyno,
1640 MII_OFFSET_ANY, 0);
1641 bus_topo_unlock();
1642
1643 return (0);
1644 }
1645
1646 /**
1647 * muge_start - Starts communication with the LAN78xx chip
1648 * @ue: USB ether interface
1649 */
1650 static void
muge_start(struct usb_ether * ue)1651 muge_start(struct usb_ether *ue)
1652 {
1653 struct muge_softc *sc = uether_getsc(ue);
1654
1655 /*
1656 * Start the USB transfers, if not already started.
1657 */
1658 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_RD]);
1659 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_WR]);
1660 }
1661
1662 /**
1663 * muge_ioctl - ioctl function for the device
1664 * @ifp: interface pointer
1665 * @cmd: the ioctl command
1666 * @data: data passed in the ioctl call, typically a pointer to struct
1667 * ifreq.
1668 *
1669 * The ioctl routine is overridden to detect change requests for the H/W
1670 * checksum capabilities.
1671 *
1672 * RETURNS:
1673 * 0 on success and an error code on failure.
1674 */
1675 static int
muge_ioctl(struct ifnet * ifp,u_long cmd,caddr_t data)1676 muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1677 {
1678 struct usb_ether *ue = ifp->if_softc;
1679 struct muge_softc *sc;
1680 struct ifreq *ifr;
1681 int rc;
1682 int mask;
1683 int reinit;
1684
1685 if (cmd == SIOCSIFCAP) {
1686 sc = uether_getsc(ue);
1687 ifr = (struct ifreq *)data;
1688
1689 MUGE_LOCK(sc);
1690
1691 rc = 0;
1692 reinit = 0;
1693
1694 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1695
1696 /* Modify the RX CSUM enable bits. */
1697 if ((mask & IFCAP_RXCSUM) != 0 &&
1698 (ifp->if_capabilities & IFCAP_RXCSUM) != 0) {
1699 ifp->if_capenable ^= IFCAP_RXCSUM;
1700
1701 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1702 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1703 reinit = 1;
1704 }
1705 }
1706
1707 MUGE_UNLOCK(sc);
1708 if (reinit)
1709 uether_init(ue);
1710 } else {
1711 rc = uether_ioctl(ifp, cmd, data);
1712 }
1713
1714 return (rc);
1715 }
1716
1717 /**
1718 * muge_reset - Reset the SMSC chip
1719 * @sc: device soft context
1720 *
1721 * LOCKING:
1722 * Should be called with the SMSC lock held.
1723 */
1724 static void
muge_reset(struct muge_softc * sc)1725 muge_reset(struct muge_softc *sc)
1726 {
1727 struct usb_config_descriptor *cd;
1728 usb_error_t err;
1729
1730 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
1731
1732 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
1733 cd->bConfigurationValue);
1734 if (err)
1735 muge_warn_printf(sc, "reset failed (ignored)\n");
1736
1737 /* Wait a little while for the chip to get its brains in order. */
1738 uether_pause(&sc->sc_ue, hz / 100);
1739
1740 /* Reinitialize controller to achieve full reset. */
1741 lan78xx_chip_init(sc);
1742 }
1743
1744 /**
1745 * muge_set_addr_filter
1746 *
1747 * @sc: device soft context
1748 * @index: index of the entry to the perfect address table
1749 * @addr: address to be written
1750 *
1751 */
1752 static void
muge_set_addr_filter(struct muge_softc * sc,int index,uint8_t addr[ETHER_ADDR_LEN])1753 muge_set_addr_filter(struct muge_softc *sc, int index,
1754 uint8_t addr[ETHER_ADDR_LEN])
1755 {
1756 uint32_t tmp;
1757
1758 if ((sc) && (index > 0) && (index < MUGE_NUM_PFILTER_ADDRS_)) {
1759 tmp = addr[3];
1760 tmp |= addr[2] | (tmp << 8);
1761 tmp |= addr[1] | (tmp << 8);
1762 tmp |= addr[0] | (tmp << 8);
1763 sc->sc_pfilter_table[index][1] = tmp;
1764 tmp = addr[5];
1765 tmp |= addr[4] | (tmp << 8);
1766 tmp |= ETH_MAF_HI_VALID_ | ETH_MAF_HI_TYPE_DST_;
1767 sc->sc_pfilter_table[index][0] = tmp;
1768 }
1769 }
1770
1771 /**
1772 * lan78xx_dataport_write - write to the selected RAM
1773 * @sc: The device soft context.
1774 * @ram_select: Select which RAM to access.
1775 * @addr: Starting address to write to.
1776 * @buf: word-sized buffer to write to RAM, starting at @addr.
1777 * @length: length of @buf
1778 *
1779 *
1780 * RETURNS:
1781 * 0 if write successful.
1782 */
1783 static int
lan78xx_dataport_write(struct muge_softc * sc,uint32_t ram_select,uint32_t addr,uint32_t length,uint32_t * buf)1784 lan78xx_dataport_write(struct muge_softc *sc, uint32_t ram_select,
1785 uint32_t addr, uint32_t length, uint32_t *buf)
1786 {
1787 uint32_t dp_sel;
1788 int i, ret;
1789
1790 MUGE_LOCK_ASSERT(sc, MA_OWNED);
1791 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_);
1792 if (ret < 0)
1793 goto done;
1794
1795 ret = lan78xx_read_reg(sc, ETH_DP_SEL, &dp_sel);
1796
1797 dp_sel &= ~ETH_DP_SEL_RSEL_MASK_;
1798 dp_sel |= ram_select;
1799
1800 ret = lan78xx_write_reg(sc, ETH_DP_SEL, dp_sel);
1801
1802 for (i = 0; i < length; i++) {
1803 ret = lan78xx_write_reg(sc, ETH_DP_ADDR, addr + i);
1804 ret = lan78xx_write_reg(sc, ETH_DP_DATA, buf[i]);
1805 ret = lan78xx_write_reg(sc, ETH_DP_CMD, ETH_DP_CMD_WRITE_);
1806 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_);
1807 if (ret != 0)
1808 goto done;
1809 }
1810
1811 done:
1812 return (ret);
1813 }
1814
1815 /**
1816 * muge_multicast_write
1817 * @sc: device's soft context
1818 *
1819 * Writes perfect address filters and hash address filters to their
1820 * corresponding registers and RAMs.
1821 *
1822 */
1823 static void
muge_multicast_write(struct muge_softc * sc)1824 muge_multicast_write(struct muge_softc *sc)
1825 {
1826 int i, ret;
1827 lan78xx_dataport_write(sc, ETH_DP_SEL_RSEL_VLAN_DA_,
1828 ETH_DP_SEL_VHF_VLAN_LEN, ETH_DP_SEL_VHF_HASH_LEN,
1829 sc->sc_mchash_table);
1830
1831 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) {
1832 ret = lan78xx_write_reg(sc, PFILTER_HI(i), 0);
1833 ret = lan78xx_write_reg(sc, PFILTER_LO(i),
1834 sc->sc_pfilter_table[i][1]);
1835 ret = lan78xx_write_reg(sc, PFILTER_HI(i),
1836 sc->sc_pfilter_table[i][0]);
1837 }
1838 }
1839
1840 /**
1841 * muge_hash - Calculate the hash of a mac address
1842 * @addr: The mac address to calculate the hash on
1843 *
1844 * This function is used when configuring a range of multicast mac
1845 * addresses to filter on. The hash of the mac address is put in the
1846 * device's mac hash table.
1847 *
1848 * RETURNS:
1849 * Returns a value from 0-63 value which is the hash of the mac address.
1850 */
1851 static inline uint32_t
muge_hash(uint8_t addr[ETHER_ADDR_LEN])1852 muge_hash(uint8_t addr[ETHER_ADDR_LEN])
1853 {
1854 return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 23) & 0x1ff;
1855 }
1856
1857 static u_int
muge_hash_maddr(void * arg,struct sockaddr_dl * sdl,u_int cnt)1858 muge_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt)
1859 {
1860 struct muge_softc *sc = arg;
1861 uint32_t bitnum;
1862
1863 /* First fill up the perfect address table. */
1864 if (cnt < 32 /* XXX */)
1865 muge_set_addr_filter(sc, cnt + 1, LLADDR(sdl));
1866 else {
1867 bitnum = muge_hash(LLADDR(sdl));
1868 sc->sc_mchash_table[bitnum / 32] |= (1 << (bitnum % 32));
1869 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_HASH_;
1870 }
1871
1872 return (1);
1873 }
1874
1875 /**
1876 * muge_setmulti - Setup multicast
1877 * @ue: usb ethernet device context
1878 *
1879 * Tells the device to either accept frames with a multicast mac address,
1880 * a select group of m'cast mac addresses or just the devices mac address.
1881 *
1882 * LOCKING:
1883 * Should be called with the MUGE lock held.
1884 */
1885 static void
muge_setmulti(struct usb_ether * ue)1886 muge_setmulti(struct usb_ether *ue)
1887 {
1888 struct muge_softc *sc = uether_getsc(ue);
1889 struct ifnet *ifp = uether_getifp(ue);
1890 uint8_t i;
1891
1892 MUGE_LOCK_ASSERT(sc, MA_OWNED);
1893
1894 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_UCAST_EN_ | ETH_RFE_CTL_MCAST_EN_ |
1895 ETH_RFE_CTL_DA_PERFECT_ | ETH_RFE_CTL_MCAST_HASH_);
1896
1897 /* Initialize hash filter table. */
1898 for (i = 0; i < ETH_DP_SEL_VHF_HASH_LEN; i++)
1899 sc->sc_mchash_table[i] = 0;
1900
1901 /* Initialize perfect filter table. */
1902 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) {
1903 sc->sc_pfilter_table[i][0] = sc->sc_pfilter_table[i][1] = 0;
1904 }
1905
1906 sc->sc_rfe_ctl |= ETH_RFE_CTL_BCAST_EN_;
1907
1908 if (ifp->if_flags & IFF_PROMISC) {
1909 muge_dbg_printf(sc, "promiscuous mode enabled\n");
1910 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_;
1911 } else if (ifp->if_flags & IFF_ALLMULTI) {
1912 muge_dbg_printf(sc, "receive all multicast enabled\n");
1913 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_;
1914 } else {
1915 if_foreach_llmaddr(ifp, muge_hash_maddr, sc);
1916 muge_multicast_write(sc);
1917 }
1918 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1919 }
1920
1921 /**
1922 * muge_setpromisc - Enables/disables promiscuous mode
1923 * @ue: usb ethernet device context
1924 *
1925 * LOCKING:
1926 * Should be called with the MUGE lock held.
1927 */
1928 static void
muge_setpromisc(struct usb_ether * ue)1929 muge_setpromisc(struct usb_ether *ue)
1930 {
1931 struct muge_softc *sc = uether_getsc(ue);
1932 struct ifnet *ifp = uether_getifp(ue);
1933
1934 muge_dbg_printf(sc, "promiscuous mode %sabled\n",
1935 (ifp->if_flags & IFF_PROMISC) ? "en" : "dis");
1936
1937 MUGE_LOCK_ASSERT(sc, MA_OWNED);
1938
1939 if (ifp->if_flags & IFF_PROMISC)
1940 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_;
1941 else
1942 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_MCAST_EN_);
1943
1944 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1945 }
1946
1947 /**
1948 * muge_sethwcsum - Enable or disable H/W UDP and TCP checksumming
1949 * @sc: driver soft context
1950 *
1951 * LOCKING:
1952 * Should be called with the MUGE lock held.
1953 *
1954 * RETURNS:
1955 * Returns 0 on success or a negative error code.
1956 */
1957 static int
muge_sethwcsum(struct muge_softc * sc)1958 muge_sethwcsum(struct muge_softc *sc)
1959 {
1960 struct ifnet *ifp = uether_getifp(&sc->sc_ue);
1961 int err;
1962
1963 if (!ifp)
1964 return (-EIO);
1965
1966 MUGE_LOCK_ASSERT(sc, MA_OWNED);
1967
1968 if (ifp->if_capenable & IFCAP_RXCSUM) {
1969 sc->sc_rfe_ctl |= ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_;
1970 sc->sc_rfe_ctl |= ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_;
1971 } else {
1972 sc->sc_rfe_ctl &=
1973 ~(ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_);
1974 sc->sc_rfe_ctl &=
1975 ~(ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_);
1976 }
1977
1978 sc->sc_rfe_ctl &= ~ETH_RFE_CTL_VLAN_FILTER_;
1979
1980 err = lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1981
1982 if (err != 0) {
1983 muge_warn_printf(sc, "failed to write ETH_RFE_CTL (err=%d)\n",
1984 err);
1985 return (err);
1986 }
1987
1988 return (0);
1989 }
1990
1991 /**
1992 * muge_ifmedia_upd - Set media options
1993 * @ifp: interface pointer
1994 *
1995 * Basically boilerplate code that simply calls the mii functions to set
1996 * the media options.
1997 *
1998 * LOCKING:
1999 * The device lock must be held before this function is called.
2000 *
2001 * RETURNS:
2002 * Returns 0 on success or a negative error code.
2003 */
2004 static int
muge_ifmedia_upd(struct ifnet * ifp)2005 muge_ifmedia_upd(struct ifnet *ifp)
2006 {
2007 struct muge_softc *sc = ifp->if_softc;
2008 muge_dbg_printf(sc, "Calling muge_ifmedia_upd.\n");
2009 struct mii_data *mii = uether_getmii(&sc->sc_ue);
2010 struct mii_softc *miisc;
2011 int err;
2012
2013 MUGE_LOCK_ASSERT(sc, MA_OWNED);
2014
2015 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
2016 PHY_RESET(miisc);
2017 err = mii_mediachg(mii);
2018 return (err);
2019 }
2020
2021 /**
2022 * muge_init - Initialises the LAN95xx chip
2023 * @ue: USB ether interface
2024 *
2025 * Called when the interface is brought up (i.e. ifconfig ue0 up), this
2026 * initialise the interface and the rx/tx pipes.
2027 *
2028 * LOCKING:
2029 * Should be called with the MUGE lock held.
2030 */
2031 static void
muge_init(struct usb_ether * ue)2032 muge_init(struct usb_ether *ue)
2033 {
2034 struct muge_softc *sc = uether_getsc(ue);
2035 muge_dbg_printf(sc, "Calling muge_init.\n");
2036 struct ifnet *ifp = uether_getifp(ue);
2037 MUGE_LOCK_ASSERT(sc, MA_OWNED);
2038
2039 if (lan78xx_setmacaddress(sc, IF_LLADDR(ifp)))
2040 muge_dbg_printf(sc, "setting MAC address failed\n");
2041
2042 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
2043 return;
2044
2045 /* Cancel pending I/O. */
2046 muge_stop(ue);
2047
2048 /* Reset the ethernet interface. */
2049 muge_reset(sc);
2050
2051 /* Load the multicast filter. */
2052 muge_setmulti(ue);
2053
2054 /* TCP/UDP checksum offload engines. */
2055 muge_sethwcsum(sc);
2056
2057 usbd_xfer_set_stall(sc->sc_xfer[MUGE_BULK_DT_WR]);
2058
2059 /* Indicate we are up and running. */
2060 ifp->if_drv_flags |= IFF_DRV_RUNNING;
2061
2062 /* Switch to selected media. */
2063 muge_ifmedia_upd(ifp);
2064 muge_start(ue);
2065 }
2066
2067 /**
2068 * muge_stop - Stops communication with the LAN78xx chip
2069 * @ue: USB ether interface
2070 */
2071 static void
muge_stop(struct usb_ether * ue)2072 muge_stop(struct usb_ether *ue)
2073 {
2074 struct muge_softc *sc = uether_getsc(ue);
2075 struct ifnet *ifp = uether_getifp(ue);
2076
2077 MUGE_LOCK_ASSERT(sc, MA_OWNED);
2078
2079 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2080 sc->sc_flags &= ~MUGE_FLAG_LINK;
2081
2082 /*
2083 * Stop all the transfers, if not already stopped.
2084 */
2085 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_WR]);
2086 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_RD]);
2087 }
2088
2089 /**
2090 * muge_tick - Called periodically to monitor the state of the LAN95xx chip
2091 * @ue: USB ether interface
2092 *
2093 * Simply calls the mii status functions to check the state of the link.
2094 *
2095 * LOCKING:
2096 * Should be called with the MUGE lock held.
2097 */
2098 static void
muge_tick(struct usb_ether * ue)2099 muge_tick(struct usb_ether *ue)
2100 {
2101
2102 struct muge_softc *sc = uether_getsc(ue);
2103 struct mii_data *mii = uether_getmii(&sc->sc_ue);
2104
2105 MUGE_LOCK_ASSERT(sc, MA_OWNED);
2106
2107 mii_tick(mii);
2108 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) {
2109 lan78xx_miibus_statchg(ue->ue_dev);
2110 if ((sc->sc_flags & MUGE_FLAG_LINK) != 0)
2111 muge_start(ue);
2112 }
2113 }
2114
2115 /**
2116 * muge_ifmedia_sts - Report current media status
2117 * @ifp: inet interface pointer
2118 * @ifmr: interface media request
2119 *
2120 * Call the mii functions to get the media status.
2121 *
2122 * LOCKING:
2123 * Internally takes and releases the device lock.
2124 */
2125 static void
muge_ifmedia_sts(struct ifnet * ifp,struct ifmediareq * ifmr)2126 muge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
2127 {
2128 struct muge_softc *sc = ifp->if_softc;
2129 struct mii_data *mii = uether_getmii(&sc->sc_ue);
2130
2131 MUGE_LOCK(sc);
2132 mii_pollstat(mii);
2133 ifmr->ifm_active = mii->mii_media_active;
2134 ifmr->ifm_status = mii->mii_media_status;
2135 MUGE_UNLOCK(sc);
2136 }
2137
2138 /**
2139 * muge_probe - Probe the interface.
2140 * @dev: muge device handle
2141 *
2142 * Checks if the device is a match for this driver.
2143 *
2144 * RETURNS:
2145 * Returns 0 on success or an error code on failure.
2146 */
2147 static int
muge_probe(device_t dev)2148 muge_probe(device_t dev)
2149 {
2150 struct usb_attach_arg *uaa = device_get_ivars(dev);
2151
2152 if (uaa->usb_mode != USB_MODE_HOST)
2153 return (ENXIO);
2154 if (uaa->info.bConfigIndex != MUGE_CONFIG_INDEX)
2155 return (ENXIO);
2156 if (uaa->info.bIfaceIndex != MUGE_IFACE_IDX)
2157 return (ENXIO);
2158 return (usbd_lookup_id_by_uaa(lan78xx_devs, sizeof(lan78xx_devs), uaa));
2159 }
2160
2161 /**
2162 * muge_attach - Attach the interface.
2163 * @dev: muge device handle
2164 *
2165 * Allocate softc structures, do ifmedia setup and ethernet/BPF attach.
2166 *
2167 * RETURNS:
2168 * Returns 0 on success or a negative error code.
2169 */
2170 static int
muge_attach(device_t dev)2171 muge_attach(device_t dev)
2172 {
2173 struct usb_attach_arg *uaa = device_get_ivars(dev);
2174 struct muge_softc *sc = device_get_softc(dev);
2175 struct usb_ether *ue = &sc->sc_ue;
2176 uint8_t iface_index;
2177 int err;
2178
2179 sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
2180
2181 device_set_usb_desc(dev);
2182
2183 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
2184
2185 /* Setup the endpoints for the Microchip LAN78xx device. */
2186 iface_index = MUGE_IFACE_IDX;
2187 err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
2188 muge_config, MUGE_N_TRANSFER, sc, &sc->sc_mtx);
2189 if (err) {
2190 device_printf(dev, "error: allocating USB transfers failed\n");
2191 goto err;
2192 }
2193
2194 ue->ue_sc = sc;
2195 ue->ue_dev = dev;
2196 ue->ue_udev = uaa->device;
2197 ue->ue_mtx = &sc->sc_mtx;
2198 ue->ue_methods = &muge_ue_methods;
2199
2200 err = uether_ifattach(ue);
2201 if (err) {
2202 device_printf(dev, "error: could not attach interface\n");
2203 goto err_usbd;
2204 }
2205
2206 /* Wait for lan78xx_chip_init from post-attach callback to complete. */
2207 uether_ifattach_wait(ue);
2208 if (!(sc->sc_flags & MUGE_FLAG_INIT_DONE))
2209 goto err_attached;
2210
2211 return (0);
2212
2213 err_attached:
2214 uether_ifdetach(ue);
2215 err_usbd:
2216 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER);
2217 err:
2218 mtx_destroy(&sc->sc_mtx);
2219 return (ENXIO);
2220 }
2221
2222 /**
2223 * muge_detach - Detach the interface.
2224 * @dev: muge device handle
2225 *
2226 * RETURNS:
2227 * Returns 0.
2228 */
2229 static int
muge_detach(device_t dev)2230 muge_detach(device_t dev)
2231 {
2232
2233 struct muge_softc *sc = device_get_softc(dev);
2234 struct usb_ether *ue = &sc->sc_ue;
2235
2236 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER);
2237 uether_ifdetach(ue);
2238 mtx_destroy(&sc->sc_mtx);
2239
2240 return (0);
2241 }
2242
2243 static device_method_t muge_methods[] = {
2244 /* Device interface */
2245 DEVMETHOD(device_probe, muge_probe),
2246 DEVMETHOD(device_attach, muge_attach),
2247 DEVMETHOD(device_detach, muge_detach),
2248
2249 /* Bus interface */
2250 DEVMETHOD(bus_print_child, bus_generic_print_child),
2251 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
2252
2253 /* MII interface */
2254 DEVMETHOD(miibus_readreg, lan78xx_miibus_readreg),
2255 DEVMETHOD(miibus_writereg, lan78xx_miibus_writereg),
2256 DEVMETHOD(miibus_statchg, lan78xx_miibus_statchg),
2257
2258 DEVMETHOD_END
2259 };
2260
2261 static driver_t muge_driver = {
2262 .name = "muge",
2263 .methods = muge_methods,
2264 .size = sizeof(struct muge_softc),
2265 };
2266
2267 static devclass_t muge_devclass;
2268
2269 DRIVER_MODULE(muge, uhub, muge_driver, muge_devclass, NULL, NULL);
2270 DRIVER_MODULE(miibus, muge, miibus_driver, miibus_devclass, NULL, NULL);
2271 MODULE_DEPEND(muge, uether, 1, 1, 1);
2272 MODULE_DEPEND(muge, usb, 1, 1, 1);
2273 MODULE_DEPEND(muge, ether, 1, 1, 1);
2274 MODULE_DEPEND(muge, miibus, 1, 1, 1);
2275 MODULE_VERSION(muge, 1);
2276 USB_PNP_HOST_INFO(lan78xx_devs);
2277