1 /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */
2
3 /*-
4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
5 * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org>
6 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
7 *
8 * Permission to use, copy, modify, and distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 */
20
21 #include <sys/cdefs.h>
22 #include <sys/param.h>
23 #include <sys/sysctl.h>
24 #include <sys/lock.h>
25 #include <sys/mutex.h>
26 #include <sys/mbuf.h>
27 #include <sys/kernel.h>
28 #include <sys/socket.h>
29 #include <sys/systm.h>
30 #include <sys/malloc.h>
31 #include <sys/module.h>
32 #include <sys/bus.h>
33 #include <sys/endian.h>
34 #include <sys/linker.h>
35 #include <sys/kdb.h>
36
37 #include <machine/bus.h>
38 #include <machine/resource.h>
39 #include <sys/rman.h>
40
41 #include <dev/pci/pcireg.h>
42 #include <dev/pci/pcivar.h>
43
44 #include <net/if.h>
45 #include <net/ethernet.h>
46 #include <net/if_media.h>
47
48 #include <net80211/ieee80211_var.h>
49
50 #include <dev/rtwn/if_rtwnreg.h>
51 #include <dev/rtwn/if_rtwnvar.h>
52 #include <dev/rtwn/if_rtwn_nop.h>
53 #include <dev/rtwn/if_rtwn_debug.h>
54
55 #include <dev/rtwn/pci/rtwn_pci_var.h>
56
57 #include <dev/rtwn/pci/rtwn_pci_attach.h>
58 #include <dev/rtwn/pci/rtwn_pci_reg.h>
59 #include <dev/rtwn/pci/rtwn_pci_rx.h>
60 #include <dev/rtwn/pci/rtwn_pci_tx.h>
61
62 #include <dev/rtwn/rtl8192c/pci/r92ce_reg.h>
63
64 static device_probe_t rtwn_pci_probe;
65 static device_attach_t rtwn_pci_attach;
66 static device_detach_t rtwn_pci_detach;
67 static device_shutdown_t rtwn_pci_shutdown;
68 static device_suspend_t rtwn_pci_suspend;
69 static device_resume_t rtwn_pci_resume;
70
71 static int rtwn_pci_alloc_rx_list(struct rtwn_softc *);
72 static void rtwn_pci_reset_rx_list(struct rtwn_softc *);
73 static void rtwn_pci_free_rx_list(struct rtwn_softc *);
74 static int rtwn_pci_alloc_tx_list(struct rtwn_softc *, int);
75 static void rtwn_pci_reset_tx_ring_stopped(struct rtwn_softc *, int);
76 static void rtwn_pci_reset_beacon_ring(struct rtwn_softc *, int);
77 static void rtwn_pci_reset_tx_list(struct rtwn_softc *,
78 struct ieee80211vap *, int);
79 static void rtwn_pci_free_tx_list(struct rtwn_softc *, int);
80 static void rtwn_pci_reset_lists(struct rtwn_softc *,
81 struct ieee80211vap *);
82 static int rtwn_pci_fw_write_block(struct rtwn_softc *,
83 const uint8_t *, uint16_t, int);
84 static uint16_t rtwn_pci_get_qmap(struct rtwn_softc *);
85 static void rtwn_pci_set_desc_addr(struct rtwn_softc *);
86 static void rtwn_pci_beacon_update_begin(struct rtwn_softc *,
87 struct ieee80211vap *);
88 static void rtwn_pci_beacon_update_end(struct rtwn_softc *,
89 struct ieee80211vap *);
90 static void rtwn_pci_attach_methods(struct rtwn_softc *);
91
92 static const struct rtwn_pci_ident *
rtwn_pci_probe_sub(device_t dev)93 rtwn_pci_probe_sub(device_t dev)
94 {
95 int i, vendor_id, device_id;
96
97 vendor_id = pci_get_vendor(dev);
98 device_id = pci_get_device(dev);
99
100 for (i = 0; i < nitems(rtwn_pci_ident_table); i++) {
101 if (vendor_id == rtwn_pci_ident_table[i].vendor &&
102 device_id == rtwn_pci_ident_table[i].device)
103 return (&rtwn_pci_ident_table[i]);
104 }
105
106 return (NULL);
107 }
108
109 static int
rtwn_pci_probe(device_t dev)110 rtwn_pci_probe(device_t dev)
111 {
112 const struct rtwn_pci_ident *ident;
113
114 ident = rtwn_pci_probe_sub(dev);
115 if (ident != NULL) {
116 device_set_desc(dev, ident->name);
117 return (BUS_PROBE_DEFAULT);
118 }
119 return (ENXIO);
120 }
121
122 static int
rtwn_pci_alloc_rx_list(struct rtwn_softc * sc)123 rtwn_pci_alloc_rx_list(struct rtwn_softc *sc)
124 {
125 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
126 struct rtwn_rx_ring *rx_ring = &pc->rx_ring;
127 struct rtwn_rx_data *rx_data;
128 bus_size_t size;
129 int i, error;
130
131 /* Allocate Rx descriptors. */
132 size = sizeof(struct rtwn_rx_stat_pci) * RTWN_PCI_RX_LIST_COUNT;
133 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
134 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
135 size, 1, size, 0, NULL, NULL, &rx_ring->desc_dmat);
136 if (error != 0) {
137 device_printf(sc->sc_dev, "could not create rx desc DMA tag\n");
138 goto fail;
139 }
140
141 error = bus_dmamem_alloc(rx_ring->desc_dmat, (void **)&rx_ring->desc,
142 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT,
143 &rx_ring->desc_map);
144 if (error != 0) {
145 device_printf(sc->sc_dev, "could not allocate rx desc\n");
146 goto fail;
147 }
148 error = bus_dmamap_load(rx_ring->desc_dmat, rx_ring->desc_map,
149 rx_ring->desc, size, rtwn_pci_dma_map_addr, &rx_ring->paddr, 0);
150 if (error != 0) {
151 device_printf(sc->sc_dev, "could not load rx desc DMA map\n");
152 goto fail;
153 }
154 bus_dmamap_sync(rx_ring->desc_dmat, rx_ring->desc_map,
155 BUS_DMASYNC_PREWRITE);
156
157 /* Create RX buffer DMA tag. */
158 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
159 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
160 MJUMPAGESIZE, 1, MJUMPAGESIZE, 0, NULL, NULL, &rx_ring->data_dmat);
161 if (error != 0) {
162 device_printf(sc->sc_dev, "could not create rx buf DMA tag\n");
163 goto fail;
164 }
165
166 /* Allocate Rx buffers. */
167 for (i = 0; i < RTWN_PCI_RX_LIST_COUNT; i++) {
168 rx_data = &rx_ring->rx_data[i];
169 error = bus_dmamap_create(rx_ring->data_dmat, 0, &rx_data->map);
170 if (error != 0) {
171 device_printf(sc->sc_dev,
172 "could not create rx buf DMA map\n");
173 goto fail;
174 }
175
176 rx_data->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
177 MJUMPAGESIZE);
178 if (rx_data->m == NULL) {
179 device_printf(sc->sc_dev,
180 "could not allocate rx mbuf\n");
181 error = ENOMEM;
182 goto fail;
183 }
184
185 error = bus_dmamap_load(rx_ring->data_dmat, rx_data->map,
186 mtod(rx_data->m, void *), MJUMPAGESIZE,
187 rtwn_pci_dma_map_addr, &rx_data->paddr, BUS_DMA_NOWAIT);
188 if (error != 0) {
189 device_printf(sc->sc_dev,
190 "could not load rx buf DMA map");
191 goto fail;
192 }
193
194 rtwn_pci_setup_rx_desc(pc, &rx_ring->desc[i], rx_data->paddr,
195 MJUMPAGESIZE, i);
196 }
197 rx_ring->cur = 0;
198
199 return (0);
200
201 fail:
202 rtwn_pci_free_rx_list(sc);
203 return (error);
204 }
205
206 static void
rtwn_pci_reset_rx_list(struct rtwn_softc * sc)207 rtwn_pci_reset_rx_list(struct rtwn_softc *sc)
208 {
209 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
210 struct rtwn_rx_ring *rx_ring = &pc->rx_ring;
211 struct rtwn_rx_data *rx_data;
212 int i;
213
214 for (i = 0; i < RTWN_PCI_RX_LIST_COUNT; i++) {
215 rx_data = &rx_ring->rx_data[i];
216 rtwn_pci_setup_rx_desc(pc, &rx_ring->desc[i],
217 rx_data->paddr, MJUMPAGESIZE, i);
218 }
219 rx_ring->cur = 0;
220 }
221
222 static void
rtwn_pci_free_rx_list(struct rtwn_softc * sc)223 rtwn_pci_free_rx_list(struct rtwn_softc *sc)
224 {
225 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
226 struct rtwn_rx_ring *rx_ring = &pc->rx_ring;
227 struct rtwn_rx_data *rx_data;
228 int i;
229
230 if (rx_ring->desc_dmat != NULL) {
231 if (rx_ring->desc != NULL) {
232 bus_dmamap_sync(rx_ring->desc_dmat,
233 rx_ring->desc_map,
234 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
235 bus_dmamap_unload(rx_ring->desc_dmat,
236 rx_ring->desc_map);
237 bus_dmamem_free(rx_ring->desc_dmat, rx_ring->desc,
238 rx_ring->desc_map);
239 rx_ring->desc = NULL;
240 }
241 bus_dma_tag_destroy(rx_ring->desc_dmat);
242 rx_ring->desc_dmat = NULL;
243 }
244
245 for (i = 0; i < RTWN_PCI_RX_LIST_COUNT; i++) {
246 rx_data = &rx_ring->rx_data[i];
247
248 if (rx_data->m != NULL) {
249 bus_dmamap_sync(rx_ring->data_dmat,
250 rx_data->map, BUS_DMASYNC_POSTREAD);
251 bus_dmamap_unload(rx_ring->data_dmat, rx_data->map);
252 m_freem(rx_data->m);
253 rx_data->m = NULL;
254 }
255 bus_dmamap_destroy(rx_ring->data_dmat, rx_data->map);
256 rx_data->map = NULL;
257 }
258 if (rx_ring->data_dmat != NULL) {
259 bus_dma_tag_destroy(rx_ring->data_dmat);
260 rx_ring->data_dmat = NULL;
261 }
262 }
263
264 static int
rtwn_pci_alloc_tx_list(struct rtwn_softc * sc,int qid)265 rtwn_pci_alloc_tx_list(struct rtwn_softc *sc, int qid)
266 {
267 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
268 struct rtwn_tx_ring *tx_ring = &pc->tx_ring[qid];
269 bus_size_t size;
270 int i, error;
271
272 size = sc->txdesc_len * RTWN_PCI_TX_LIST_COUNT;
273 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), PAGE_SIZE, 0,
274 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
275 size, 1, size, 0, NULL, NULL, &tx_ring->desc_dmat);
276 if (error != 0) {
277 device_printf(sc->sc_dev, "could not create tx ring DMA tag\n");
278 goto fail;
279 }
280
281 error = bus_dmamem_alloc(tx_ring->desc_dmat, &tx_ring->desc,
282 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &tx_ring->desc_map);
283 if (error != 0) {
284 device_printf(sc->sc_dev, "can't map tx ring DMA memory\n");
285 goto fail;
286 }
287 error = bus_dmamap_load(tx_ring->desc_dmat, tx_ring->desc_map,
288 tx_ring->desc, size, rtwn_pci_dma_map_addr, &tx_ring->paddr,
289 BUS_DMA_NOWAIT);
290 if (error != 0) {
291 device_printf(sc->sc_dev, "could not load desc DMA map\n");
292 goto fail;
293 }
294 bus_dmamap_sync(tx_ring->desc_dmat, tx_ring->desc_map,
295 BUS_DMASYNC_PREWRITE);
296
297 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
298 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
299 MJUMPAGESIZE, 1, MJUMPAGESIZE, 0, NULL, NULL, &tx_ring->data_dmat);
300 if (error != 0) {
301 device_printf(sc->sc_dev, "could not create tx buf DMA tag\n");
302 goto fail;
303 }
304
305 for (i = 0; i < RTWN_PCI_TX_LIST_COUNT; i++) {
306 struct rtwn_tx_data *tx_data = &tx_ring->tx_data[i];
307 void *tx_desc = (uint8_t *)tx_ring->desc + sc->txdesc_len * i;
308 uint32_t next_desc_addr = tx_ring->paddr +
309 sc->txdesc_len * ((i + 1) % RTWN_PCI_TX_LIST_COUNT);
310
311 rtwn_pci_setup_tx_desc(pc, tx_desc, next_desc_addr);
312
313 error = bus_dmamap_create(tx_ring->data_dmat, 0, &tx_data->map);
314 if (error != 0) {
315 device_printf(sc->sc_dev,
316 "could not create tx buf DMA map\n");
317 return (error);
318 }
319 tx_data->m = NULL;
320 tx_data->ni = NULL;
321 }
322 return (0);
323
324 fail:
325 rtwn_pci_free_tx_list(sc, qid);
326 return (error);
327 }
328
329 static void
rtwn_pci_reset_tx_ring_stopped(struct rtwn_softc * sc,int qid)330 rtwn_pci_reset_tx_ring_stopped(struct rtwn_softc *sc, int qid)
331 {
332 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
333 struct rtwn_tx_ring *ring = &pc->tx_ring[qid];
334 int i;
335
336 for (i = 0; i < RTWN_PCI_TX_LIST_COUNT; i++) {
337 struct rtwn_tx_data *data = &ring->tx_data[i];
338 void *desc = (uint8_t *)ring->desc + sc->txdesc_len * i;
339
340 rtwn_pci_copy_tx_desc(pc, desc, NULL);
341
342 if (data->m != NULL) {
343 bus_dmamap_sync(ring->data_dmat, data->map,
344 BUS_DMASYNC_POSTWRITE);
345 bus_dmamap_unload(ring->data_dmat, data->map);
346 m_freem(data->m);
347 data->m = NULL;
348 }
349 if (data->ni != NULL) {
350 ieee80211_free_node(data->ni);
351 data->ni = NULL;
352 }
353 }
354
355 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
356 BUS_DMASYNC_POSTWRITE);
357
358 sc->qfullmsk &= ~(1 << qid);
359 ring->queued = 0;
360 ring->last = ring->cur = 0;
361 }
362
363 /*
364 * Clear entry 0 (or 1) in the beacon queue (other are not used).
365 */
366 static void
rtwn_pci_reset_beacon_ring(struct rtwn_softc * sc,int id)367 rtwn_pci_reset_beacon_ring(struct rtwn_softc *sc, int id)
368 {
369 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
370 struct rtwn_tx_ring *ring = &pc->tx_ring[RTWN_PCI_BEACON_QUEUE];
371 struct rtwn_tx_data *data = &ring->tx_data[id];
372 struct rtwn_tx_desc_common *txd = (struct rtwn_tx_desc_common *)
373 ((uint8_t *)ring->desc + id * sc->txdesc_len);
374
375 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_POSTREAD);
376 if (txd->flags0 & RTWN_FLAGS0_OWN) {
377 /* Clear OWN bit. */
378 txd->flags0 &= ~RTWN_FLAGS0_OWN;
379 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
380 BUS_DMASYNC_PREWRITE);
381
382 /* Unload mbuf. */
383 bus_dmamap_sync(ring->data_dmat, data->map,
384 BUS_DMASYNC_POSTWRITE);
385 bus_dmamap_unload(ring->data_dmat, data->map);
386 }
387 }
388
389 /*
390 * Drop stale entries from Tx ring before the vap will be deleted.
391 * In case if vap is NULL just free everything and reset cur / last pointers.
392 */
393 static void
rtwn_pci_reset_tx_list(struct rtwn_softc * sc,struct ieee80211vap * vap,int qid)394 rtwn_pci_reset_tx_list(struct rtwn_softc *sc, struct ieee80211vap *vap,
395 int qid)
396 {
397 int i;
398
399 if (vap == NULL) {
400 if (qid != RTWN_PCI_BEACON_QUEUE) {
401 /*
402 * Device was stopped; just clear all entries.
403 */
404 rtwn_pci_reset_tx_ring_stopped(sc, qid);
405 } else {
406 for (i = 0; i < RTWN_PORT_COUNT; i++)
407 rtwn_pci_reset_beacon_ring(sc, i);
408 }
409 } else if (qid == RTWN_PCI_BEACON_QUEUE &&
410 (vap->iv_opmode == IEEE80211_M_HOSTAP ||
411 vap->iv_opmode == IEEE80211_M_IBSS)) {
412 struct rtwn_vap *uvp = RTWN_VAP(vap);
413
414 rtwn_pci_reset_beacon_ring(sc, uvp->id);
415 } else {
416 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
417 struct rtwn_tx_ring *ring = &pc->tx_ring[qid];
418
419 for (i = 0; i < RTWN_PCI_TX_LIST_COUNT; i++) {
420 struct rtwn_tx_data *data = &ring->tx_data[i];
421 if (data->ni != NULL && data->ni->ni_vap == vap) {
422 /*
423 * NB: if some vap is still running
424 * rtwn_pci_tx_done() will free the mbuf;
425 * otherwise, rtwn_stop() will reset all rings
426 * after device shutdown.
427 */
428 ieee80211_free_node(data->ni);
429 data->ni = NULL;
430 }
431 }
432 }
433 }
434
435 static void
rtwn_pci_free_tx_list(struct rtwn_softc * sc,int qid)436 rtwn_pci_free_tx_list(struct rtwn_softc *sc, int qid)
437 {
438 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
439 struct rtwn_tx_ring *tx_ring = &pc->tx_ring[qid];
440 struct rtwn_tx_data *tx_data;
441 int i;
442
443 if (tx_ring->desc_dmat != NULL) {
444 if (tx_ring->desc != NULL) {
445 bus_dmamap_sync(tx_ring->desc_dmat,
446 tx_ring->desc_map, BUS_DMASYNC_POSTWRITE);
447 bus_dmamap_unload(tx_ring->desc_dmat,
448 tx_ring->desc_map);
449 bus_dmamem_free(tx_ring->desc_dmat, tx_ring->desc,
450 tx_ring->desc_map);
451 }
452 bus_dma_tag_destroy(tx_ring->desc_dmat);
453 }
454
455 for (i = 0; i < RTWN_PCI_TX_LIST_COUNT; i++) {
456 tx_data = &tx_ring->tx_data[i];
457
458 if (tx_data->m != NULL) {
459 bus_dmamap_sync(tx_ring->data_dmat, tx_data->map,
460 BUS_DMASYNC_POSTWRITE);
461 bus_dmamap_unload(tx_ring->data_dmat, tx_data->map);
462 m_freem(tx_data->m);
463 tx_data->m = NULL;
464 }
465 }
466 if (tx_ring->data_dmat != NULL) {
467 bus_dma_tag_destroy(tx_ring->data_dmat);
468 tx_ring->data_dmat = NULL;
469 }
470
471 sc->qfullmsk &= ~(1 << qid);
472 tx_ring->queued = 0;
473 tx_ring->last = tx_ring->cur = 0;
474 }
475
476 static void
rtwn_pci_reset_lists(struct rtwn_softc * sc,struct ieee80211vap * vap)477 rtwn_pci_reset_lists(struct rtwn_softc *sc, struct ieee80211vap *vap)
478 {
479 int i;
480
481 for (i = 0; i < RTWN_PCI_NTXQUEUES; i++)
482 rtwn_pci_reset_tx_list(sc, vap, i);
483
484 if (vap == NULL) {
485 sc->qfullmsk = 0;
486 rtwn_pci_reset_rx_list(sc);
487 }
488 }
489
490 static int
rtwn_pci_fw_write_block(struct rtwn_softc * sc,const uint8_t * buf,uint16_t reg,int mlen)491 rtwn_pci_fw_write_block(struct rtwn_softc *sc, const uint8_t *buf,
492 uint16_t reg, int mlen)
493 {
494 int i;
495
496 for (i = 0; i < mlen; i++)
497 rtwn_pci_write_1(sc, reg++, buf[i]);
498
499 /* NB: cannot fail */
500 return (0);
501 }
502
503 static uint16_t
rtwn_pci_get_qmap(struct rtwn_softc * sc)504 rtwn_pci_get_qmap(struct rtwn_softc *sc)
505 {
506 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
507
508 KASSERT(pc->pc_qmap != 0, ("%s: qmap is not set!\n", __func__));
509
510 return (pc->pc_qmap);
511 }
512
513 static void
rtwn_pci_set_desc_addr(struct rtwn_softc * sc)514 rtwn_pci_set_desc_addr(struct rtwn_softc *sc)
515 {
516 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
517
518 RTWN_DPRINTF(sc, RTWN_DEBUG_RESET, "%s: addresses:\n"
519 "bk: %08jX, be: %08jX, vi: %08jX, vo: %08jX\n"
520 "bcn: %08jX, mgt: %08jX, high: %08jX, rx: %08jX\n",
521 __func__, (uintmax_t)pc->tx_ring[RTWN_PCI_BK_QUEUE].paddr,
522 (uintmax_t)pc->tx_ring[RTWN_PCI_BE_QUEUE].paddr,
523 (uintmax_t)pc->tx_ring[RTWN_PCI_VI_QUEUE].paddr,
524 (uintmax_t)pc->tx_ring[RTWN_PCI_VO_QUEUE].paddr,
525 (uintmax_t)pc->tx_ring[RTWN_PCI_BEACON_QUEUE].paddr,
526 (uintmax_t)pc->tx_ring[RTWN_PCI_MGNT_QUEUE].paddr,
527 (uintmax_t)pc->tx_ring[RTWN_PCI_HIGH_QUEUE].paddr,
528 (uintmax_t)pc->rx_ring.paddr);
529
530 /* Set Tx Configuration Register. */
531 rtwn_pci_write_4(sc, R92C_TCR, pc->tcr);
532
533 /* Configure Tx DMA. */
534 rtwn_pci_write_4(sc, R92C_BKQ_DESA,
535 pc->tx_ring[RTWN_PCI_BK_QUEUE].paddr);
536 rtwn_pci_write_4(sc, R92C_BEQ_DESA,
537 pc->tx_ring[RTWN_PCI_BE_QUEUE].paddr);
538 rtwn_pci_write_4(sc, R92C_VIQ_DESA,
539 pc->tx_ring[RTWN_PCI_VI_QUEUE].paddr);
540 rtwn_pci_write_4(sc, R92C_VOQ_DESA,
541 pc->tx_ring[RTWN_PCI_VO_QUEUE].paddr);
542 rtwn_pci_write_4(sc, R92C_BCNQ_DESA,
543 pc->tx_ring[RTWN_PCI_BEACON_QUEUE].paddr);
544 rtwn_pci_write_4(sc, R92C_MGQ_DESA,
545 pc->tx_ring[RTWN_PCI_MGNT_QUEUE].paddr);
546 rtwn_pci_write_4(sc, R92C_HQ_DESA,
547 pc->tx_ring[RTWN_PCI_HIGH_QUEUE].paddr);
548
549 /* Configure Rx DMA. */
550 rtwn_pci_write_4(sc, R92C_RX_DESA, pc->rx_ring.paddr);
551 }
552
553 static void
rtwn_pci_beacon_update_begin(struct rtwn_softc * sc,struct ieee80211vap * vap)554 rtwn_pci_beacon_update_begin(struct rtwn_softc *sc, struct ieee80211vap *vap)
555 {
556 struct rtwn_vap *rvp = RTWN_VAP(vap);
557
558 RTWN_ASSERT_LOCKED(sc);
559
560 rtwn_beacon_enable(sc, rvp->id, 0);
561 }
562
563 static void
rtwn_pci_beacon_update_end(struct rtwn_softc * sc,struct ieee80211vap * vap)564 rtwn_pci_beacon_update_end(struct rtwn_softc *sc, struct ieee80211vap *vap)
565 {
566 struct rtwn_vap *rvp = RTWN_VAP(vap);
567
568 RTWN_ASSERT_LOCKED(sc);
569
570 if (rvp->curr_mode != R92C_MSR_NOLINK)
571 rtwn_beacon_enable(sc, rvp->id, 1);
572 }
573
574 static void
rtwn_pci_attach_methods(struct rtwn_softc * sc)575 rtwn_pci_attach_methods(struct rtwn_softc *sc)
576 {
577 sc->sc_write_1 = rtwn_pci_write_1;
578 sc->sc_write_2 = rtwn_pci_write_2;
579 sc->sc_write_4 = rtwn_pci_write_4;
580 sc->sc_read_1 = rtwn_pci_read_1;
581 sc->sc_read_2 = rtwn_pci_read_2;
582 sc->sc_read_4 = rtwn_pci_read_4;
583 sc->sc_delay = rtwn_pci_delay;
584 sc->sc_tx_start = rtwn_pci_tx_start;
585 sc->sc_reset_lists = rtwn_pci_reset_lists;
586 sc->sc_abort_xfers = rtwn_nop_softc;
587 sc->sc_fw_write_block = rtwn_pci_fw_write_block;
588 sc->sc_get_qmap = rtwn_pci_get_qmap;
589 sc->sc_set_desc_addr = rtwn_pci_set_desc_addr;
590 sc->sc_drop_incorrect_tx = rtwn_nop_softc;
591 sc->sc_beacon_update_begin = rtwn_pci_beacon_update_begin;
592 sc->sc_beacon_update_end = rtwn_pci_beacon_update_end;
593 sc->sc_beacon_unload = rtwn_pci_reset_beacon_ring;
594
595 sc->bcn_check_interval = 25000;
596 }
597
598 static int
rtwn_pci_attach(device_t dev)599 rtwn_pci_attach(device_t dev)
600 {
601 const struct rtwn_pci_ident *ident;
602 struct rtwn_pci_softc *pc = device_get_softc(dev);
603 struct rtwn_softc *sc = &pc->pc_sc;
604 struct ieee80211com *ic = &sc->sc_ic;
605 uint32_t lcsr;
606 int cap_off, i, error, rid;
607
608 ident = rtwn_pci_probe_sub(dev);
609 if (ident == NULL)
610 return (ENXIO);
611
612 /*
613 * Get the offset of the PCI Express Capability Structure in PCI
614 * Configuration Space.
615 */
616 error = pci_find_cap(dev, PCIY_EXPRESS, &cap_off);
617 if (error != 0) {
618 device_printf(dev, "PCIe capability structure not found!\n");
619 return (error);
620 }
621
622 /* Enable bus-mastering. */
623 pci_enable_busmaster(dev);
624
625 rid = PCIR_BAR(2);
626 pc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
627 RF_ACTIVE);
628 if (pc->mem == NULL) {
629 device_printf(dev, "can't map mem space\n");
630 return (ENOMEM);
631 }
632 pc->pc_st = rman_get_bustag(pc->mem);
633 pc->pc_sh = rman_get_bushandle(pc->mem);
634
635 /* Install interrupt handler. */
636 rid = 1;
637 if (pci_alloc_msi(dev, &rid) == 0)
638 rid = 1;
639 else
640 rid = 0;
641 pc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
642 (rid != 0 ? 0 : RF_SHAREABLE));
643 if (pc->irq == NULL) {
644 device_printf(dev, "can't map interrupt\n");
645 goto detach;
646 }
647
648 /* Disable PCIe Active State Power Management (ASPM). */
649 lcsr = pci_read_config(dev, cap_off + PCIER_LINK_CTL, 4);
650 lcsr &= ~PCIEM_LINK_CTL_ASPMC;
651 pci_write_config(dev, cap_off + PCIER_LINK_CTL, lcsr, 4);
652
653 sc->sc_dev = dev;
654 ic->ic_name = device_get_nameunit(dev);
655
656 /* Need to be initialized early. */
657 rtwn_sysctlattach(sc);
658 mtx_init(&sc->sc_mtx, ic->ic_name, MTX_NETWORK_LOCK, MTX_DEF);
659
660 rtwn_pci_attach_methods(sc);
661 rtwn_pci_attach_private(pc, ident->chip);
662
663 /* Allocate Tx/Rx buffers. */
664 error = rtwn_pci_alloc_rx_list(sc);
665 if (error != 0) {
666 device_printf(dev,
667 "could not allocate Rx buffers, error %d\n",
668 error);
669 goto detach;
670 }
671 for (i = 0; i < RTWN_PCI_NTXQUEUES; i++) {
672 error = rtwn_pci_alloc_tx_list(sc, i);
673 if (error != 0) {
674 device_printf(dev,
675 "could not allocate Tx buffers, error %d\n",
676 error);
677 goto detach;
678 }
679 }
680
681 /* Generic attach. */
682 error = rtwn_attach(sc);
683 if (error != 0)
684 goto detach;
685
686 /*
687 * Hook our interrupt after all initialization is complete.
688 */
689 error = bus_setup_intr(dev, pc->irq, INTR_TYPE_NET | INTR_MPSAFE,
690 NULL, rtwn_pci_intr, sc, &pc->pc_ih);
691 if (error != 0) {
692 device_printf(dev, "can't establish interrupt, error %d\n",
693 error);
694 goto detach;
695 }
696
697 return (0);
698
699 detach:
700 rtwn_pci_detach(dev); /* failure */
701 return (ENXIO);
702 }
703
704 static int
rtwn_pci_detach(device_t dev)705 rtwn_pci_detach(device_t dev)
706 {
707 struct rtwn_pci_softc *pc = device_get_softc(dev);
708 struct rtwn_softc *sc = &pc->pc_sc;
709 int i;
710
711 /* Generic detach. */
712 rtwn_detach(sc);
713
714 /* Uninstall interrupt handler. */
715 if (pc->irq != NULL) {
716 bus_teardown_intr(dev, pc->irq, pc->pc_ih);
717 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(pc->irq),
718 pc->irq);
719 pci_release_msi(dev);
720 }
721
722 /* Free Tx/Rx buffers. */
723 for (i = 0; i < RTWN_PCI_NTXQUEUES; i++)
724 rtwn_pci_free_tx_list(sc, i);
725 rtwn_pci_free_rx_list(sc);
726
727 if (pc->mem != NULL)
728 bus_release_resource(dev, SYS_RES_MEMORY,
729 rman_get_rid(pc->mem), pc->mem);
730
731 rtwn_detach_private(sc);
732 mtx_destroy(&sc->sc_mtx);
733
734 return (0);
735 }
736
737 static int
rtwn_pci_shutdown(device_t self)738 rtwn_pci_shutdown(device_t self)
739 {
740 struct rtwn_pci_softc *pc = device_get_softc(self);
741
742 ieee80211_stop_all(&pc->pc_sc.sc_ic);
743 return (0);
744 }
745
746 static int
rtwn_pci_suspend(device_t self)747 rtwn_pci_suspend(device_t self)
748 {
749 struct rtwn_pci_softc *pc = device_get_softc(self);
750
751 rtwn_suspend(&pc->pc_sc);
752
753 return (0);
754 }
755
756 static int
rtwn_pci_resume(device_t self)757 rtwn_pci_resume(device_t self)
758 {
759 struct rtwn_pci_softc *pc = device_get_softc(self);
760
761 rtwn_resume(&pc->pc_sc);
762
763 return (0);
764 }
765
766 static device_method_t rtwn_pci_methods[] = {
767 /* Device interface */
768 DEVMETHOD(device_probe, rtwn_pci_probe),
769 DEVMETHOD(device_attach, rtwn_pci_attach),
770 DEVMETHOD(device_detach, rtwn_pci_detach),
771 DEVMETHOD(device_shutdown, rtwn_pci_shutdown),
772 DEVMETHOD(device_suspend, rtwn_pci_suspend),
773 DEVMETHOD(device_resume, rtwn_pci_resume),
774
775 DEVMETHOD_END
776 };
777
778 static driver_t rtwn_pci_driver = {
779 "rtwn",
780 rtwn_pci_methods,
781 sizeof(struct rtwn_pci_softc)
782 };
783
784 static devclass_t rtwn_pci_devclass;
785
786 DRIVER_MODULE(rtwn_pci, pci, rtwn_pci_driver, rtwn_pci_devclass, NULL, NULL);
787 MODULE_VERSION(rtwn_pci, 1);
788 MODULE_PNP_INFO("U16:vendor;U16:device;D:#", pci, rtwn, rtwn_pci_ident_table,
789 nitems(rtwn_pci_ident_table));
790 MODULE_DEPEND(rtwn_pci, pci, 1, 1, 1);
791 MODULE_DEPEND(rtwn_pci, wlan, 1, 1, 1);
792 MODULE_DEPEND(rtwn_pci, rtwn, 2, 2, 2);
793