1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2019 Ruslan Bukin <br@bsdpad.com>
5 *
6 * This software was developed by SRI International and the University of
7 * Cambridge Computer Laboratory (Department of Computer Science and
8 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
9 * DARPA SSITH research programme.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 #include "opt_hwpmc_hooks.h"
35
36 #include <sys/param.h>
37 #include <sys/pmckern.h>
38
39 #include <dev/hwpmc/hwpmc_beri.h>
40
41 #define BERI_NCOUNTERS 56
42 #define BERI_PMC_CAPS (PMC_CAP_USER | PMC_CAP_SYSTEM | \
43 PMC_CAP_READ | PMC_CAP_WRITE )
44
45 struct beri_event_code_map {
46 uint32_t pe_ev; /* enum value */
47 uint64_t (*get_func)(void);
48 };
49
50 const struct beri_event_code_map beri_event_codes[BERI_NCOUNTERS] = {
51 { PMC_EV_BERI_CYCLE,
52 statcounters_get_cycle_count },
53 { PMC_EV_BERI_INST,
54 statcounters_get_inst_count },
55 { PMC_EV_BERI_INST_USER,
56 statcounters_get_inst_user_count },
57 { PMC_EV_BERI_INST_KERNEL,
58 statcounters_get_inst_kernel_count },
59 { PMC_EV_BERI_IMPRECISE_SETBOUNDS,
60 statcounters_get_imprecise_setbounds_count },
61 { PMC_EV_BERI_UNREPRESENTABLE_CAPS,
62 statcounters_get_unrepresentable_caps_count },
63 { PMC_EV_BERI_ITLB_MISS,
64 statcounters_get_itlb_miss_count },
65 { PMC_EV_BERI_DTLB_MISS,
66 statcounters_get_dtlb_miss_count },
67 { PMC_EV_BERI_ICACHE_WRITE_HIT,
68 statcounters_get_icache_write_hit_count },
69 { PMC_EV_BERI_ICACHE_WRITE_MISS,
70 statcounters_get_icache_write_miss_count },
71 { PMC_EV_BERI_ICACHE_READ_HIT,
72 statcounters_get_icache_read_hit_count },
73 { PMC_EV_BERI_ICACHE_READ_MISS,
74 statcounters_get_icache_read_miss_count },
75 { PMC_EV_BERI_ICACHE_EVICT,
76 statcounters_get_icache_evict_count },
77 { PMC_EV_BERI_DCACHE_WRITE_HIT,
78 statcounters_get_dcache_write_hit_count },
79 { PMC_EV_BERI_DCACHE_WRITE_MISS,
80 statcounters_get_dcache_write_miss_count },
81 { PMC_EV_BERI_DCACHE_READ_HIT,
82 statcounters_get_dcache_read_hit_count },
83 { PMC_EV_BERI_DCACHE_READ_MISS,
84 statcounters_get_dcache_read_miss_count },
85 { PMC_EV_BERI_DCACHE_EVICT,
86 statcounters_get_dcache_evict_count },
87 { PMC_EV_BERI_DCACHE_SET_TAG_WRITE,
88 statcounters_get_dcache_set_tag_write_count },
89 { PMC_EV_BERI_DCACHE_SET_TAG_READ,
90 statcounters_get_dcache_set_tag_read_count },
91 { PMC_EV_BERI_L2CACHE_WRITE_HIT,
92 statcounters_get_l2cache_write_hit_count },
93 { PMC_EV_BERI_L2CACHE_WRITE_MISS,
94 statcounters_get_l2cache_write_miss_count },
95 { PMC_EV_BERI_L2CACHE_READ_HIT,
96 statcounters_get_l2cache_read_hit_count },
97 { PMC_EV_BERI_L2CACHE_READ_MISS,
98 statcounters_get_l2cache_read_miss_count },
99 { PMC_EV_BERI_L2CACHE_EVICT,
100 statcounters_get_l2cache_evict_count },
101 { PMC_EV_BERI_L2CACHE_SET_TAG_WRITE,
102 statcounters_get_l2cache_set_tag_write_count },
103 { PMC_EV_BERI_L2CACHE_SET_TAG_READ,
104 statcounters_get_l2cache_set_tag_read_count },
105 { PMC_EV_BERI_MEM_BYTE_READ,
106 statcounters_get_mem_byte_read_count },
107 { PMC_EV_BERI_MEM_BYTE_WRITE,
108 statcounters_get_mem_byte_write_count },
109 { PMC_EV_BERI_MEM_HWORD_READ,
110 statcounters_get_mem_hword_read_count },
111 { PMC_EV_BERI_MEM_HWORD_WRITE,
112 statcounters_get_mem_hword_write_count },
113 { PMC_EV_BERI_MEM_WORD_READ,
114 statcounters_get_mem_word_read_count },
115 { PMC_EV_BERI_MEM_WORD_WRITE,
116 statcounters_get_mem_word_write_count },
117 { PMC_EV_BERI_MEM_DWORD_READ,
118 statcounters_get_mem_dword_read_count },
119 { PMC_EV_BERI_MEM_DWORD_WRITE,
120 statcounters_get_mem_dword_write_count },
121 { PMC_EV_BERI_MEM_CAP_READ,
122 statcounters_get_mem_cap_read_count },
123 { PMC_EV_BERI_MEM_CAP_WRITE,
124 statcounters_get_mem_cap_write_count },
125 { PMC_EV_BERI_MEM_CAP_READ_TAG_SET,
126 statcounters_get_mem_cap_read_tag_set_count },
127 { PMC_EV_BERI_MEM_CAP_WRITE_TAG_SET,
128 statcounters_get_mem_cap_write_tag_set_count },
129 { PMC_EV_BERI_TAGCACHE_WRITE_HIT,
130 statcounters_get_tagcache_write_hit_count },
131 { PMC_EV_BERI_TAGCACHE_WRITE_MISS,
132 statcounters_get_tagcache_write_miss_count },
133 { PMC_EV_BERI_TAGCACHE_READ_HIT,
134 statcounters_get_tagcache_read_hit_count },
135 { PMC_EV_BERI_TAGCACHE_READ_MISS,
136 statcounters_get_tagcache_read_miss_count },
137 { PMC_EV_BERI_TAGCACHE_EVICT,
138 statcounters_get_tagcache_evict_count },
139 { PMC_EV_BERI_L2CACHEMASTER_READ_REQ,
140 statcounters_get_l2cachemaster_read_req_count },
141 { PMC_EV_BERI_L2CACHEMASTER_WRITE_REQ,
142 statcounters_get_l2cachemaster_write_req_count },
143 { PMC_EV_BERI_L2CACHEMASTER_WRITE_REQ_FLIT,
144 statcounters_get_l2cachemaster_write_req_flit_count },
145 { PMC_EV_BERI_L2CACHEMASTER_READ_RSP,
146 statcounters_get_l2cachemaster_read_rsp_count },
147 { PMC_EV_BERI_L2CACHEMASTER_READ_RSP_FLIT,
148 statcounters_get_l2cachemaster_read_rsp_flit_count },
149 { PMC_EV_BERI_L2CACHEMASTER_WRITE_RSP,
150 statcounters_get_l2cachemaster_write_rsp_count },
151 { PMC_EV_BERI_TAGCACHEMASTER_READ_REQ,
152 statcounters_get_tagcachemaster_read_req_count },
153 { PMC_EV_BERI_TAGCACHEMASTER_WRITE_REQ,
154 statcounters_get_tagcachemaster_write_req_count },
155 { PMC_EV_BERI_TAGCACHEMASTER_WRITE_REQ_FLIT,
156 statcounters_get_tagcachemaster_write_req_flit_count },
157 { PMC_EV_BERI_TAGCACHEMASTER_READ_RSP,
158 statcounters_get_tagcachemaster_read_rsp_count },
159 { PMC_EV_BERI_TAGCACHEMASTER_READ_RSP_FLIT,
160 statcounters_get_tagcachemaster_read_rsp_flit_count },
161 { PMC_EV_BERI_TAGCACHEMASTER_WRITE_RSP,
162 statcounters_get_tagcachemaster_write_rsp_count },
163 };
164
165 struct mips_pmc_spec beri_pmc_spec = {
166 .ps_cpuclass = PMC_CLASS_BERI,
167 .ps_cputype = PMC_CPU_MIPS_BERI,
168 .ps_capabilities = BERI_PMC_CAPS,
169 .ps_counter_width = 64
170 };
171
172 /*
173 * Per-processor information.
174 */
175 struct beri_cpu {
176 struct pmc_hw *pc_beripmcs;
177 uint64_t start_values[BERI_NCOUNTERS];
178 uint64_t stop_values[BERI_NCOUNTERS];
179 uint64_t saved_values[BERI_NCOUNTERS];
180 };
181
182 int beri_npmcs;
183 static struct beri_cpu **beri_pcpu;
184
185 static int
beri_allocate_pmc(int cpu,int ri,struct pmc * pm,const struct pmc_op_pmcallocate * a)186 beri_allocate_pmc(int cpu, int ri, struct pmc *pm,
187 const struct pmc_op_pmcallocate *a)
188 {
189 uint32_t config;
190 int i;
191
192 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
193 ("[beri,%d] illegal CPU value %d", __LINE__, cpu));
194 KASSERT(ri >= 0 && ri < beri_npmcs,
195 ("[beri,%d] illegal row index %d", __LINE__, ri));
196
197 if (a->pm_class != beri_pmc_spec.ps_cpuclass)
198 return (EINVAL);
199
200 for (i = 0; i < BERI_NCOUNTERS; i++) {
201 if (beri_event_codes[i].pe_ev == a->pm_ev) {
202 config = i;
203 break;
204 }
205 }
206
207 if (i == BERI_NCOUNTERS)
208 return (EINVAL);
209
210 pm->pm_md.pm_mips_evsel = config;
211
212 PMCDBG2(MDP,ALL,2,"beri-allocate ri=%d -> config=0x%x", ri, config);
213
214 return (0);
215 }
216
217 static int
beri_read_pmc(int cpu,int ri,struct pmc * pm,pmc_value_t * v)218 beri_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v)
219 {
220 uint32_t config;
221 pmc_value_t new;
222 pmc_value_t start_val;
223 pmc_value_t stop_val;
224 pmc_value_t saved_val;
225 pmc_value_t result;
226
227 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
228 ("[beri,%d] illegal CPU value %d", __LINE__, cpu));
229 KASSERT(ri >= 0 && ri < beri_npmcs,
230 ("[beri,%d] illegal row index %d", __LINE__, ri));
231
232 config = pm->pm_md.pm_mips_evsel;
233
234 start_val = beri_pcpu[cpu]->start_values[config];
235 if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm))) {
236 stop_val = beri_event_codes[config].get_func();
237 } else
238 stop_val = beri_pcpu[cpu]->stop_values[config];
239
240 if (start_val <= stop_val)
241 result = stop_val - start_val;
242 else {
243 if (config == 0) /* CYCLE counter is 48 bit */
244 result = 0x00ffffffffffffffUL;
245 else
246 result = 0xffffffffffffffffUL;
247 result -= start_val;
248 result += stop_val;
249 }
250
251 saved_val = beri_pcpu[cpu]->saved_values[config];
252
253 *v = result + saved_val;
254
255 return (0);
256 }
257
258 static int
beri_write_pmc(int cpu,int ri,struct pmc * pm,pmc_value_t v)259 beri_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v)
260 {
261 uint32_t config;
262
263 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
264 ("[beri,%d] illegal CPU value %d", __LINE__, cpu));
265 KASSERT(ri >= 0 && ri < beri_npmcs,
266 ("[beri,%d] illegal row-index %d", __LINE__, ri));
267
268 config = pm->pm_md.pm_mips_evsel;
269
270 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
271 v = (1UL << (beri_pmc_spec.ps_counter_width - 1)) - v;
272
273 PMCDBG3(MDP,WRI,1,"beri-write cpu=%d ri=%d v=%jx", cpu, ri, v);
274
275 if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm)))
276 beri_pcpu[cpu]->saved_values[config] = 0;
277 else
278 beri_pcpu[cpu]->saved_values[config] = v;
279
280 return (0);
281 }
282
283 static int
beri_config_pmc(int cpu,int ri,struct pmc * pm)284 beri_config_pmc(int cpu, int ri, struct pmc *pm)
285 {
286 struct pmc_hw *phw;
287
288 PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm);
289
290 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
291 ("[beri,%d] illegal CPU value %d", __LINE__, cpu));
292 KASSERT(ri >= 0 && ri < beri_npmcs,
293 ("[beri,%d] illegal row-index %d", __LINE__, ri));
294
295 phw = &beri_pcpu[cpu]->pc_beripmcs[ri];
296
297 KASSERT(pm == NULL || phw->phw_pmc == NULL,
298 ("[beri,%d] pm=%p phw->pm=%p hwpmc not unconfigured",
299 __LINE__, pm, phw->phw_pmc));
300
301 phw->phw_pmc = pm;
302
303 return (0);
304 }
305
306 static int
beri_start_pmc(int cpu,int ri,struct pmc * pm)307 beri_start_pmc(int cpu, int ri, struct pmc *pm)
308 {
309 uint32_t config;
310 pmc_value_t v;
311
312 config = pm->pm_md.pm_mips_evsel;
313
314 v = beri_event_codes[config].get_func();
315 beri_pcpu[cpu]->start_values[config] = v;
316
317 return (0);
318 }
319
320 static int
beri_stop_pmc(int cpu,int ri,struct pmc * pm)321 beri_stop_pmc(int cpu, int ri, struct pmc *pm)
322 {
323 uint32_t config;
324 pmc_value_t v;
325
326 config = pm->pm_md.pm_mips_evsel;
327
328 v = beri_event_codes[config].get_func();
329 beri_pcpu[cpu]->stop_values[config] = v;
330
331 return (0);
332 }
333
334 static int
beri_release_pmc(int cpu,int ri,struct pmc * pmc)335 beri_release_pmc(int cpu, int ri, struct pmc *pmc)
336 {
337 struct pmc_hw *phw;
338
339 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
340 ("[beri,%d] illegal CPU value %d", __LINE__, cpu));
341 KASSERT(ri >= 0 && ri < beri_npmcs,
342 ("[beri,%d] illegal row-index %d", __LINE__, ri));
343
344 phw = &beri_pcpu[cpu]->pc_beripmcs[ri];
345 KASSERT(phw->phw_pmc == NULL,
346 ("[beri,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc));
347
348 return (0);
349 }
350
351 static int
beri_describe(int cpu,int ri,struct pmc_info * pi,struct pmc ** ppmc)352 beri_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
353 {
354 struct pmc_hw *phw;
355
356 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
357 ("[beri,%d], illegal CPU %d", __LINE__, cpu));
358 KASSERT(ri >= 0 && ri < beri_npmcs,
359 ("[beri,%d] row-index %d out of range", __LINE__, ri));
360
361 phw = &beri_pcpu[cpu]->pc_beripmcs[ri];
362
363 snprintf(pi->pm_name, sizeof(pi->pm_name), "MIPS-%d", ri);
364 pi->pm_class = beri_pmc_spec.ps_cpuclass;
365 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
366 pi->pm_enabled = TRUE;
367 *ppmc = phw->phw_pmc;
368 } else {
369 pi->pm_enabled = FALSE;
370 *ppmc = NULL;
371 }
372
373 return (0);
374 }
375
376 static int
beri_get_config(int cpu,int ri,struct pmc ** ppm)377 beri_get_config(int cpu, int ri, struct pmc **ppm)
378 {
379
380 *ppm = beri_pcpu[cpu]->pc_beripmcs[ri].phw_pmc;
381
382 return (0);
383 }
384
385 static int
beri_pmc_switch_in(struct pmc_cpu * pc,struct pmc_process * pp)386 beri_pmc_switch_in(struct pmc_cpu *pc, struct pmc_process *pp)
387 {
388
389 return (0);
390 }
391
392 static int
beri_pmc_switch_out(struct pmc_cpu * pc,struct pmc_process * pp)393 beri_pmc_switch_out(struct pmc_cpu *pc, struct pmc_process *pp)
394 {
395
396 return (0);
397 }
398
399 static int
beri_pcpu_init(struct pmc_mdep * md,int cpu)400 beri_pcpu_init(struct pmc_mdep *md, int cpu)
401 {
402 int first_ri, i;
403 struct pmc_cpu *pc;
404 struct beri_cpu *pac;
405 struct pmc_hw *phw;
406
407 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
408 ("[beri,%d] wrong cpu number %d", __LINE__, cpu));
409 PMCDBG1(MDP,INI,1,"beri-init cpu=%d", cpu);
410
411 beri_pcpu[cpu] = pac = malloc(sizeof(struct beri_cpu), M_PMC,
412 M_WAITOK|M_ZERO);
413 pac->pc_beripmcs = malloc(sizeof(struct pmc_hw) * beri_npmcs,
414 M_PMC, M_WAITOK|M_ZERO);
415 pc = pmc_pcpu[cpu];
416 first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_MIPS].pcd_ri;
417 KASSERT(pc != NULL, ("[beri,%d] NULL per-cpu pointer", __LINE__));
418
419 for (i = 0, phw = pac->pc_beripmcs; i < beri_npmcs; i++, phw++) {
420 phw->phw_state = PMC_PHW_FLAG_IS_ENABLED |
421 PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(i);
422 phw->phw_pmc = NULL;
423 pc->pc_hwpmcs[i + first_ri] = phw;
424 }
425
426 return (0);
427 }
428
429 static int
beri_pcpu_fini(struct pmc_mdep * md,int cpu)430 beri_pcpu_fini(struct pmc_mdep *md, int cpu)
431 {
432
433 return (0);
434 }
435
436 struct pmc_mdep *
pmc_beri_initialize()437 pmc_beri_initialize()
438 {
439 struct pmc_mdep *pmc_mdep;
440 struct pmc_classdep *pcd;
441
442 snprintf(pmc_cpuid, sizeof(pmc_cpuid), "beri");
443
444 beri_npmcs = 2;
445
446 PMCDBG1(MDP,INI,1,"beri-init npmcs=%d", beri_npmcs);
447
448 /*
449 * Allocate space for pointers to PMC HW descriptors and for
450 * the MDEP structure used by MI code.
451 */
452 beri_pcpu = malloc(sizeof(struct beri_cpu *) * pmc_cpu_max(), M_PMC,
453 M_WAITOK|M_ZERO);
454
455 /* Just one class */
456 pmc_mdep = pmc_mdep_alloc(1);
457
458 pmc_mdep->pmd_cputype = beri_pmc_spec.ps_cputype;
459
460 pcd = &pmc_mdep->pmd_classdep[PMC_MDEP_CLASS_INDEX_MIPS];
461 pcd->pcd_caps = beri_pmc_spec.ps_capabilities;
462 pcd->pcd_class = beri_pmc_spec.ps_cpuclass;
463 pcd->pcd_num = beri_npmcs;
464 pcd->pcd_ri = pmc_mdep->pmd_npmc;
465 pcd->pcd_width = beri_pmc_spec.ps_counter_width;
466
467 pcd->pcd_allocate_pmc = beri_allocate_pmc;
468 pcd->pcd_config_pmc = beri_config_pmc;
469 pcd->pcd_pcpu_fini = beri_pcpu_fini;
470 pcd->pcd_pcpu_init = beri_pcpu_init;
471 pcd->pcd_describe = beri_describe;
472 pcd->pcd_get_config = beri_get_config;
473 pcd->pcd_read_pmc = beri_read_pmc;
474 pcd->pcd_release_pmc = beri_release_pmc;
475 pcd->pcd_start_pmc = beri_start_pmc;
476 pcd->pcd_stop_pmc = beri_stop_pmc;
477 pcd->pcd_write_pmc = beri_write_pmc;
478
479 pmc_mdep->pmd_intr = NULL;
480 pmc_mdep->pmd_switch_in = beri_pmc_switch_in;
481 pmc_mdep->pmd_switch_out = beri_pmc_switch_out;
482
483 pmc_mdep->pmd_npmc += beri_npmcs;
484
485 return (pmc_mdep);
486 }
487
488 void
pmc_beri_finalize(struct pmc_mdep * md)489 pmc_beri_finalize(struct pmc_mdep *md)
490 {
491
492 }
493
494 struct pmc_mdep *
pmc_md_initialize()495 pmc_md_initialize()
496 {
497
498 return (pmc_beri_initialize());
499 }
500
501 void
pmc_md_finalize(struct pmc_mdep * md)502 pmc_md_finalize(struct pmc_mdep *md)
503 {
504
505 return (pmc_beri_finalize(md));
506 }
507
508 int
pmc_save_kernel_callchain(uintptr_t * cc,int nframes,struct trapframe * tf)509 pmc_save_kernel_callchain(uintptr_t *cc, int nframes,
510 struct trapframe *tf)
511 {
512
513 return (0);
514 }
515
516 int
pmc_save_user_callchain(uintptr_t * cc,int nframes,struct trapframe * tf)517 pmc_save_user_callchain(uintptr_t *cc, int nframes,
518 struct trapframe *tf)
519 {
520
521 return (0);
522 }
523