1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2011-2012 Stefan Bethke.
5 * Copyright (c) 2012 Adrian Chadd.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <sys/param.h>
31 #include <sys/bus.h>
32 #include <sys/errno.h>
33 #include <sys/kernel.h>
34 #include <sys/malloc.h>
35 #include <sys/module.h>
36 #include <sys/socket.h>
37 #include <sys/sockio.h>
38 #include <sys/sysctl.h>
39 #include <sys/systm.h>
40
41 #include <net/if.h>
42 #include <net/if_var.h>
43 #include <net/if_arp.h>
44 #include <net/ethernet.h>
45 #include <net/if_dl.h>
46 #include <net/if_media.h>
47 #include <net/if_types.h>
48
49 #include <machine/bus.h>
50 #include <dev/iicbus/iic.h>
51 #include <dev/iicbus/iiconf.h>
52 #include <dev/iicbus/iicbus.h>
53 #include <dev/mii/mii.h>
54 #include <dev/mii/miivar.h>
55 #include <dev/mdio/mdio.h>
56
57 #include <dev/etherswitch/etherswitch.h>
58
59 #include <dev/etherswitch/arswitch/arswitchreg.h>
60 #include <dev/etherswitch/arswitch/arswitchvar.h>
61 #include <dev/etherswitch/arswitch/arswitch_reg.h>
62 #include <dev/etherswitch/arswitch/arswitch_phy.h>
63 #include <dev/etherswitch/arswitch/arswitch_vlans.h>
64
65 #include <dev/etherswitch/arswitch/arswitch_7240.h>
66 #include <dev/etherswitch/arswitch/arswitch_8216.h>
67 #include <dev/etherswitch/arswitch/arswitch_8226.h>
68 #include <dev/etherswitch/arswitch/arswitch_8316.h>
69 #include <dev/etherswitch/arswitch/arswitch_8327.h>
70 #include <dev/etherswitch/arswitch/arswitch_9340.h>
71
72 #include "mdio_if.h"
73 #include "miibus_if.h"
74 #include "etherswitch_if.h"
75
76 /* Map ETHERSWITCH_PORT_LED_* to Atheros pattern codes */
77 static int led_pattern_table[] = {
78 [ETHERSWITCH_PORT_LED_DEFAULT] = 0x3,
79 [ETHERSWITCH_PORT_LED_ON] = 0x2,
80 [ETHERSWITCH_PORT_LED_OFF] = 0x0,
81 [ETHERSWITCH_PORT_LED_BLINK] = 0x1
82 };
83
84 static inline int arswitch_portforphy(int phy);
85 static void arswitch_tick(void *arg);
86 static int arswitch_ifmedia_upd(struct ifnet *);
87 static void arswitch_ifmedia_sts(struct ifnet *, struct ifmediareq *);
88 static int ar8xxx_port_vlan_setup(struct arswitch_softc *sc,
89 etherswitch_port_t *p);
90 static int ar8xxx_port_vlan_get(struct arswitch_softc *sc,
91 etherswitch_port_t *p);
92 static int arswitch_setled(struct arswitch_softc *sc, int phy, int led,
93 int style);
94
95 static int
arswitch_probe(device_t dev)96 arswitch_probe(device_t dev)
97 {
98 struct arswitch_softc *sc;
99 uint32_t id;
100 char *chipname, desc[256];
101
102 sc = device_get_softc(dev);
103 bzero(sc, sizeof(*sc));
104 sc->page = -1;
105
106 /* AR7240 probe */
107 if (ar7240_probe(dev) == 0) {
108 chipname = "AR7240";
109 sc->sc_switchtype = AR8X16_SWITCH_AR7240;
110 sc->is_internal_switch = 1;
111 id = 0;
112 goto done;
113 }
114
115 /* AR9340 probe */
116 if (ar9340_probe(dev) == 0) {
117 chipname = "AR9340";
118 sc->sc_switchtype = AR8X16_SWITCH_AR9340;
119 sc->is_internal_switch = 1;
120 id = 0;
121 goto done;
122 }
123
124 /* AR8xxx probe */
125 id = arswitch_readreg(dev, AR8X16_REG_MASK_CTRL);
126 sc->chip_rev = (id & AR8X16_MASK_CTRL_REV_MASK);
127 sc->chip_ver = (id & AR8X16_MASK_CTRL_VER_MASK) > AR8X16_MASK_CTRL_VER_SHIFT;
128 switch (id & (AR8X16_MASK_CTRL_VER_MASK | AR8X16_MASK_CTRL_REV_MASK)) {
129 case 0x0101:
130 chipname = "AR8216";
131 sc->sc_switchtype = AR8X16_SWITCH_AR8216;
132 break;
133 case 0x0201:
134 chipname = "AR8226";
135 sc->sc_switchtype = AR8X16_SWITCH_AR8226;
136 break;
137 /* 0x0301 - AR8236 */
138 case 0x1000:
139 case 0x1001:
140 chipname = "AR8316";
141 sc->sc_switchtype = AR8X16_SWITCH_AR8316;
142 break;
143 case 0x1202:
144 case 0x1204:
145 chipname = "AR8327";
146 sc->sc_switchtype = AR8X16_SWITCH_AR8327;
147 sc->mii_lo_first = 1;
148 break;
149 default:
150 chipname = NULL;
151 }
152
153 done:
154
155 DPRINTF(sc, ARSWITCH_DBG_ANY, "chipname=%s, id=%08x\n", chipname, id);
156 if (chipname != NULL) {
157 snprintf(desc, sizeof(desc),
158 "Atheros %s Ethernet Switch (ver %d rev %d)",
159 chipname,
160 sc->chip_ver,
161 sc->chip_rev);
162 device_set_desc_copy(dev, desc);
163 return (BUS_PROBE_DEFAULT);
164 }
165 return (ENXIO);
166 }
167
168 static int
arswitch_attach_phys(struct arswitch_softc * sc)169 arswitch_attach_phys(struct arswitch_softc *sc)
170 {
171 int phy, err = 0;
172 char name[IFNAMSIZ];
173
174 /* PHYs need an interface, so we generate a dummy one */
175 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->sc_dev));
176 for (phy = 0; phy < sc->numphys; phy++) {
177 sc->ifp[phy] = if_alloc(IFT_ETHER);
178 sc->ifp[phy]->if_softc = sc;
179 sc->ifp[phy]->if_flags |= IFF_UP | IFF_BROADCAST |
180 IFF_DRV_RUNNING | IFF_SIMPLEX;
181 sc->ifname[phy] = malloc(strlen(name)+1, M_DEVBUF, M_WAITOK);
182 bcopy(name, sc->ifname[phy], strlen(name)+1);
183 if_initname(sc->ifp[phy], sc->ifname[phy],
184 arswitch_portforphy(phy));
185 err = mii_attach(sc->sc_dev, &sc->miibus[phy], sc->ifp[phy],
186 arswitch_ifmedia_upd, arswitch_ifmedia_sts, \
187 BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY, 0);
188 #if 0
189 DPRINTF(sc->sc_dev, "%s attached to pseudo interface %s\n",
190 device_get_nameunit(sc->miibus[phy]),
191 sc->ifp[phy]->if_xname);
192 #endif
193 if (err != 0) {
194 device_printf(sc->sc_dev,
195 "attaching PHY %d failed\n",
196 phy);
197 return (err);
198 }
199
200 if (AR8X16_IS_SWITCH(sc, AR8327)) {
201 int led;
202 char ledname[IFNAMSIZ+4];
203
204 for (led = 0; led < 3; led++) {
205 sprintf(ledname, "%s%dled%d", name,
206 arswitch_portforphy(phy), led+1);
207 sc->dev_led[phy][led].sc = sc;
208 sc->dev_led[phy][led].phy = phy;
209 sc->dev_led[phy][led].lednum = led;
210 }
211 }
212 }
213 return (0);
214 }
215
216 static int
arswitch_reset(device_t dev)217 arswitch_reset(device_t dev)
218 {
219
220 arswitch_writereg(dev, AR8X16_REG_MASK_CTRL,
221 AR8X16_MASK_CTRL_SOFT_RESET);
222 DELAY(1000);
223 if (arswitch_readreg(dev, AR8X16_REG_MASK_CTRL) &
224 AR8X16_MASK_CTRL_SOFT_RESET) {
225 device_printf(dev, "unable to reset switch\n");
226 return (-1);
227 }
228 return (0);
229 }
230
231 static int
arswitch_set_vlan_mode(struct arswitch_softc * sc,uint32_t mode)232 arswitch_set_vlan_mode(struct arswitch_softc *sc, uint32_t mode)
233 {
234
235 /* Check for invalid modes. */
236 if ((mode & sc->info.es_vlan_caps) != mode)
237 return (EINVAL);
238
239 switch (mode) {
240 case ETHERSWITCH_VLAN_DOT1Q:
241 sc->vlan_mode = ETHERSWITCH_VLAN_DOT1Q;
242 break;
243 case ETHERSWITCH_VLAN_PORT:
244 sc->vlan_mode = ETHERSWITCH_VLAN_PORT;
245 break;
246 default:
247 sc->vlan_mode = 0;
248 }
249
250 /* Reset VLANs. */
251 sc->hal.arswitch_vlan_init_hw(sc);
252
253 return (0);
254 }
255
256 static void
ar8xxx_port_init(struct arswitch_softc * sc,int port)257 ar8xxx_port_init(struct arswitch_softc *sc, int port)
258 {
259
260 /* Port0 - CPU */
261 if (port == AR8X16_PORT_CPU) {
262 arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_STS(0),
263 (AR8X16_IS_SWITCH(sc, AR8216) ?
264 AR8X16_PORT_STS_SPEED_100 : AR8X16_PORT_STS_SPEED_1000) |
265 (AR8X16_IS_SWITCH(sc, AR8216) ? 0 : AR8X16_PORT_STS_RXFLOW) |
266 (AR8X16_IS_SWITCH(sc, AR8216) ? 0 : AR8X16_PORT_STS_TXFLOW) |
267 AR8X16_PORT_STS_RXMAC |
268 AR8X16_PORT_STS_TXMAC |
269 AR8X16_PORT_STS_DUPLEX);
270 arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_CTRL(0),
271 arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(0)) &
272 ~AR8X16_PORT_CTRL_HEADER);
273 } else {
274 /* Set ports to auto negotiation. */
275 arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_STS(port),
276 AR8X16_PORT_STS_LINK_AUTO);
277 arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_CTRL(port),
278 arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(port)) &
279 ~AR8X16_PORT_CTRL_HEADER);
280 }
281 }
282
283 static int
ar8xxx_atu_wait_ready(struct arswitch_softc * sc)284 ar8xxx_atu_wait_ready(struct arswitch_softc *sc)
285 {
286 int ret;
287
288 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
289
290 ret = arswitch_waitreg(sc->sc_dev,
291 AR8216_REG_ATU,
292 AR8216_ATU_ACTIVE,
293 0,
294 1000);
295
296 return (ret);
297 }
298
299 /*
300 * Flush all ATU entries.
301 */
302 static int
ar8xxx_atu_flush(struct arswitch_softc * sc)303 ar8xxx_atu_flush(struct arswitch_softc *sc)
304 {
305 int ret;
306
307 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
308
309 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: flushing all ports\n", __func__);
310
311 ret = ar8xxx_atu_wait_ready(sc);
312 if (ret)
313 device_printf(sc->sc_dev, "%s: waitreg failed\n", __func__);
314
315 if (!ret)
316 arswitch_writereg(sc->sc_dev,
317 AR8216_REG_ATU,
318 AR8216_ATU_OP_FLUSH | AR8216_ATU_ACTIVE);
319
320 return (ret);
321 }
322
323 /*
324 * Flush ATU entries for a single port.
325 */
326 static int
ar8xxx_atu_flush_port(struct arswitch_softc * sc,int port)327 ar8xxx_atu_flush_port(struct arswitch_softc *sc, int port)
328 {
329 int ret, val;
330
331 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: flushing port %d\n", __func__,
332 port);
333
334 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
335
336 /* Flush unicast entries on port */
337 val = AR8216_ATU_OP_FLUSH_UNICAST;
338
339 /* TODO: bit 4 indicates whether to flush dynamic (0) or static (1) */
340
341 /* Which port */
342 val |= SM(port, AR8216_ATU_PORT_NUM);
343
344 ret = ar8xxx_atu_wait_ready(sc);
345 if (ret)
346 device_printf(sc->sc_dev, "%s: waitreg failed\n", __func__);
347
348 if (!ret)
349 arswitch_writereg(sc->sc_dev,
350 AR8216_REG_ATU,
351 val | AR8216_ATU_ACTIVE);
352
353 return (ret);
354 }
355
356 /*
357 * XXX TODO: flush a single MAC address.
358 */
359
360 /*
361 * Fetch a single entry from the ATU.
362 */
363 static int
ar8xxx_atu_fetch_table(struct arswitch_softc * sc,etherswitch_atu_entry_t * e,int atu_fetch_op)364 ar8xxx_atu_fetch_table(struct arswitch_softc *sc, etherswitch_atu_entry_t *e,
365 int atu_fetch_op)
366 {
367 uint32_t ret0, ret1, ret2, val;
368
369 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
370
371 switch (atu_fetch_op) {
372 case 0:
373 /* Initialise things for the first fetch */
374
375 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: initializing\n", __func__);
376 (void) ar8xxx_atu_wait_ready(sc);
377
378 arswitch_writereg(sc->sc_dev,
379 AR8216_REG_ATU, AR8216_ATU_OP_GET_NEXT);
380 arswitch_writereg(sc->sc_dev,
381 AR8216_REG_ATU_DATA, 0);
382 arswitch_writereg(sc->sc_dev,
383 AR8216_REG_ATU_CTRL2, 0);
384
385 return (0);
386 case 1:
387 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: reading next\n", __func__);
388 /*
389 * Attempt to read the next address entry; don't modify what
390 * is there in AT_ADDR{4,5} as its used for the next fetch
391 */
392 (void) ar8xxx_atu_wait_ready(sc);
393
394 /* Begin the next read event; not modifying anything */
395 val = arswitch_readreg(sc->sc_dev, AR8216_REG_ATU);
396 val |= AR8216_ATU_ACTIVE;
397 arswitch_writereg(sc->sc_dev, AR8216_REG_ATU, val);
398
399 /* Wait for it to complete */
400 (void) ar8xxx_atu_wait_ready(sc);
401
402 /* Fetch the ethernet address and ATU status */
403 ret0 = arswitch_readreg(sc->sc_dev, AR8216_REG_ATU);
404 ret1 = arswitch_readreg(sc->sc_dev, AR8216_REG_ATU_DATA);
405 ret2 = arswitch_readreg(sc->sc_dev, AR8216_REG_ATU_CTRL2);
406
407 /* If the status is zero, then we're done */
408 if (MS(ret2, AR8216_ATU_CTRL2_AT_STATUS) == 0)
409 return (-1);
410
411 /* MAC address */
412 e->es_macaddr[5] = MS(ret0, AR8216_ATU_ADDR5);
413 e->es_macaddr[4] = MS(ret0, AR8216_ATU_ADDR4);
414 e->es_macaddr[3] = MS(ret1, AR8216_ATU_ADDR3);
415 e->es_macaddr[2] = MS(ret1, AR8216_ATU_ADDR2);
416 e->es_macaddr[1] = MS(ret1, AR8216_ATU_ADDR1);
417 e->es_macaddr[0] = MS(ret1, AR8216_ATU_ADDR0);
418
419 /* Bitmask of ports this entry is for */
420 e->es_portmask = MS(ret2, AR8216_ATU_CTRL2_DESPORT);
421
422 /* TODO: other flags that are interesting */
423
424 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: MAC %6D portmask 0x%08x\n",
425 __func__,
426 e->es_macaddr, ":", e->es_portmask);
427 return (0);
428 default:
429 return (-1);
430 }
431 return (-1);
432 }
433
434 /*
435 * Configure aging register defaults.
436 */
437 static int
ar8xxx_atu_learn_default(struct arswitch_softc * sc)438 ar8xxx_atu_learn_default(struct arswitch_softc *sc)
439 {
440 int ret;
441 uint32_t val;
442
443 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: resetting learning\n", __func__);
444
445 /*
446 * For now, configure the aging defaults:
447 *
448 * + ARP_EN - enable "acknowledgement" of ARP frames - they are
449 * forwarded to the CPU port
450 * + LEARN_CHANGE_EN - hash table violations when learning MAC addresses
451 * will force an entry to be expired/updated and a new one to be
452 * programmed in.
453 * + AGE_EN - enable address table aging
454 * + AGE_TIME - set to 5 minutes
455 */
456 val = 0;
457 val |= AR8216_ATU_CTRL_ARP_EN;
458 val |= AR8216_ATU_CTRL_LEARN_CHANGE;
459 val |= AR8216_ATU_CTRL_AGE_EN;
460 val |= 0x2b; /* 5 minutes; bits 15:0 */
461
462 ret = arswitch_writereg(sc->sc_dev,
463 AR8216_REG_ATU_CTRL,
464 val);
465
466 if (ret)
467 device_printf(sc->sc_dev, "%s: writereg failed\n", __func__);
468
469 return (ret);
470 }
471
472 /*
473 * XXX TODO: add another routine to configure the leaky behaviour
474 * when unknown frames are received. These must be consistent
475 * between ethernet switches.
476 */
477
478 /*
479 * Fetch the configured switch MAC address.
480 */
481 static int
ar8xxx_hw_get_switch_macaddr(struct arswitch_softc * sc,struct ether_addr * ea)482 ar8xxx_hw_get_switch_macaddr(struct arswitch_softc *sc, struct ether_addr *ea)
483 {
484 uint32_t ret0, ret1;
485 char *s;
486
487 s = (void *) ea;
488
489 ret0 = arswitch_readreg(sc->sc_dev, AR8X16_REG_SW_MAC_ADDR0);
490 ret1 = arswitch_readreg(sc->sc_dev, AR8X16_REG_SW_MAC_ADDR1);
491
492 s[5] = MS(ret0, AR8X16_REG_SW_MAC_ADDR0_BYTE5);
493 s[4] = MS(ret0, AR8X16_REG_SW_MAC_ADDR0_BYTE4);
494 s[3] = MS(ret1, AR8X16_REG_SW_MAC_ADDR1_BYTE3);
495 s[2] = MS(ret1, AR8X16_REG_SW_MAC_ADDR1_BYTE2);
496 s[1] = MS(ret1, AR8X16_REG_SW_MAC_ADDR1_BYTE1);
497 s[0] = MS(ret1, AR8X16_REG_SW_MAC_ADDR1_BYTE0);
498
499 return (0);
500 }
501
502 /*
503 * Set the switch mac address.
504 */
505 static int
ar8xxx_hw_set_switch_macaddr(struct arswitch_softc * sc,const struct ether_addr * ea)506 ar8xxx_hw_set_switch_macaddr(struct arswitch_softc *sc,
507 const struct ether_addr *ea)
508 {
509
510 return (ENXIO);
511 }
512
513 /*
514 * XXX TODO: this attach routine does NOT free all memory, resources
515 * upon failure!
516 */
517 static int
arswitch_attach(device_t dev)518 arswitch_attach(device_t dev)
519 {
520 struct arswitch_softc *sc = device_get_softc(dev);
521 struct sysctl_ctx_list *ctx;
522 struct sysctl_oid *tree;
523 int err = 0;
524 int port;
525
526 /* sc->sc_switchtype is already decided in arswitch_probe() */
527 sc->sc_dev = dev;
528 mtx_init(&sc->sc_mtx, "arswitch", NULL, MTX_DEF);
529 sc->page = -1;
530 strlcpy(sc->info.es_name, device_get_desc(dev),
531 sizeof(sc->info.es_name));
532
533 /* Debugging */
534 ctx = device_get_sysctl_ctx(sc->sc_dev);
535 tree = device_get_sysctl_tree(sc->sc_dev);
536 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
537 "debug", CTLFLAG_RW, &sc->sc_debug, 0,
538 "control debugging printfs");
539
540 /* Allocate a 128 entry ATU table; hopefully its big enough! */
541 /* XXX TODO: make this per chip */
542 sc->atu.entries = malloc(sizeof(etherswitch_atu_entry_t) * 128,
543 M_DEVBUF, M_NOWAIT);
544 if (sc->atu.entries == NULL) {
545 device_printf(sc->sc_dev, "%s: failed to allocate ATU table\n",
546 __func__);
547 return (ENXIO);
548 }
549 sc->atu.count = 0;
550 sc->atu.size = 128;
551
552 /* Default HAL methods */
553 sc->hal.arswitch_port_init = ar8xxx_port_init;
554 sc->hal.arswitch_port_vlan_setup = ar8xxx_port_vlan_setup;
555 sc->hal.arswitch_port_vlan_get = ar8xxx_port_vlan_get;
556 sc->hal.arswitch_vlan_init_hw = ar8xxx_reset_vlans;
557 sc->hal.arswitch_hw_get_switch_macaddr = ar8xxx_hw_get_switch_macaddr;
558 sc->hal.arswitch_hw_set_switch_macaddr = ar8xxx_hw_set_switch_macaddr;
559
560 sc->hal.arswitch_vlan_getvgroup = ar8xxx_getvgroup;
561 sc->hal.arswitch_vlan_setvgroup = ar8xxx_setvgroup;
562
563 sc->hal.arswitch_vlan_get_pvid = ar8xxx_get_pvid;
564 sc->hal.arswitch_vlan_set_pvid = ar8xxx_set_pvid;
565
566 sc->hal.arswitch_get_dot1q_vlan = ar8xxx_get_dot1q_vlan;
567 sc->hal.arswitch_set_dot1q_vlan = ar8xxx_set_dot1q_vlan;
568 sc->hal.arswitch_flush_dot1q_vlan = ar8xxx_flush_dot1q_vlan;
569 sc->hal.arswitch_purge_dot1q_vlan = ar8xxx_purge_dot1q_vlan;
570 sc->hal.arswitch_get_port_vlan = ar8xxx_get_port_vlan;
571 sc->hal.arswitch_set_port_vlan = ar8xxx_set_port_vlan;
572
573 sc->hal.arswitch_atu_flush = ar8xxx_atu_flush;
574 sc->hal.arswitch_atu_flush_port = ar8xxx_atu_flush_port;
575 sc->hal.arswitch_atu_learn_default = ar8xxx_atu_learn_default;
576 sc->hal.arswitch_atu_fetch_table = ar8xxx_atu_fetch_table;
577
578 sc->hal.arswitch_phy_read = arswitch_readphy_internal;
579 sc->hal.arswitch_phy_write = arswitch_writephy_internal;
580
581 /*
582 * Attach switch related functions
583 */
584 if (AR8X16_IS_SWITCH(sc, AR7240))
585 ar7240_attach(sc);
586 else if (AR8X16_IS_SWITCH(sc, AR9340))
587 ar9340_attach(sc);
588 else if (AR8X16_IS_SWITCH(sc, AR8216))
589 ar8216_attach(sc);
590 else if (AR8X16_IS_SWITCH(sc, AR8226))
591 ar8226_attach(sc);
592 else if (AR8X16_IS_SWITCH(sc, AR8316))
593 ar8316_attach(sc);
594 else if (AR8X16_IS_SWITCH(sc, AR8327))
595 ar8327_attach(sc);
596 else {
597 DPRINTF(sc, ARSWITCH_DBG_ANY,
598 "%s: unknown switch (%d)?\n", __func__, sc->sc_switchtype);
599 return (ENXIO);
600 }
601
602 /* Common defaults. */
603 sc->info.es_nports = 5; /* XXX technically 6, but 6th not used */
604
605 /* XXX Defaults for externally connected AR8316 */
606 sc->numphys = 4;
607 sc->phy4cpu = 1;
608 sc->is_rgmii = 1;
609 sc->is_gmii = 0;
610 sc->is_mii = 0;
611
612 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
613 "numphys", &sc->numphys);
614 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
615 "phy4cpu", &sc->phy4cpu);
616 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
617 "is_rgmii", &sc->is_rgmii);
618 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
619 "is_gmii", &sc->is_gmii);
620 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
621 "is_mii", &sc->is_mii);
622
623 if (sc->numphys > AR8X16_NUM_PHYS)
624 sc->numphys = AR8X16_NUM_PHYS;
625
626 /* Reset the switch. */
627 if (arswitch_reset(dev)) {
628 DPRINTF(sc, ARSWITCH_DBG_ANY,
629 "%s: arswitch_reset: failed\n", __func__);
630 return (ENXIO);
631 }
632
633 err = sc->hal.arswitch_hw_setup(sc);
634 if (err != 0) {
635 DPRINTF(sc, ARSWITCH_DBG_ANY,
636 "%s: hw_setup: err=%d\n", __func__, err);
637 return (err);
638 }
639
640 err = sc->hal.arswitch_hw_global_setup(sc);
641 if (err != 0) {
642 DPRINTF(sc, ARSWITCH_DBG_ANY,
643 "%s: hw_global_setup: err=%d\n", __func__, err);
644 return (err);
645 }
646
647 /*
648 * Configure the default address table learning parameters for this
649 * switch.
650 */
651 err = sc->hal.arswitch_atu_learn_default(sc);
652 if (err != 0) {
653 DPRINTF(sc, ARSWITCH_DBG_ANY,
654 "%s: atu_learn_default: err=%d\n", __func__, err);
655 return (err);
656 }
657
658 /* Initialize the switch ports. */
659 for (port = 0; port <= sc->numphys; port++) {
660 sc->hal.arswitch_port_init(sc, port);
661 }
662
663 /*
664 * Attach the PHYs and complete the bus enumeration.
665 */
666 err = arswitch_attach_phys(sc);
667 if (err != 0) {
668 DPRINTF(sc, ARSWITCH_DBG_ANY,
669 "%s: attach_phys: err=%d\n", __func__, err);
670 return (err);
671 }
672
673 /* Default to ingress filters off. */
674 err = arswitch_set_vlan_mode(sc, 0);
675 if (err != 0) {
676 DPRINTF(sc, ARSWITCH_DBG_ANY,
677 "%s: set_vlan_mode: err=%d\n", __func__, err);
678 return (err);
679 }
680
681 bus_generic_probe(dev);
682 bus_enumerate_hinted_children(dev);
683 err = bus_generic_attach(dev);
684 if (err != 0) {
685 DPRINTF(sc, ARSWITCH_DBG_ANY,
686 "%s: bus_generic_attach: err=%d\n", __func__, err);
687 return (err);
688 }
689
690 callout_init_mtx(&sc->callout_tick, &sc->sc_mtx, 0);
691
692 ARSWITCH_LOCK(sc);
693 arswitch_tick(sc);
694 ARSWITCH_UNLOCK(sc);
695
696 return (err);
697 }
698
699 static int
arswitch_detach(device_t dev)700 arswitch_detach(device_t dev)
701 {
702 struct arswitch_softc *sc = device_get_softc(dev);
703 int i;
704
705 callout_drain(&sc->callout_tick);
706
707 for (i=0; i < sc->numphys; i++) {
708 if (sc->miibus[i] != NULL)
709 device_delete_child(dev, sc->miibus[i]);
710 if (sc->ifp[i] != NULL)
711 if_free(sc->ifp[i]);
712 free(sc->ifname[i], M_DEVBUF);
713 }
714
715 free(sc->atu.entries, M_DEVBUF);
716
717 bus_generic_detach(dev);
718 mtx_destroy(&sc->sc_mtx);
719
720 return (0);
721 }
722
723 /*
724 * Convert PHY number to port number. PHY0 is connected to port 1, PHY1 to
725 * port 2, etc.
726 */
727 static inline int
arswitch_portforphy(int phy)728 arswitch_portforphy(int phy)
729 {
730 return (phy+1);
731 }
732
733 static inline struct mii_data *
arswitch_miiforport(struct arswitch_softc * sc,int port)734 arswitch_miiforport(struct arswitch_softc *sc, int port)
735 {
736 int phy = port-1;
737
738 if (phy < 0 || phy >= sc->numphys)
739 return (NULL);
740 return (device_get_softc(sc->miibus[phy]));
741 }
742
743 static inline struct ifnet *
arswitch_ifpforport(struct arswitch_softc * sc,int port)744 arswitch_ifpforport(struct arswitch_softc *sc, int port)
745 {
746 int phy = port-1;
747
748 if (phy < 0 || phy >= sc->numphys)
749 return (NULL);
750 return (sc->ifp[phy]);
751 }
752
753 /*
754 * Convert port status to ifmedia.
755 */
756 static void
arswitch_update_ifmedia(int portstatus,u_int * media_status,u_int * media_active)757 arswitch_update_ifmedia(int portstatus, u_int *media_status, u_int *media_active)
758 {
759 *media_active = IFM_ETHER;
760 *media_status = IFM_AVALID;
761
762 if ((portstatus & AR8X16_PORT_STS_LINK_UP) != 0)
763 *media_status |= IFM_ACTIVE;
764 else {
765 *media_active |= IFM_NONE;
766 return;
767 }
768 switch (portstatus & AR8X16_PORT_STS_SPEED_MASK) {
769 case AR8X16_PORT_STS_SPEED_10:
770 *media_active |= IFM_10_T;
771 break;
772 case AR8X16_PORT_STS_SPEED_100:
773 *media_active |= IFM_100_TX;
774 break;
775 case AR8X16_PORT_STS_SPEED_1000:
776 *media_active |= IFM_1000_T;
777 break;
778 }
779 if ((portstatus & AR8X16_PORT_STS_DUPLEX) == 0)
780 *media_active |= IFM_FDX;
781 else
782 *media_active |= IFM_HDX;
783 if ((portstatus & AR8X16_PORT_STS_TXFLOW) != 0)
784 *media_active |= IFM_ETH_TXPAUSE;
785 if ((portstatus & AR8X16_PORT_STS_RXFLOW) != 0)
786 *media_active |= IFM_ETH_RXPAUSE;
787 }
788
789 /*
790 * Poll the status for all PHYs. We're using the switch port status because
791 * thats a lot quicker to read than talking to all the PHYs. Care must be
792 * taken that the resulting ifmedia_active is identical to what the PHY will
793 * compute, or gratuitous link status changes will occur whenever the PHYs
794 * update function is called.
795 */
796 static void
arswitch_miipollstat(struct arswitch_softc * sc)797 arswitch_miipollstat(struct arswitch_softc *sc)
798 {
799 int i;
800 struct mii_data *mii;
801 struct mii_softc *miisc;
802 int portstatus;
803 int port_flap = 0;
804
805 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
806
807 for (i = 0; i < sc->numphys; i++) {
808 if (sc->miibus[i] == NULL)
809 continue;
810 mii = device_get_softc(sc->miibus[i]);
811 /* XXX This would be nice to have abstracted out to be per-chip */
812 /* AR8327/AR8337 has a different register base */
813 if (AR8X16_IS_SWITCH(sc, AR8327))
814 portstatus = arswitch_readreg(sc->sc_dev,
815 AR8327_REG_PORT_STATUS(arswitch_portforphy(i)));
816 else
817 portstatus = arswitch_readreg(sc->sc_dev,
818 AR8X16_REG_PORT_STS(arswitch_portforphy(i)));
819 #if 1
820 DPRINTF(sc, ARSWITCH_DBG_POLL, "p[%d]=0x%08x (%b)\n",
821 i,
822 portstatus,
823 portstatus,
824 "\20\3TXMAC\4RXMAC\5TXFLOW\6RXFLOW\7"
825 "DUPLEX\11LINK_UP\12LINK_AUTO\13LINK_PAUSE");
826 #endif
827 /*
828 * If the current status is down, but we have a link
829 * status showing up, we need to do an ATU flush.
830 */
831 if ((mii->mii_media_status & IFM_ACTIVE) == 0 &&
832 (portstatus & AR8X16_PORT_STS_LINK_UP) != 0) {
833 device_printf(sc->sc_dev, "%s: port %d: port -> UP\n",
834 __func__,
835 i);
836 port_flap = 1;
837 }
838 /*
839 * and maybe if a port goes up->down?
840 */
841 if ((mii->mii_media_status & IFM_ACTIVE) != 0 &&
842 (portstatus & AR8X16_PORT_STS_LINK_UP) == 0) {
843 device_printf(sc->sc_dev, "%s: port %d: port -> DOWN\n",
844 __func__,
845 i);
846 port_flap = 1;
847 }
848 arswitch_update_ifmedia(portstatus, &mii->mii_media_status,
849 &mii->mii_media_active);
850 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
851 if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) !=
852 miisc->mii_inst)
853 continue;
854 mii_phy_update(miisc, MII_POLLSTAT);
855 }
856 }
857
858 /* If a port went from down->up, flush the ATU */
859 if (port_flap)
860 sc->hal.arswitch_atu_flush(sc);
861 }
862
863 static void
arswitch_tick(void * arg)864 arswitch_tick(void *arg)
865 {
866 struct arswitch_softc *sc = arg;
867
868 arswitch_miipollstat(sc);
869 callout_reset(&sc->callout_tick, hz, arswitch_tick, sc);
870 }
871
872 static void
arswitch_lock(device_t dev)873 arswitch_lock(device_t dev)
874 {
875 struct arswitch_softc *sc = device_get_softc(dev);
876
877 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
878 ARSWITCH_LOCK(sc);
879 }
880
881 static void
arswitch_unlock(device_t dev)882 arswitch_unlock(device_t dev)
883 {
884 struct arswitch_softc *sc = device_get_softc(dev);
885
886 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
887 ARSWITCH_UNLOCK(sc);
888 }
889
890 static etherswitch_info_t *
arswitch_getinfo(device_t dev)891 arswitch_getinfo(device_t dev)
892 {
893 struct arswitch_softc *sc = device_get_softc(dev);
894
895 return (&sc->info);
896 }
897
898 static int
ar8xxx_port_vlan_get(struct arswitch_softc * sc,etherswitch_port_t * p)899 ar8xxx_port_vlan_get(struct arswitch_softc *sc, etherswitch_port_t *p)
900 {
901 uint32_t reg;
902
903 ARSWITCH_LOCK(sc);
904
905 /* Retrieve the PVID. */
906 sc->hal.arswitch_vlan_get_pvid(sc, p->es_port, &p->es_pvid);
907
908 /* Port flags. */
909 reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(p->es_port));
910 if (reg & AR8X16_PORT_CTRL_DOUBLE_TAG)
911 p->es_flags |= ETHERSWITCH_PORT_DOUBLE_TAG;
912 reg >>= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT;
913 if ((reg & 0x3) == AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_ADD)
914 p->es_flags |= ETHERSWITCH_PORT_ADDTAG;
915 if ((reg & 0x3) == AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_STRIP)
916 p->es_flags |= ETHERSWITCH_PORT_STRIPTAG;
917 ARSWITCH_UNLOCK(sc);
918
919 return (0);
920 }
921
922 static int
arswitch_is_cpuport(struct arswitch_softc * sc,int port)923 arswitch_is_cpuport(struct arswitch_softc *sc, int port)
924 {
925
926 return ((port == AR8X16_PORT_CPU) ||
927 ((AR8X16_IS_SWITCH(sc, AR8327) &&
928 port == AR8327_PORT_GMAC6)));
929 }
930
931 static int
arswitch_getport(device_t dev,etherswitch_port_t * p)932 arswitch_getport(device_t dev, etherswitch_port_t *p)
933 {
934 struct arswitch_softc *sc;
935 struct mii_data *mii;
936 struct ifmediareq *ifmr;
937 int err;
938
939 sc = device_get_softc(dev);
940 /* XXX +1 is for AR8327; should make this configurable! */
941 if (p->es_port < 0 || p->es_port > sc->info.es_nports)
942 return (ENXIO);
943
944 err = sc->hal.arswitch_port_vlan_get(sc, p);
945 if (err != 0)
946 return (err);
947
948 mii = arswitch_miiforport(sc, p->es_port);
949 if (arswitch_is_cpuport(sc, p->es_port)) {
950 /* fill in fixed values for CPU port */
951 /* XXX is this valid in all cases? */
952 p->es_flags |= ETHERSWITCH_PORT_CPU;
953 ifmr = &p->es_ifmr;
954 ifmr->ifm_count = 0;
955 ifmr->ifm_current = ifmr->ifm_active =
956 IFM_ETHER | IFM_1000_T | IFM_FDX;
957 ifmr->ifm_mask = 0;
958 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
959 } else if (mii != NULL) {
960 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
961 &mii->mii_media, SIOCGIFMEDIA);
962 if (err)
963 return (err);
964 } else {
965 return (ENXIO);
966 }
967
968 if (!arswitch_is_cpuport(sc, p->es_port) &&
969 AR8X16_IS_SWITCH(sc, AR8327)) {
970 int led;
971 p->es_nleds = 3;
972
973 for (led = 0; led < p->es_nleds; led++)
974 {
975 int style;
976 uint32_t val;
977
978 /* Find the right style enum for our pattern */
979 val = arswitch_readreg(dev,
980 ar8327_led_mapping[p->es_port-1][led].reg);
981 val = (val>>ar8327_led_mapping[p->es_port-1][led].shift)&0x03;
982
983 for (style = 0; style < ETHERSWITCH_PORT_LED_MAX; style++)
984 {
985 if (led_pattern_table[style] == val) break;
986 }
987
988 /* can't happen */
989 if (style == ETHERSWITCH_PORT_LED_MAX)
990 style = ETHERSWITCH_PORT_LED_DEFAULT;
991
992 p->es_led[led] = style;
993 }
994 } else
995 {
996 p->es_nleds = 0;
997 }
998
999 return (0);
1000 }
1001
1002 static int
ar8xxx_port_vlan_setup(struct arswitch_softc * sc,etherswitch_port_t * p)1003 ar8xxx_port_vlan_setup(struct arswitch_softc *sc, etherswitch_port_t *p)
1004 {
1005 uint32_t reg;
1006 int err;
1007
1008 ARSWITCH_LOCK(sc);
1009
1010 /* Set the PVID. */
1011 if (p->es_pvid != 0)
1012 sc->hal.arswitch_vlan_set_pvid(sc, p->es_port, p->es_pvid);
1013
1014 /* Mutually exclusive. */
1015 if (p->es_flags & ETHERSWITCH_PORT_ADDTAG &&
1016 p->es_flags & ETHERSWITCH_PORT_STRIPTAG) {
1017 ARSWITCH_UNLOCK(sc);
1018 return (EINVAL);
1019 }
1020
1021 reg = 0;
1022 if (p->es_flags & ETHERSWITCH_PORT_DOUBLE_TAG)
1023 reg |= AR8X16_PORT_CTRL_DOUBLE_TAG;
1024 if (p->es_flags & ETHERSWITCH_PORT_ADDTAG)
1025 reg |= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_ADD <<
1026 AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT;
1027 if (p->es_flags & ETHERSWITCH_PORT_STRIPTAG)
1028 reg |= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_STRIP <<
1029 AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT;
1030
1031 err = arswitch_modifyreg(sc->sc_dev,
1032 AR8X16_REG_PORT_CTRL(p->es_port),
1033 0x3 << AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT |
1034 AR8X16_PORT_CTRL_DOUBLE_TAG, reg);
1035
1036 ARSWITCH_UNLOCK(sc);
1037 return (err);
1038 }
1039
1040 static int
arswitch_setport(device_t dev,etherswitch_port_t * p)1041 arswitch_setport(device_t dev, etherswitch_port_t *p)
1042 {
1043 int err, i;
1044 struct arswitch_softc *sc;
1045 struct ifmedia *ifm;
1046 struct mii_data *mii;
1047 struct ifnet *ifp;
1048
1049 sc = device_get_softc(dev);
1050 if (p->es_port < 0 || p->es_port > sc->info.es_nports)
1051 return (ENXIO);
1052
1053 /* Port flags. */
1054 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
1055 err = sc->hal.arswitch_port_vlan_setup(sc, p);
1056 if (err)
1057 return (err);
1058 }
1059
1060 /* Do not allow media or led changes on CPU port. */
1061 if (arswitch_is_cpuport(sc, p->es_port))
1062 return (0);
1063
1064 if (AR8X16_IS_SWITCH(sc, AR8327))
1065 {
1066 for (i = 0; i < 3; i++)
1067 {
1068 int err;
1069 err = arswitch_setled(sc, p->es_port-1, i, p->es_led[i]);
1070 if (err)
1071 return (err);
1072 }
1073 }
1074
1075 mii = arswitch_miiforport(sc, p->es_port);
1076 if (mii == NULL)
1077 return (ENXIO);
1078
1079 ifp = arswitch_ifpforport(sc, p->es_port);
1080
1081 ifm = &mii->mii_media;
1082 return (ifmedia_ioctl(ifp, &p->es_ifr, ifm, SIOCSIFMEDIA));
1083 }
1084
1085 static int
arswitch_setled(struct arswitch_softc * sc,int phy,int led,int style)1086 arswitch_setled(struct arswitch_softc *sc, int phy, int led, int style)
1087 {
1088 int shift;
1089 int err;
1090
1091 if (phy < 0 || phy > sc->numphys)
1092 return EINVAL;
1093
1094 if (style < 0 || style > ETHERSWITCH_PORT_LED_MAX)
1095 return (EINVAL);
1096
1097 ARSWITCH_LOCK(sc);
1098
1099 shift = ar8327_led_mapping[phy][led].shift;
1100 err = (arswitch_modifyreg(sc->sc_dev,
1101 ar8327_led_mapping[phy][led].reg,
1102 0x03 << shift, led_pattern_table[style] << shift));
1103 ARSWITCH_UNLOCK(sc);
1104
1105 return (err);
1106 }
1107
1108 static void
arswitch_statchg(device_t dev)1109 arswitch_statchg(device_t dev)
1110 {
1111 struct arswitch_softc *sc = device_get_softc(dev);
1112
1113 DPRINTF(sc, ARSWITCH_DBG_POLL, "%s\n", __func__);
1114 }
1115
1116 static int
arswitch_ifmedia_upd(struct ifnet * ifp)1117 arswitch_ifmedia_upd(struct ifnet *ifp)
1118 {
1119 struct arswitch_softc *sc = ifp->if_softc;
1120 struct mii_data *mii = arswitch_miiforport(sc, ifp->if_dunit);
1121
1122 if (mii == NULL)
1123 return (ENXIO);
1124 mii_mediachg(mii);
1125 return (0);
1126 }
1127
1128 static void
arswitch_ifmedia_sts(struct ifnet * ifp,struct ifmediareq * ifmr)1129 arswitch_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1130 {
1131 struct arswitch_softc *sc = ifp->if_softc;
1132 struct mii_data *mii = arswitch_miiforport(sc, ifp->if_dunit);
1133
1134 DPRINTF(sc, ARSWITCH_DBG_POLL, "%s\n", __func__);
1135
1136 if (mii == NULL)
1137 return;
1138 mii_pollstat(mii);
1139 ifmr->ifm_active = mii->mii_media_active;
1140 ifmr->ifm_status = mii->mii_media_status;
1141 }
1142
1143 static int
arswitch_getconf(device_t dev,etherswitch_conf_t * conf)1144 arswitch_getconf(device_t dev, etherswitch_conf_t *conf)
1145 {
1146 struct arswitch_softc *sc;
1147 int ret;
1148
1149 sc = device_get_softc(dev);
1150
1151 /* Return the VLAN mode. */
1152 conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
1153 conf->vlan_mode = sc->vlan_mode;
1154
1155 /* Return the switch ethernet address. */
1156 ret = sc->hal.arswitch_hw_get_switch_macaddr(sc,
1157 &conf->switch_macaddr);
1158 if (ret == 0) {
1159 conf->cmd |= ETHERSWITCH_CONF_SWITCH_MACADDR;
1160 }
1161
1162 return (0);
1163 }
1164
1165 static int
arswitch_setconf(device_t dev,etherswitch_conf_t * conf)1166 arswitch_setconf(device_t dev, etherswitch_conf_t *conf)
1167 {
1168 struct arswitch_softc *sc;
1169 int err;
1170
1171 sc = device_get_softc(dev);
1172
1173 /* Set the VLAN mode. */
1174 if (conf->cmd & ETHERSWITCH_CONF_VLAN_MODE) {
1175 err = arswitch_set_vlan_mode(sc, conf->vlan_mode);
1176 if (err != 0)
1177 return (err);
1178 }
1179
1180 /* TODO: Set the switch ethernet address. */
1181
1182 return (0);
1183 }
1184
1185 static int
arswitch_atu_flush_all(device_t dev)1186 arswitch_atu_flush_all(device_t dev)
1187 {
1188 struct arswitch_softc *sc;
1189 int err;
1190
1191 sc = device_get_softc(dev);
1192 ARSWITCH_LOCK(sc);
1193 err = sc->hal.arswitch_atu_flush(sc);
1194 /* Invalidate cached ATU */
1195 sc->atu.count = 0;
1196 ARSWITCH_UNLOCK(sc);
1197 return (err);
1198 }
1199
1200 static int
arswitch_atu_flush_port(device_t dev,int port)1201 arswitch_atu_flush_port(device_t dev, int port)
1202 {
1203 struct arswitch_softc *sc;
1204 int err;
1205
1206 sc = device_get_softc(dev);
1207 ARSWITCH_LOCK(sc);
1208 err = sc->hal.arswitch_atu_flush_port(sc, port);
1209 /* Invalidate cached ATU */
1210 sc->atu.count = 0;
1211 ARSWITCH_UNLOCK(sc);
1212 return (err);
1213 }
1214
1215 static int
arswitch_atu_fetch_table(device_t dev,etherswitch_atu_table_t * table)1216 arswitch_atu_fetch_table(device_t dev, etherswitch_atu_table_t *table)
1217 {
1218 struct arswitch_softc *sc;
1219 int err, nitems;
1220
1221 sc = device_get_softc(dev);
1222
1223 ARSWITCH_LOCK(sc);
1224 /* Initial setup */
1225 nitems = 0;
1226 err = sc->hal.arswitch_atu_fetch_table(sc, NULL, 0);
1227
1228 /* fetch - ideally yes we'd fetch into a separate table then switch */
1229 while (err == 0 && nitems < sc->atu.size) {
1230 err = sc->hal.arswitch_atu_fetch_table(sc,
1231 &sc->atu.entries[nitems], 1);
1232 if (err == 0) {
1233 sc->atu.entries[nitems].id = nitems;
1234 nitems++;
1235 }
1236 }
1237 sc->atu.count = nitems;
1238 ARSWITCH_UNLOCK(sc);
1239
1240 table->es_nitems = nitems;
1241
1242 return (0);
1243 }
1244
1245 static int
arswitch_atu_fetch_table_entry(device_t dev,etherswitch_atu_entry_t * e)1246 arswitch_atu_fetch_table_entry(device_t dev, etherswitch_atu_entry_t *e)
1247 {
1248 struct arswitch_softc *sc;
1249 int id;
1250
1251 sc = device_get_softc(dev);
1252 id = e->id;
1253
1254 ARSWITCH_LOCK(sc);
1255 if (id > sc->atu.count) {
1256 ARSWITCH_UNLOCK(sc);
1257 return (ENOENT);
1258 }
1259
1260 memcpy(e, &sc->atu.entries[id], sizeof(*e));
1261 ARSWITCH_UNLOCK(sc);
1262 return (0);
1263 }
1264
1265 static int
arswitch_getvgroup(device_t dev,etherswitch_vlangroup_t * e)1266 arswitch_getvgroup(device_t dev, etherswitch_vlangroup_t *e)
1267 {
1268 struct arswitch_softc *sc = device_get_softc(dev);
1269
1270 return (sc->hal.arswitch_vlan_getvgroup(sc, e));
1271 }
1272
1273 static int
arswitch_setvgroup(device_t dev,etherswitch_vlangroup_t * e)1274 arswitch_setvgroup(device_t dev, etherswitch_vlangroup_t *e)
1275 {
1276 struct arswitch_softc *sc = device_get_softc(dev);
1277
1278 return (sc->hal.arswitch_vlan_setvgroup(sc, e));
1279 }
1280
1281 static int
arswitch_readphy(device_t dev,int phy,int reg)1282 arswitch_readphy(device_t dev, int phy, int reg)
1283 {
1284 struct arswitch_softc *sc = device_get_softc(dev);
1285
1286 return (sc->hal.arswitch_phy_read(dev, phy, reg));
1287 }
1288
1289 static int
arswitch_writephy(device_t dev,int phy,int reg,int val)1290 arswitch_writephy(device_t dev, int phy, int reg, int val)
1291 {
1292 struct arswitch_softc *sc = device_get_softc(dev);
1293
1294 return (sc->hal.arswitch_phy_write(dev, phy, reg, val));
1295 }
1296
1297 static device_method_t arswitch_methods[] = {
1298 /* Device interface */
1299 DEVMETHOD(device_probe, arswitch_probe),
1300 DEVMETHOD(device_attach, arswitch_attach),
1301 DEVMETHOD(device_detach, arswitch_detach),
1302
1303 /* bus interface */
1304 DEVMETHOD(bus_add_child, device_add_child_ordered),
1305
1306 /* MII interface */
1307 DEVMETHOD(miibus_readreg, arswitch_readphy),
1308 DEVMETHOD(miibus_writereg, arswitch_writephy),
1309 DEVMETHOD(miibus_statchg, arswitch_statchg),
1310
1311 /* MDIO interface */
1312 DEVMETHOD(mdio_readreg, arswitch_readphy),
1313 DEVMETHOD(mdio_writereg, arswitch_writephy),
1314
1315 /* etherswitch interface */
1316 DEVMETHOD(etherswitch_lock, arswitch_lock),
1317 DEVMETHOD(etherswitch_unlock, arswitch_unlock),
1318 DEVMETHOD(etherswitch_getinfo, arswitch_getinfo),
1319 DEVMETHOD(etherswitch_readreg, arswitch_readreg),
1320 DEVMETHOD(etherswitch_writereg, arswitch_writereg),
1321 DEVMETHOD(etherswitch_readphyreg, arswitch_readphy),
1322 DEVMETHOD(etherswitch_writephyreg, arswitch_writephy),
1323 DEVMETHOD(etherswitch_getport, arswitch_getport),
1324 DEVMETHOD(etherswitch_setport, arswitch_setport),
1325 DEVMETHOD(etherswitch_getvgroup, arswitch_getvgroup),
1326 DEVMETHOD(etherswitch_setvgroup, arswitch_setvgroup),
1327 DEVMETHOD(etherswitch_getconf, arswitch_getconf),
1328 DEVMETHOD(etherswitch_setconf, arswitch_setconf),
1329 DEVMETHOD(etherswitch_flush_all, arswitch_atu_flush_all),
1330 DEVMETHOD(etherswitch_flush_port, arswitch_atu_flush_port),
1331 DEVMETHOD(etherswitch_fetch_table, arswitch_atu_fetch_table),
1332 DEVMETHOD(etherswitch_fetch_table_entry, arswitch_atu_fetch_table_entry),
1333
1334 DEVMETHOD_END
1335 };
1336
1337 DEFINE_CLASS_0(arswitch, arswitch_driver, arswitch_methods,
1338 sizeof(struct arswitch_softc));
1339 static devclass_t arswitch_devclass;
1340
1341 DRIVER_MODULE(arswitch, mdio, arswitch_driver, arswitch_devclass, 0, 0);
1342 DRIVER_MODULE(miibus, arswitch, miibus_driver, miibus_devclass, 0, 0);
1343 DRIVER_MODULE(mdio, arswitch, mdio_driver, mdio_devclass, 0, 0);
1344 DRIVER_MODULE(etherswitch, arswitch, etherswitch_driver, etherswitch_devclass, 0, 0);
1345 MODULE_VERSION(arswitch, 1);
1346 MODULE_DEPEND(arswitch, miibus, 1, 1, 1); /* XXX which versions? */
1347 MODULE_DEPEND(arswitch, etherswitch, 1, 1, 1); /* XXX which versions? */
1348