1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 1999 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * from: NetBSD: iommuvar.h,v 1.6 2008/05/29 14:51:26 mrg Exp 29 * 30 * $FreeBSD: stable/12/sys/sparc64/include/iommuvar.h 326262 2017-11-27 15:10:39Z pfg $ 31 */ 32 33 #ifndef _MACHINE_IOMMUVAR_H_ 34 #define _MACHINE_IOMMUVAR_H_ 35 36 #define IO_PAGE_SIZE PAGE_SIZE_8K 37 #define IO_PAGE_MASK PAGE_MASK_8K 38 #define IO_PAGE_SHIFT PAGE_SHIFT_8K 39 #define round_io_page(x) round_page(x) 40 #define trunc_io_page(x) trunc_page(x) 41 42 /* 43 * LRU queue handling for lazy resource allocation 44 */ 45 TAILQ_HEAD(iommu_maplruq_head, bus_dmamap); 46 47 /* 48 * Per-IOMMU state; the parenthesized comments indicate the locking strategy: 49 * i - protected by is_mtx. 50 * r - read-only after initialization. 51 * * - comment refers to pointer target / target hardware registers 52 * (for bus_addr_t). 53 * is_maplruq is also locked by is_mtx. Elements of is_tsb may only be 54 * accessed from functions operating on the map owning the corresponding 55 * resource, so the locking the user is required to do to protect the 56 * map is sufficient. 57 * dm_reslist of all maps are locked by is_mtx as well. 58 * is_dvma_rman has its own internal lock. 59 */ 60 struct iommu_state { 61 struct mtx is_mtx; 62 struct rman is_dvma_rman; /* DVMA space rman */ 63 struct iommu_maplruq_head is_maplruq; /* (i) LRU queue */ 64 vm_paddr_t is_ptsb; /* (r) TSB physical address */ 65 uint64_t *is_tsb; /* (*i) TSB virtual address */ 66 int is_tsbsize; /* (r) 0 = 8K, ... */ 67 uint64_t is_pmaxaddr; /* (r) max. physical address */ 68 uint64_t is_dvmabase; /* (r) */ 69 uint64_t is_cr; /* (r) Control reg value */ 70 71 vm_paddr_t is_flushpa[2]; /* (r) */ 72 volatile uint64_t *is_flushva[2]; /* (r, *i) */ 73 /* 74 * (i) 75 * When a flush is completed, 64 bytes will be stored at the given 76 * location, the first double word being 1, to indicate completion. 77 * The lower 6 address bits are ignored, so the addresses need to be 78 * suitably aligned; over-allocate a large enough margin to be able 79 * to adjust it. 80 * Two such buffers are needed. 81 */ 82 volatile char is_flush[STRBUF_FLUSHSYNC_NBYTES * 3 - 1]; 83 84 /* copies of our parent's state, to allow us to be self contained */ 85 bus_space_tag_t is_bustag; /* (r) Our bus tag */ 86 bus_space_handle_t is_bushandle; /* (r) */ 87 bus_addr_t is_iommu; /* (r, *i) IOMMU registers */ 88 bus_addr_t is_sb[2]; /* (r, *i) Streaming buffer */ 89 /* Tag diagnostics access */ 90 bus_addr_t is_dtag; /* (r, *r) */ 91 /* Data RAM diagnostic access */ 92 bus_addr_t is_ddram; /* (r, *r) */ 93 /* LRU queue diag. access */ 94 bus_addr_t is_dqueue; /* (r, *r) */ 95 /* Virtual address diagnostics register */ 96 bus_addr_t is_dva; /* (r, *r) */ 97 /* Tag compare diagnostics access */ 98 bus_addr_t is_dtcmp; /* (r, *r) */ 99 /* behavior flags */ 100 u_int is_flags; /* (r) */ 101 #define IOMMU_RERUN_DISABLE (1 << 0) 102 #define IOMMU_FIRE (1 << 1) 103 #define IOMMU_FLUSH_CACHE (1 << 2) 104 #define IOMMU_PRESERVE_PROM (1 << 3) 105 }; 106 107 /* interfaces for PCI/SBus code */ 108 void iommu_init(const char *name, struct iommu_state *is, u_int tsbsize, 109 uint32_t iovabase, u_int resvpg); 110 void iommu_reset(struct iommu_state *is); 111 void iommu_decode_fault(struct iommu_state *is, vm_offset_t phys); 112 113 extern struct bus_dma_methods iommu_dma_methods; 114 115 #endif /* !_MACHINE_IOMMUVAR_H_ */ 116