1// SPDX-License-Identifier: GPL-2.0-or-later 2// Copyright 2019 IBM Corp. 3 4#include <dt-bindings/interrupt-controller/arm-gic.h> 5#include <dt-bindings/clock/ast2600-clock.h> 6 7/ { 8 model = "Aspeed BMC"; 9 compatible = "aspeed,ast2600"; 10 #address-cells = <1>; 11 #size-cells = <1>; 12 interrupt-parent = <&gic>; 13 14 aliases { 15 i2c0 = &i2c0; 16 i2c1 = &i2c1; 17 i2c2 = &i2c2; 18 i2c3 = &i2c3; 19 i2c4 = &i2c4; 20 i2c5 = &i2c5; 21 i2c6 = &i2c6; 22 i2c7 = &i2c7; 23 i2c8 = &i2c8; 24 i2c9 = &i2c9; 25 i2c10 = &i2c10; 26 i2c11 = &i2c11; 27 i2c12 = &i2c12; 28 i2c13 = &i2c13; 29 i2c14 = &i2c14; 30 i2c15 = &i2c15; 31 serial0 = &uart1; 32 serial1 = &uart2; 33 serial2 = &uart3; 34 serial3 = &uart4; 35 serial4 = &uart5; 36 serial5 = &vuart1; 37 serial6 = &vuart2; 38 }; 39 40 41 cpus { 42 #address-cells = <1>; 43 #size-cells = <0>; 44 enable-method = "aspeed,ast2600-smp"; 45 46 cpu@f00 { 47 compatible = "arm,cortex-a7"; 48 device_type = "cpu"; 49 reg = <0xf00>; 50 }; 51 52 cpu@f01 { 53 compatible = "arm,cortex-a7"; 54 device_type = "cpu"; 55 reg = <0xf01>; 56 }; 57 }; 58 59 timer { 60 compatible = "arm,armv7-timer"; 61 interrupt-parent = <&gic>; 62 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 63 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 64 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 65 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 66 clocks = <&syscon ASPEED_CLK_HPLL>; 67 arm,cpu-registers-not-fw-configured; 68 }; 69 70 ahb { 71 compatible = "simple-bus"; 72 #address-cells = <1>; 73 #size-cells = <1>; 74 device_type = "soc"; 75 ranges; 76 77 gic: interrupt-controller@40461000 { 78 compatible = "arm,cortex-a7-gic"; 79 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 80 #interrupt-cells = <3>; 81 interrupt-controller; 82 interrupt-parent = <&gic>; 83 reg = <0x40461000 0x1000>, 84 <0x40462000 0x1000>, 85 <0x40464000 0x2000>, 86 <0x40466000 0x2000>; 87 }; 88 89 fmc: spi@1e620000 { 90 reg = < 0x1e620000 0xc4 91 0x20000000 0x10000000 >; 92 #address-cells = <1>; 93 #size-cells = <0>; 94 compatible = "aspeed,ast2600-fmc"; 95 clocks = <&syscon ASPEED_CLK_AHB>; 96 status = "disabled"; 97 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 98 flash@0 { 99 reg = < 0 >; 100 compatible = "jedec,spi-nor"; 101 spi-max-frequency = <50000000>; 102 status = "disabled"; 103 }; 104 flash@1 { 105 reg = < 1 >; 106 compatible = "jedec,spi-nor"; 107 spi-max-frequency = <50000000>; 108 status = "disabled"; 109 }; 110 flash@2 { 111 reg = < 2 >; 112 compatible = "jedec,spi-nor"; 113 spi-max-frequency = <50000000>; 114 status = "disabled"; 115 }; 116 }; 117 118 spi1: spi@1e630000 { 119 reg = < 0x1e630000 0xc4 120 0x30000000 0x10000000 >; 121 #address-cells = <1>; 122 #size-cells = <0>; 123 compatible = "aspeed,ast2600-spi"; 124 clocks = <&syscon ASPEED_CLK_AHB>; 125 status = "disabled"; 126 flash@0 { 127 reg = < 0 >; 128 compatible = "jedec,spi-nor"; 129 spi-max-frequency = <50000000>; 130 status = "disabled"; 131 }; 132 flash@1 { 133 reg = < 1 >; 134 compatible = "jedec,spi-nor"; 135 spi-max-frequency = <50000000>; 136 status = "disabled"; 137 }; 138 }; 139 140 spi2: spi@1e631000 { 141 reg = < 0x1e631000 0xc4 142 0x50000000 0x10000000 >; 143 #address-cells = <1>; 144 #size-cells = <0>; 145 compatible = "aspeed,ast2600-spi"; 146 clocks = <&syscon ASPEED_CLK_AHB>; 147 status = "disabled"; 148 flash@0 { 149 reg = < 0 >; 150 compatible = "jedec,spi-nor"; 151 spi-max-frequency = <50000000>; 152 status = "disabled"; 153 }; 154 flash@1 { 155 reg = < 1 >; 156 compatible = "jedec,spi-nor"; 157 spi-max-frequency = <50000000>; 158 status = "disabled"; 159 }; 160 flash@2 { 161 reg = < 2 >; 162 compatible = "jedec,spi-nor"; 163 spi-max-frequency = <50000000>; 164 status = "disabled"; 165 }; 166 }; 167 168 mdio0: mdio@1e650000 { 169 compatible = "aspeed,ast2600-mdio"; 170 reg = <0x1e650000 0x8>; 171 #address-cells = <1>; 172 #size-cells = <0>; 173 status = "disabled"; 174 pinctrl-names = "default"; 175 pinctrl-0 = <&pinctrl_mdio1_default>; 176 }; 177 178 mdio1: mdio@1e650008 { 179 compatible = "aspeed,ast2600-mdio"; 180 reg = <0x1e650008 0x8>; 181 #address-cells = <1>; 182 #size-cells = <0>; 183 status = "disabled"; 184 pinctrl-names = "default"; 185 pinctrl-0 = <&pinctrl_mdio2_default>; 186 }; 187 188 mdio2: mdio@1e650010 { 189 compatible = "aspeed,ast2600-mdio"; 190 reg = <0x1e650010 0x8>; 191 #address-cells = <1>; 192 #size-cells = <0>; 193 status = "disabled"; 194 pinctrl-names = "default"; 195 pinctrl-0 = <&pinctrl_mdio3_default>; 196 }; 197 198 mdio3: mdio@1e650018 { 199 compatible = "aspeed,ast2600-mdio"; 200 reg = <0x1e650018 0x8>; 201 #address-cells = <1>; 202 #size-cells = <0>; 203 status = "disabled"; 204 pinctrl-names = "default"; 205 pinctrl-0 = <&pinctrl_mdio4_default>; 206 }; 207 208 mac0: ftgmac@1e660000 { 209 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 210 reg = <0x1e660000 0x180>; 211 #address-cells = <1>; 212 #size-cells = <0>; 213 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 214 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>; 215 status = "disabled"; 216 }; 217 218 mac1: ftgmac@1e680000 { 219 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 220 reg = <0x1e680000 0x180>; 221 #address-cells = <1>; 222 #size-cells = <0>; 223 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 224 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>; 225 status = "disabled"; 226 }; 227 228 mac2: ftgmac@1e670000 { 229 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 230 reg = <0x1e670000 0x180>; 231 #address-cells = <1>; 232 #size-cells = <0>; 233 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 234 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>; 235 status = "disabled"; 236 }; 237 238 mac3: ftgmac@1e690000 { 239 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 240 reg = <0x1e690000 0x180>; 241 #address-cells = <1>; 242 #size-cells = <0>; 243 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 244 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>; 245 status = "disabled"; 246 }; 247 248 apb { 249 compatible = "simple-bus"; 250 #address-cells = <1>; 251 #size-cells = <1>; 252 ranges; 253 254 syscon: syscon@1e6e2000 { 255 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd"; 256 reg = <0x1e6e2000 0x1000>; 257 ranges = <0 0x1e6e2000 0x1000>; 258 #address-cells = <1>; 259 #size-cells = <1>; 260 #clock-cells = <1>; 261 #reset-cells = <1>; 262 263 pinctrl: pinctrl { 264 compatible = "aspeed,ast2600-pinctrl"; 265 }; 266 267 smp-memram@180 { 268 compatible = "aspeed,ast2600-smpmem"; 269 reg = <0x180 0x40>; 270 }; 271 }; 272 273 rng: hwrng@1e6e2524 { 274 compatible = "timeriomem_rng"; 275 reg = <0x1e6e2524 0x4>; 276 period = <1>; 277 quality = <100>; 278 }; 279 280 gpio0: gpio@1e780000 { 281 #gpio-cells = <2>; 282 gpio-controller; 283 compatible = "aspeed,ast2600-gpio"; 284 reg = <0x1e780000 0x800>; 285 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 286 gpio-ranges = <&pinctrl 0 0 208>; 287 ngpios = <208>; 288 clocks = <&syscon ASPEED_CLK_APB2>; 289 interrupt-controller; 290 #interrupt-cells = <2>; 291 }; 292 293 gpio1: gpio@1e780800 { 294 #gpio-cells = <2>; 295 gpio-controller; 296 compatible = "aspeed,ast2600-gpio"; 297 reg = <0x1e780800 0x800>; 298 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 299 gpio-ranges = <&pinctrl 0 208 36>; 300 ngpios = <36>; 301 clocks = <&syscon ASPEED_CLK_APB1>; 302 interrupt-controller; 303 #interrupt-cells = <2>; 304 }; 305 306 rtc: rtc@1e781000 { 307 compatible = "aspeed,ast2600-rtc"; 308 reg = <0x1e781000 0x18>; 309 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 310 status = "disabled"; 311 }; 312 313 timer: timer@1e782000 { 314 compatible = "aspeed,ast2600-timer"; 315 reg = <0x1e782000 0x90>; 316 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 317 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 318 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 319 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 320 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 321 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 322 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 323 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 324 clocks = <&syscon ASPEED_CLK_APB1>; 325 clock-names = "PCLK"; 326 }; 327 328 uart1: serial@1e783000 { 329 compatible = "ns16550a"; 330 reg = <0x1e783000 0x20>; 331 reg-shift = <2>; 332 reg-io-width = <4>; 333 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 334 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; 335 resets = <&lpc_reset 4>; 336 no-loopback-test; 337 pinctrl-names = "default"; 338 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>; 339 status = "disabled"; 340 }; 341 342 uart5: serial@1e784000 { 343 compatible = "ns16550a"; 344 reg = <0x1e784000 0x1000>; 345 reg-shift = <2>; 346 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 347 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>; 348 no-loopback-test; 349 }; 350 351 wdt1: watchdog@1e785000 { 352 compatible = "aspeed,ast2600-wdt"; 353 reg = <0x1e785000 0x40>; 354 }; 355 356 wdt2: watchdog@1e785040 { 357 compatible = "aspeed,ast2600-wdt"; 358 reg = <0x1e785040 0x40>; 359 status = "disabled"; 360 }; 361 362 wdt3: watchdog@1e785080 { 363 compatible = "aspeed,ast2600-wdt"; 364 reg = <0x1e785080 0x40>; 365 status = "disabled"; 366 }; 367 368 wdt4: watchdog@1e7850c0 { 369 compatible = "aspeed,ast2600-wdt"; 370 reg = <0x1e7850C0 0x40>; 371 status = "disabled"; 372 }; 373 374 lpc: lpc@1e789000 { 375 compatible = "aspeed,ast2600-lpc", "simple-mfd"; 376 reg = <0x1e789000 0x1000>; 377 378 #address-cells = <1>; 379 #size-cells = <1>; 380 ranges = <0x0 0x1e789000 0x1000>; 381 382 lpc_bmc: lpc-bmc@0 { 383 compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon"; 384 reg = <0x0 0x80>; 385 reg-io-width = <4>; 386 387 #address-cells = <1>; 388 #size-cells = <1>; 389 ranges = <0x0 0x0 0x80>; 390 391 kcs1: kcs1@0 { 392 compatible = "aspeed,ast2600-kcs-bmc"; 393 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 394 kcs_chan = <1>; 395 status = "disabled"; 396 }; 397 kcs2: kcs2@0 { 398 compatible = "aspeed,ast2600-kcs-bmc"; 399 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 400 kcs_chan = <2>; 401 status = "disabled"; 402 }; 403 kcs3: kcs3@0 { 404 compatible = "aspeed,ast2600-kcs-bmc"; 405 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 406 kcs_chan = <3>; 407 status = "disabled"; 408 }; 409 }; 410 411 lpc_host: lpc-host@80 { 412 compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon"; 413 reg = <0x80 0x1e0>; 414 reg-io-width = <4>; 415 416 #address-cells = <1>; 417 #size-cells = <1>; 418 ranges = <0x0 0x80 0x1e0>; 419 420 kcs4: kcs4@0 { 421 compatible = "aspeed,ast2600-kcs-bmc"; 422 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 423 kcs_chan = <4>; 424 status = "disabled"; 425 }; 426 427 lpc_ctrl: lpc-ctrl@0 { 428 compatible = "aspeed,ast2600-lpc-ctrl"; 429 reg = <0x0 0x80>; 430 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 431 status = "disabled"; 432 }; 433 434 lpc_snoop: lpc-snoop@0 { 435 compatible = "aspeed,ast2600-lpc-snoop"; 436 reg = <0x0 0x80>; 437 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 438 status = "disabled"; 439 }; 440 441 lhc: lhc@20 { 442 compatible = "aspeed,ast2600-lhc"; 443 reg = <0x20 0x24 0x48 0x8>; 444 }; 445 446 lpc_reset: reset-controller@18 { 447 compatible = "aspeed,ast2600-lpc-reset"; 448 reg = <0x18 0x4>; 449 #reset-cells = <1>; 450 }; 451 452 ibt: ibt@c0 { 453 compatible = "aspeed,ast2600-ibt-bmc"; 454 reg = <0xc0 0x18>; 455 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 456 status = "disabled"; 457 }; 458 }; 459 }; 460 461 sdc: sdc@1e740000 { 462 compatible = "aspeed,ast2600-sd-controller"; 463 reg = <0x1e740000 0x100>; 464 #address-cells = <1>; 465 #size-cells = <1>; 466 ranges = <0 0x1e740000 0x10000>; 467 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 468 status = "disabled"; 469 470 sdhci0: sdhci@1e740100 { 471 compatible = "aspeed,ast2600-sdhci", "sdhci"; 472 reg = <0x100 0x100>; 473 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 474 sdhci,auto-cmd12; 475 clocks = <&syscon ASPEED_CLK_SDIO>; 476 status = "disabled"; 477 }; 478 479 sdhci1: sdhci@1e740200 { 480 compatible = "aspeed,ast2600-sdhci", "sdhci"; 481 reg = <0x200 0x100>; 482 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 483 sdhci,auto-cmd12; 484 clocks = <&syscon ASPEED_CLK_SDIO>; 485 status = "disabled"; 486 }; 487 }; 488 489 emmc_controller: sdc@1e750000 { 490 compatible = "aspeed,ast2600-sd-controller"; 491 reg = <0x1e750000 0x100>; 492 #address-cells = <1>; 493 #size-cells = <1>; 494 ranges = <0 0x1e750000 0x10000>; 495 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>; 496 status = "disabled"; 497 498 emmc: sdhci@1e750100 { 499 compatible = "aspeed,ast2600-sdhci"; 500 reg = <0x100 0x100>; 501 sdhci,auto-cmd12; 502 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 503 clocks = <&syscon ASPEED_CLK_EMMC>; 504 pinctrl-names = "default"; 505 pinctrl-0 = <&pinctrl_emmc_default>; 506 }; 507 }; 508 509 vuart1: serial@1e787000 { 510 compatible = "aspeed,ast2500-vuart"; 511 reg = <0x1e787000 0x40>; 512 reg-shift = <2>; 513 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 514 clocks = <&syscon ASPEED_CLK_APB1>; 515 no-loopback-test; 516 status = "disabled"; 517 }; 518 519 vuart2: serial@1e788000 { 520 compatible = "aspeed,ast2500-vuart"; 521 reg = <0x1e788000 0x40>; 522 reg-shift = <2>; 523 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 524 clocks = <&syscon ASPEED_CLK_APB1>; 525 no-loopback-test; 526 status = "disabled"; 527 }; 528 529 uart2: serial@1e78d000 { 530 compatible = "ns16550a"; 531 reg = <0x1e78d000 0x20>; 532 reg-shift = <2>; 533 reg-io-width = <4>; 534 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 535 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; 536 resets = <&lpc_reset 5>; 537 no-loopback-test; 538 pinctrl-names = "default"; 539 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 540 status = "disabled"; 541 }; 542 543 uart3: serial@1e78e000 { 544 compatible = "ns16550a"; 545 reg = <0x1e78e000 0x20>; 546 reg-shift = <2>; 547 reg-io-width = <4>; 548 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 549 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; 550 resets = <&lpc_reset 6>; 551 no-loopback-test; 552 pinctrl-names = "default"; 553 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>; 554 status = "disabled"; 555 }; 556 557 uart4: serial@1e78f000 { 558 compatible = "ns16550a"; 559 reg = <0x1e78f000 0x20>; 560 reg-shift = <2>; 561 reg-io-width = <4>; 562 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 563 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; 564 resets = <&lpc_reset 7>; 565 no-loopback-test; 566 pinctrl-names = "default"; 567 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>; 568 status = "disabled"; 569 }; 570 571 i2c: bus@1e78a000 { 572 compatible = "simple-bus"; 573 #address-cells = <1>; 574 #size-cells = <1>; 575 ranges = <0 0x1e78a000 0x1000>; 576 }; 577 578 fsim0: fsi@1e79b000 { 579 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 580 reg = <0x1e79b000 0x94>; 581 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 582 pinctrl-names = "default"; 583 pinctrl-0 = <&pinctrl_fsi1_default>; 584 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 585 status = "disabled"; 586 }; 587 588 fsim1: fsi@1e79b100 { 589 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 590 reg = <0x1e79b100 0x94>; 591 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 592 pinctrl-names = "default"; 593 pinctrl-0 = <&pinctrl_fsi2_default>; 594 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 595 status = "disabled"; 596 }; 597 }; 598 }; 599}; 600 601#include "aspeed-g6-pinctrl.dtsi" 602 603&i2c { 604 i2c0: i2c-bus@80 { 605 #address-cells = <1>; 606 #size-cells = <0>; 607 #interrupt-cells = <1>; 608 reg = <0x80 0x80>; 609 compatible = "aspeed,ast2600-i2c-bus"; 610 clocks = <&syscon ASPEED_CLK_APB2>; 611 resets = <&syscon ASPEED_RESET_I2C>; 612 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 613 bus-frequency = <100000>; 614 pinctrl-names = "default"; 615 pinctrl-0 = <&pinctrl_i2c1_default>; 616 status = "disabled"; 617 }; 618 619 i2c1: i2c-bus@100 { 620 #address-cells = <1>; 621 #size-cells = <0>; 622 #interrupt-cells = <1>; 623 reg = <0x100 0x80>; 624 compatible = "aspeed,ast2600-i2c-bus"; 625 clocks = <&syscon ASPEED_CLK_APB2>; 626 resets = <&syscon ASPEED_RESET_I2C>; 627 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 628 bus-frequency = <100000>; 629 pinctrl-names = "default"; 630 pinctrl-0 = <&pinctrl_i2c2_default>; 631 status = "disabled"; 632 }; 633 634 i2c2: i2c-bus@180 { 635 #address-cells = <1>; 636 #size-cells = <0>; 637 #interrupt-cells = <1>; 638 reg = <0x180 0x80>; 639 compatible = "aspeed,ast2600-i2c-bus"; 640 clocks = <&syscon ASPEED_CLK_APB2>; 641 resets = <&syscon ASPEED_RESET_I2C>; 642 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 643 bus-frequency = <100000>; 644 pinctrl-names = "default"; 645 pinctrl-0 = <&pinctrl_i2c3_default>; 646 status = "disabled"; 647 }; 648 649 i2c3: i2c-bus@200 { 650 #address-cells = <1>; 651 #size-cells = <0>; 652 #interrupt-cells = <1>; 653 reg = <0x200 0x80>; 654 compatible = "aspeed,ast2600-i2c-bus"; 655 clocks = <&syscon ASPEED_CLK_APB2>; 656 resets = <&syscon ASPEED_RESET_I2C>; 657 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 658 bus-frequency = <100000>; 659 pinctrl-names = "default"; 660 pinctrl-0 = <&pinctrl_i2c4_default>; 661 status = "disabled"; 662 }; 663 664 i2c4: i2c-bus@280 { 665 #address-cells = <1>; 666 #size-cells = <0>; 667 #interrupt-cells = <1>; 668 reg = <0x280 0x80>; 669 compatible = "aspeed,ast2600-i2c-bus"; 670 clocks = <&syscon ASPEED_CLK_APB2>; 671 resets = <&syscon ASPEED_RESET_I2C>; 672 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 673 bus-frequency = <100000>; 674 pinctrl-names = "default"; 675 pinctrl-0 = <&pinctrl_i2c5_default>; 676 status = "disabled"; 677 }; 678 679 i2c5: i2c-bus@300 { 680 #address-cells = <1>; 681 #size-cells = <0>; 682 #interrupt-cells = <1>; 683 reg = <0x300 0x80>; 684 compatible = "aspeed,ast2600-i2c-bus"; 685 clocks = <&syscon ASPEED_CLK_APB2>; 686 resets = <&syscon ASPEED_RESET_I2C>; 687 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 688 bus-frequency = <100000>; 689 pinctrl-names = "default"; 690 pinctrl-0 = <&pinctrl_i2c6_default>; 691 status = "disabled"; 692 }; 693 694 i2c6: i2c-bus@380 { 695 #address-cells = <1>; 696 #size-cells = <0>; 697 #interrupt-cells = <1>; 698 reg = <0x380 0x80>; 699 compatible = "aspeed,ast2600-i2c-bus"; 700 clocks = <&syscon ASPEED_CLK_APB2>; 701 resets = <&syscon ASPEED_RESET_I2C>; 702 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 703 bus-frequency = <100000>; 704 pinctrl-names = "default"; 705 pinctrl-0 = <&pinctrl_i2c7_default>; 706 status = "disabled"; 707 }; 708 709 i2c7: i2c-bus@400 { 710 #address-cells = <1>; 711 #size-cells = <0>; 712 #interrupt-cells = <1>; 713 reg = <0x400 0x80>; 714 compatible = "aspeed,ast2600-i2c-bus"; 715 clocks = <&syscon ASPEED_CLK_APB2>; 716 resets = <&syscon ASPEED_RESET_I2C>; 717 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 718 bus-frequency = <100000>; 719 pinctrl-names = "default"; 720 pinctrl-0 = <&pinctrl_i2c8_default>; 721 status = "disabled"; 722 }; 723 724 i2c8: i2c-bus@480 { 725 #address-cells = <1>; 726 #size-cells = <0>; 727 #interrupt-cells = <1>; 728 reg = <0x480 0x80>; 729 compatible = "aspeed,ast2600-i2c-bus"; 730 clocks = <&syscon ASPEED_CLK_APB2>; 731 resets = <&syscon ASPEED_RESET_I2C>; 732 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 733 bus-frequency = <100000>; 734 pinctrl-names = "default"; 735 pinctrl-0 = <&pinctrl_i2c9_default>; 736 status = "disabled"; 737 }; 738 739 i2c9: i2c-bus@500 { 740 #address-cells = <1>; 741 #size-cells = <0>; 742 #interrupt-cells = <1>; 743 reg = <0x500 0x80>; 744 compatible = "aspeed,ast2600-i2c-bus"; 745 clocks = <&syscon ASPEED_CLK_APB2>; 746 resets = <&syscon ASPEED_RESET_I2C>; 747 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 748 bus-frequency = <100000>; 749 pinctrl-names = "default"; 750 pinctrl-0 = <&pinctrl_i2c10_default>; 751 status = "disabled"; 752 }; 753 754 i2c10: i2c-bus@580 { 755 #address-cells = <1>; 756 #size-cells = <0>; 757 #interrupt-cells = <1>; 758 reg = <0x580 0x80>; 759 compatible = "aspeed,ast2600-i2c-bus"; 760 clocks = <&syscon ASPEED_CLK_APB2>; 761 resets = <&syscon ASPEED_RESET_I2C>; 762 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 763 bus-frequency = <100000>; 764 pinctrl-names = "default"; 765 pinctrl-0 = <&pinctrl_i2c11_default>; 766 status = "disabled"; 767 }; 768 769 i2c11: i2c-bus@600 { 770 #address-cells = <1>; 771 #size-cells = <0>; 772 #interrupt-cells = <1>; 773 reg = <0x600 0x80>; 774 compatible = "aspeed,ast2600-i2c-bus"; 775 clocks = <&syscon ASPEED_CLK_APB2>; 776 resets = <&syscon ASPEED_RESET_I2C>; 777 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 778 bus-frequency = <100000>; 779 pinctrl-names = "default"; 780 pinctrl-0 = <&pinctrl_i2c12_default>; 781 status = "disabled"; 782 }; 783 784 i2c12: i2c-bus@680 { 785 #address-cells = <1>; 786 #size-cells = <0>; 787 #interrupt-cells = <1>; 788 reg = <0x680 0x80>; 789 compatible = "aspeed,ast2600-i2c-bus"; 790 clocks = <&syscon ASPEED_CLK_APB2>; 791 resets = <&syscon ASPEED_RESET_I2C>; 792 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 793 bus-frequency = <100000>; 794 pinctrl-names = "default"; 795 pinctrl-0 = <&pinctrl_i2c13_default>; 796 status = "disabled"; 797 }; 798 799 i2c13: i2c-bus@700 { 800 #address-cells = <1>; 801 #size-cells = <0>; 802 #interrupt-cells = <1>; 803 reg = <0x700 0x80>; 804 compatible = "aspeed,ast2600-i2c-bus"; 805 clocks = <&syscon ASPEED_CLK_APB2>; 806 resets = <&syscon ASPEED_RESET_I2C>; 807 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 808 bus-frequency = <100000>; 809 pinctrl-names = "default"; 810 pinctrl-0 = <&pinctrl_i2c14_default>; 811 status = "disabled"; 812 }; 813 814 i2c14: i2c-bus@780 { 815 #address-cells = <1>; 816 #size-cells = <0>; 817 #interrupt-cells = <1>; 818 reg = <0x780 0x80>; 819 compatible = "aspeed,ast2600-i2c-bus"; 820 clocks = <&syscon ASPEED_CLK_APB2>; 821 resets = <&syscon ASPEED_RESET_I2C>; 822 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; 823 bus-frequency = <100000>; 824 pinctrl-names = "default"; 825 pinctrl-0 = <&pinctrl_i2c15_default>; 826 status = "disabled"; 827 }; 828 829 i2c15: i2c-bus@800 { 830 #address-cells = <1>; 831 #size-cells = <0>; 832 #interrupt-cells = <1>; 833 reg = <0x800 0x80>; 834 compatible = "aspeed,ast2600-i2c-bus"; 835 clocks = <&syscon ASPEED_CLK_APB2>; 836 resets = <&syscon ASPEED_RESET_I2C>; 837 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 838 bus-frequency = <100000>; 839 pinctrl-names = "default"; 840 pinctrl-0 = <&pinctrl_i2c16_default>; 841 status = "disabled"; 842 }; 843}; 844