1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009-2016 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright notice, 11 * this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * The views and conclusions contained in the software and documentation are 29 * those of the authors and should not be interpreted as representing official 30 * policies, either expressed or implied, of the FreeBSD Project. 31 * 32 * $FreeBSD: stable/12/sys/dev/sfxge/common/siena_impl.h 342315 2018-12-21 15:11:52Z arybchik $ 33 */ 34 35 #ifndef _SYS_SIENA_IMPL_H 36 #define _SYS_SIENA_IMPL_H 37 38 #include "efx.h" 39 #include "efx_regs.h" 40 #include "efx_mcdi.h" 41 #include "siena_flash.h" 42 43 #ifdef __cplusplus 44 extern "C" { 45 #endif 46 47 #define SIENA_NVRAM_CHUNK 0x80 48 49 extern __checkReturn efx_rc_t 50 siena_nic_probe( 51 __in efx_nic_t *enp); 52 53 extern __checkReturn efx_rc_t 54 siena_nic_reset( 55 __in efx_nic_t *enp); 56 57 extern __checkReturn efx_rc_t 58 siena_nic_init( 59 __in efx_nic_t *enp); 60 61 #if EFSYS_OPT_DIAG 62 63 extern efx_sram_pattern_fn_t __efx_sram_pattern_fns[]; 64 65 typedef struct siena_register_set_s { 66 unsigned int address; 67 unsigned int step; 68 unsigned int rows; 69 efx_oword_t mask; 70 } siena_register_set_t; 71 72 extern __checkReturn efx_rc_t 73 siena_nic_register_test( 74 __in efx_nic_t *enp); 75 76 #endif /* EFSYS_OPT_DIAG */ 77 78 extern void 79 siena_nic_fini( 80 __in efx_nic_t *enp); 81 82 extern void 83 siena_nic_unprobe( 84 __in efx_nic_t *enp); 85 86 #define SIENA_SRAM_ROWS 0x12000 87 88 extern void 89 siena_sram_init( 90 __in efx_nic_t *enp); 91 92 #if EFSYS_OPT_DIAG 93 94 extern __checkReturn efx_rc_t 95 siena_sram_test( 96 __in efx_nic_t *enp, 97 __in efx_sram_pattern_fn_t func); 98 99 #endif /* EFSYS_OPT_DIAG */ 100 101 #if EFSYS_OPT_MCDI 102 103 extern __checkReturn efx_rc_t 104 siena_mcdi_init( 105 __in efx_nic_t *enp, 106 __in const efx_mcdi_transport_t *mtp); 107 108 extern void 109 siena_mcdi_send_request( 110 __in efx_nic_t *enp, 111 __in_bcount(hdr_len) void *hdrp, 112 __in size_t hdr_len, 113 __in_bcount(sdu_len) void *sdup, 114 __in size_t sdu_len); 115 116 extern __checkReturn boolean_t 117 siena_mcdi_poll_response( 118 __in efx_nic_t *enp); 119 120 extern void 121 siena_mcdi_read_response( 122 __in efx_nic_t *enp, 123 __out_bcount(length) void *bufferp, 124 __in size_t offset, 125 __in size_t length); 126 127 extern efx_rc_t 128 siena_mcdi_poll_reboot( 129 __in efx_nic_t *enp); 130 131 extern void 132 siena_mcdi_fini( 133 __in efx_nic_t *enp); 134 135 extern __checkReturn efx_rc_t 136 siena_mcdi_feature_supported( 137 __in efx_nic_t *enp, 138 __in efx_mcdi_feature_id_t id, 139 __out boolean_t *supportedp); 140 141 extern void 142 siena_mcdi_get_timeout( 143 __in efx_nic_t *enp, 144 __in efx_mcdi_req_t *emrp, 145 __out uint32_t *timeoutp); 146 147 #endif /* EFSYS_OPT_MCDI */ 148 149 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD 150 151 extern __checkReturn efx_rc_t 152 siena_nvram_partn_lock( 153 __in efx_nic_t *enp, 154 __in uint32_t partn); 155 156 extern __checkReturn efx_rc_t 157 siena_nvram_partn_unlock( 158 __in efx_nic_t *enp, 159 __in uint32_t partn); 160 161 extern __checkReturn efx_rc_t 162 siena_nvram_get_dynamic_cfg( 163 __in efx_nic_t *enp, 164 __in uint32_t partn, 165 __in boolean_t vpd, 166 __out siena_mc_dynamic_config_hdr_t **dcfgp, 167 __out size_t *sizep); 168 169 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */ 170 171 #if EFSYS_OPT_NVRAM 172 173 #if EFSYS_OPT_DIAG 174 175 extern __checkReturn efx_rc_t 176 siena_nvram_test( 177 __in efx_nic_t *enp); 178 179 #endif /* EFSYS_OPT_DIAG */ 180 181 extern __checkReturn efx_rc_t 182 siena_nvram_get_subtype( 183 __in efx_nic_t *enp, 184 __in uint32_t partn, 185 __out uint32_t *subtypep); 186 187 extern __checkReturn efx_rc_t 188 siena_nvram_type_to_partn( 189 __in efx_nic_t *enp, 190 __in efx_nvram_type_t type, 191 __out uint32_t *partnp); 192 193 extern __checkReturn efx_rc_t 194 siena_nvram_partn_size( 195 __in efx_nic_t *enp, 196 __in uint32_t partn, 197 __out size_t *sizep); 198 199 extern __checkReturn efx_rc_t 200 siena_nvram_partn_rw_start( 201 __in efx_nic_t *enp, 202 __in uint32_t partn, 203 __out size_t *chunk_sizep); 204 205 extern __checkReturn efx_rc_t 206 siena_nvram_partn_read( 207 __in efx_nic_t *enp, 208 __in uint32_t partn, 209 __in unsigned int offset, 210 __out_bcount(size) caddr_t data, 211 __in size_t size); 212 213 extern __checkReturn efx_rc_t 214 siena_nvram_partn_erase( 215 __in efx_nic_t *enp, 216 __in uint32_t partn, 217 __in unsigned int offset, 218 __in size_t size); 219 220 extern __checkReturn efx_rc_t 221 siena_nvram_partn_write( 222 __in efx_nic_t *enp, 223 __in uint32_t partn, 224 __in unsigned int offset, 225 __out_bcount(size) caddr_t data, 226 __in size_t size); 227 228 extern __checkReturn efx_rc_t 229 siena_nvram_partn_rw_finish( 230 __in efx_nic_t *enp, 231 __in uint32_t partn); 232 233 extern __checkReturn efx_rc_t 234 siena_nvram_partn_get_version( 235 __in efx_nic_t *enp, 236 __in uint32_t partn, 237 __out uint32_t *subtypep, 238 __out_ecount(4) uint16_t version[4]); 239 240 extern __checkReturn efx_rc_t 241 siena_nvram_partn_set_version( 242 __in efx_nic_t *enp, 243 __in uint32_t partn, 244 __in_ecount(4) uint16_t version[4]); 245 246 #endif /* EFSYS_OPT_NVRAM */ 247 248 #if EFSYS_OPT_VPD 249 250 extern __checkReturn efx_rc_t 251 siena_vpd_init( 252 __in efx_nic_t *enp); 253 254 extern __checkReturn efx_rc_t 255 siena_vpd_size( 256 __in efx_nic_t *enp, 257 __out size_t *sizep); 258 259 extern __checkReturn efx_rc_t 260 siena_vpd_read( 261 __in efx_nic_t *enp, 262 __out_bcount(size) caddr_t data, 263 __in size_t size); 264 265 extern __checkReturn efx_rc_t 266 siena_vpd_verify( 267 __in efx_nic_t *enp, 268 __in_bcount(size) caddr_t data, 269 __in size_t size); 270 271 extern __checkReturn efx_rc_t 272 siena_vpd_reinit( 273 __in efx_nic_t *enp, 274 __in_bcount(size) caddr_t data, 275 __in size_t size); 276 277 extern __checkReturn efx_rc_t 278 siena_vpd_get( 279 __in efx_nic_t *enp, 280 __in_bcount(size) caddr_t data, 281 __in size_t size, 282 __inout efx_vpd_value_t *evvp); 283 284 extern __checkReturn efx_rc_t 285 siena_vpd_set( 286 __in efx_nic_t *enp, 287 __in_bcount(size) caddr_t data, 288 __in size_t size, 289 __in efx_vpd_value_t *evvp); 290 291 extern __checkReturn efx_rc_t 292 siena_vpd_next( 293 __in efx_nic_t *enp, 294 __in_bcount(size) caddr_t data, 295 __in size_t size, 296 __out efx_vpd_value_t *evvp, 297 __inout unsigned int *contp); 298 299 extern __checkReturn efx_rc_t 300 siena_vpd_write( 301 __in efx_nic_t *enp, 302 __in_bcount(size) caddr_t data, 303 __in size_t size); 304 305 extern void 306 siena_vpd_fini( 307 __in efx_nic_t *enp); 308 309 #endif /* EFSYS_OPT_VPD */ 310 311 typedef struct siena_link_state_s { 312 uint32_t sls_adv_cap_mask; 313 uint32_t sls_lp_cap_mask; 314 unsigned int sls_fcntl; 315 efx_link_mode_t sls_link_mode; 316 #if EFSYS_OPT_LOOPBACK 317 efx_loopback_type_t sls_loopback; 318 #endif 319 boolean_t sls_mac_up; 320 } siena_link_state_t; 321 322 extern void 323 siena_phy_link_ev( 324 __in efx_nic_t *enp, 325 __in efx_qword_t *eqp, 326 __out efx_link_mode_t *link_modep); 327 328 extern __checkReturn efx_rc_t 329 siena_phy_get_link( 330 __in efx_nic_t *enp, 331 __out siena_link_state_t *slsp); 332 333 extern __checkReturn efx_rc_t 334 siena_phy_power( 335 __in efx_nic_t *enp, 336 __in boolean_t on); 337 338 extern __checkReturn efx_rc_t 339 siena_phy_reconfigure( 340 __in efx_nic_t *enp); 341 342 extern __checkReturn efx_rc_t 343 siena_phy_verify( 344 __in efx_nic_t *enp); 345 346 extern __checkReturn efx_rc_t 347 siena_phy_oui_get( 348 __in efx_nic_t *enp, 349 __out uint32_t *ouip); 350 351 #if EFSYS_OPT_PHY_STATS 352 353 extern void 354 siena_phy_decode_stats( 355 __in efx_nic_t *enp, 356 __in uint32_t vmask, 357 __in_opt efsys_mem_t *esmp, 358 __out_opt uint64_t *smaskp, 359 __inout_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat); 360 361 extern __checkReturn efx_rc_t 362 siena_phy_stats_update( 363 __in efx_nic_t *enp, 364 __in efsys_mem_t *esmp, 365 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat); 366 367 #endif /* EFSYS_OPT_PHY_STATS */ 368 369 #if EFSYS_OPT_BIST 370 371 extern __checkReturn efx_rc_t 372 siena_phy_bist_start( 373 __in efx_nic_t *enp, 374 __in efx_bist_type_t type); 375 376 extern __checkReturn efx_rc_t 377 siena_phy_bist_poll( 378 __in efx_nic_t *enp, 379 __in efx_bist_type_t type, 380 __out efx_bist_result_t *resultp, 381 __out_opt __drv_when(count > 0, __notnull) 382 uint32_t *value_maskp, 383 __out_ecount_opt(count) __drv_when(count > 0, __notnull) 384 unsigned long *valuesp, 385 __in size_t count); 386 387 extern void 388 siena_phy_bist_stop( 389 __in efx_nic_t *enp, 390 __in efx_bist_type_t type); 391 392 #endif /* EFSYS_OPT_BIST */ 393 394 extern __checkReturn efx_rc_t 395 siena_mac_poll( 396 __in efx_nic_t *enp, 397 __out efx_link_mode_t *link_modep); 398 399 extern __checkReturn efx_rc_t 400 siena_mac_up( 401 __in efx_nic_t *enp, 402 __out boolean_t *mac_upp); 403 404 extern __checkReturn efx_rc_t 405 siena_mac_reconfigure( 406 __in efx_nic_t *enp); 407 408 extern __checkReturn efx_rc_t 409 siena_mac_pdu_get( 410 __in efx_nic_t *enp, 411 __out size_t *pdu); 412 413 #if EFSYS_OPT_LOOPBACK 414 415 extern __checkReturn efx_rc_t 416 siena_mac_loopback_set( 417 __in efx_nic_t *enp, 418 __in efx_link_mode_t link_mode, 419 __in efx_loopback_type_t loopback_type); 420 421 #endif /* EFSYS_OPT_LOOPBACK */ 422 423 #if EFSYS_OPT_MAC_STATS 424 425 extern __checkReturn efx_rc_t 426 siena_mac_stats_get_mask( 427 __in efx_nic_t *enp, 428 __inout_bcount(mask_size) uint32_t *maskp, 429 __in size_t mask_size); 430 431 extern __checkReturn efx_rc_t 432 siena_mac_stats_update( 433 __in efx_nic_t *enp, 434 __in efsys_mem_t *esmp, 435 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat, 436 __inout_opt uint32_t *generationp); 437 438 #endif /* EFSYS_OPT_MAC_STATS */ 439 440 #ifdef __cplusplus 441 } 442 #endif 443 444 #endif /* _SYS_SIENA_IMPL_H */ 445