1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2012 The FreeBSD Foundation
5 * All rights reserved.
6 *
7 * This software was developed by Oleksandr Rybalko under sponsorship
8 * from the FreeBSD Foundation.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD: stable/12/sys/dev/ata/chipsets/ata-fsl.c 326255 2017-11-27 14:52:40Z pfg $");
34
35 #include <sys/param.h>
36 #include <sys/module.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/ata.h>
40 #include <sys/bus.h>
41 #include <sys/endian.h>
42 #include <sys/malloc.h>
43 #include <sys/lock.h>
44 #include <sys/mutex.h>
45 #include <sys/sema.h>
46 #include <sys/taskqueue.h>
47 #include <vm/uma.h>
48 #include <machine/stdarg.h>
49 #include <machine/resource.h>
50 #include <machine/bus.h>
51 #include <sys/rman.h>
52 #include <dev/pci/pcivar.h>
53 #include <dev/pci/pcireg.h>
54 #include <dev/ata/ata-all.h>
55 #include <dev/ata/ata-pci.h>
56 #include <ata_if.h>
57
58 #include <dev/fdt/fdt_common.h>
59 #include <dev/ofw/openfirm.h>
60 #include <dev/ofw/ofw_bus.h>
61 #include <dev/ofw/ofw_bus_subr.h>
62
63 #include <machine/fdt.h>
64
65 /* local prototypes */
66 static int imx_ata_ch_attach(device_t dev);
67 static int imx_ata_setmode(device_t dev, int target, int mode);
68
69 static int
imx_ata_probe(device_t dev)70 imx_ata_probe(device_t dev)
71 {
72 struct ata_pci_controller *ctrl;
73
74 if (!ofw_bus_status_okay(dev))
75 return (ENXIO);
76
77 if (!ofw_bus_is_compatible(dev, "fsl,imx51-ata") &&
78 !ofw_bus_is_compatible(dev, "fsl,imx53-ata"))
79 return (ENXIO);
80
81 ctrl = device_get_softc(dev);
82
83 device_set_desc(dev, "Freescale Integrated PATA Controller");
84 return (BUS_PROBE_LOW_PRIORITY);
85 }
86
87 static void
imx_ata_intr(void * data)88 imx_ata_intr(void *data)
89 {
90 struct ata_pci_controller *ctrl = data;
91
92 bus_write_2(ctrl->r_res1, 0x28, bus_read_2(ctrl->r_res1, 0x28));
93 ctrl->interrupt[0].function(ctrl->interrupt[0].argument);
94 }
95
96 static int
imx_ata_attach(device_t dev)97 imx_ata_attach(device_t dev)
98 {
99 struct ata_pci_controller *ctrl;
100 device_t child;
101 int unit;
102
103 ctrl = device_get_softc(dev);
104 /* do chipset specific setups only needed once */
105 ctrl->legacy = ata_legacy(dev);
106 ctrl->channels = 1;
107 ctrl->ichannels = -1;
108 ctrl->ch_attach = ata_pci_ch_attach;
109 ctrl->ch_detach = ata_pci_ch_detach;
110 ctrl->dev = dev;
111
112 ctrl->r_type1 = SYS_RES_MEMORY;
113 ctrl->r_rid1 = 0;
114 ctrl->r_res1 = bus_alloc_resource_any(dev, ctrl->r_type1,
115 &ctrl->r_rid1, RF_ACTIVE);
116
117 if (ata_setup_interrupt(dev, imx_ata_intr)) {
118 device_printf(dev, "failed to setup interrupt\n");
119 return ENXIO;
120 }
121
122 ctrl->channels = 1;
123
124 ctrl->ch_attach = imx_ata_ch_attach;
125 ctrl->setmode = imx_ata_setmode;
126
127 /* attach all channels on this controller */
128 unit = 0;
129 child = device_add_child(dev, "ata", ((unit == 0) && ctrl->legacy) ?
130 unit : devclass_find_free_unit(ata_devclass, 2));
131 if (child == NULL)
132 device_printf(dev, "failed to add ata child device\n");
133 else
134 device_set_ivars(child, (void *)(intptr_t)unit);
135
136 bus_generic_attach(dev);
137 return 0;
138 }
139
140 static int
imx_ata_ch_attach(device_t dev)141 imx_ata_ch_attach(device_t dev)
142 {
143 struct ata_pci_controller *ctrl;
144 struct ata_channel *ch;
145 int i;
146
147 ctrl = device_get_softc(device_get_parent(dev));
148 ch = device_get_softc(dev);
149 for (i = ATA_DATA; i < ATA_MAX_RES; i++)
150 ch->r_io[i].res = ctrl->r_res1;
151
152 bus_write_2(ctrl->r_res1, 0x24, 0x80);
153 DELAY(100);
154 bus_write_2(ctrl->r_res1, 0x24, 0xc0);
155 DELAY(100);
156
157
158 /* Write TIME_OFF/ON/1/2W */
159 bus_write_1(ctrl->r_res1, 0x00, 3);
160 bus_write_1(ctrl->r_res1, 0x01, 3);
161 bus_write_1(ctrl->r_res1, 0x02, (25 + 15) / 15);
162 bus_write_1(ctrl->r_res1, 0x03, (70 + 15) / 15);
163
164 /* Write TIME_2R/AX/RDX/4 */
165 bus_write_1(ctrl->r_res1, 0x04, (70 + 15) / 15);
166 bus_write_1(ctrl->r_res1, 0x05, (50 + 15) / 15 + 2);
167 bus_write_1(ctrl->r_res1, 0x06, 1);
168 bus_write_1(ctrl->r_res1, 0x07, (10 + 15) / 15);
169
170 /* Write TIME_9 ; the rest of timing registers is irrelevant for PIO */
171 bus_write_1(ctrl->r_res1, 0x08, (10 + 15) / 15);
172
173 bus_write_2(ctrl->r_res1, 0x24, 0xc1);
174 DELAY(30000);
175
176 /* setup ATA registers */
177 ch->r_io[ATA_DATA ].offset = 0xa0;
178 ch->r_io[ATA_FEATURE].offset = 0xa4;
179 ch->r_io[ATA_ERROR ].offset = 0xa4;
180 ch->r_io[ATA_COUNT ].offset = 0xa8;
181 ch->r_io[ATA_SECTOR ].offset = 0xac;
182 ch->r_io[ATA_CYL_LSB].offset = 0xb0;
183 ch->r_io[ATA_CYL_MSB].offset = 0xb4;
184 ch->r_io[ATA_DRIVE ].offset = 0xb8;
185 ch->r_io[ATA_COMMAND].offset = 0xbc;
186
187 ch->r_io[ATA_STATUS ].offset = 0xbc;
188 ch->r_io[ATA_ALTSTAT].offset = 0xd8;
189 ch->r_io[ATA_CONTROL].offset = 0xd8;
190
191 ata_pci_hw(dev);
192
193 ch->flags |= ATA_NO_SLAVE;
194 ch->flags |= ATA_USE_16BIT;
195 ch->flags |= ATA_CHECKS_CABLE;
196 ch->flags |= ATA_KNOWN_PRESENCE;
197
198 /* Clear pending interrupts. */
199 bus_write_2(ctrl->r_res1, 0x28, 0xf8);
200 /* Enable all, but Idle interrupts. */
201 bus_write_2(ctrl->r_res1, 0x2c, 0x88);
202
203 return 0;
204 }
205
206 static int
imx_ata_setmode(device_t dev,int target,int mode)207 imx_ata_setmode(device_t dev, int target, int mode)
208 {
209
210 return (min(mode, ATA_PIO4));
211 }
212
213 static device_method_t imx_ata_methods[] = {
214 DEVMETHOD(device_probe, imx_ata_probe),
215 DEVMETHOD(device_attach, imx_ata_attach),
216 DEVMETHOD(device_detach, ata_pci_detach),
217 DEVMETHOD(device_suspend, ata_pci_suspend),
218 DEVMETHOD(device_resume, ata_pci_resume),
219 DEVMETHOD(device_shutdown, bus_generic_shutdown),
220 DEVMETHOD(bus_read_ivar, ata_pci_read_ivar),
221 DEVMETHOD(bus_write_ivar, ata_pci_write_ivar),
222 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
223 DEVMETHOD(bus_release_resource, ata_pci_release_resource),
224 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
225 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
226 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
227 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
228 DEVMETHOD(pci_read_config, ata_pci_read_config),
229 DEVMETHOD(pci_write_config, ata_pci_write_config),
230 DEVMETHOD(bus_print_child, ata_pci_print_child),
231 DEVMETHOD(bus_child_location_str, ata_pci_child_location_str),
232 DEVMETHOD_END
233 };
234 static driver_t imx_ata_driver = {
235 "atapci",
236 imx_ata_methods,
237 sizeof(struct ata_pci_controller)
238 };
239 DRIVER_MODULE(imx_ata, simplebus, imx_ata_driver, ata_pci_devclass, NULL,
240 NULL);
241 MODULE_VERSION(imx_ata, 1);
242 MODULE_DEPEND(imx_ata, ata, 1, 1, 1);
243 MODULE_DEPEND(imx_ata, atapci, 1, 1, 1);
244