1# Copyright (c) 2001, 2008, Juniper Networks, Inc.
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions
6# are met:
7# 1. Redistributions of source code must retain the above copyright
8#    notice, this list of conditions and the following disclaimer.
9# 2. Redistributions in binary form must reproduce the above copyright
10#    notice, this list of conditions and the following disclaimer in the
11#    documentation and/or other materials provided with the distribution.
12# 3. Neither the name of the Juniper Networks, Inc. nor the names of its
13#    contributors may be used to endorse or promote products derived from
14#    this software without specific prior written permission.
15#
16# THIS SOFTWARE IS PROVIDED BY JUNIPER NETWORKS AND CONTRIBUTORS ``AS IS'' AND
17# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19# ARE DISCLAIMED.  IN NO EVENT SHALL JUNIPER NETWORKS OR CONTRIBUTORS BE LIABLE
20# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26# SUCH DAMAGE.
27#
28#	JNPR: options.mips,v 1.2 2006/09/15 12:52:34
29# $FreeBSD: stable/12/sys/conf/options.mips 332441 2018-04-12 17:43:19Z br $
30
31CPU_MIPS4KC	opt_global.h
32CPU_MIPS24K	opt_global.h
33CPU_MIPS34K	opt_global.h
34CPU_MIPS74K	opt_global.h
35CPU_MIPS1004K	opt_global.h
36CPU_MIPS1074K	opt_global.h
37CPU_INTERAPTIV	opt_global.h
38CPU_PROAPTIV	opt_global.h
39CPU_MIPS32	opt_global.h
40CPU_MIPS64	opt_global.h
41CPU_SENTRY5	opt_global.h
42CPU_SB1 	opt_global.h
43CPU_CNMIPS	opt_global.h
44CPU_RMI		opt_global.h
45CPU_NLM		opt_global.h
46CPU_BERI	opt_global.h
47CPU_XBURST	opt_global.h
48CPU_MALTA	opt_global.h
49
50# which MACHINE_ARCH architecture
51MIPS
52MIPSHF
53MIPSEL
54MIPSELHF
55MIPS64
56MIPS64HF
57MIPS64EL
58MIPS64ELHF
59MIPSN32
60
61COMPAT_FREEBSD32	opt_global.h
62
63YAMON		opt_global.h
64CFE		opt_global.h
65CFE_CONSOLE	opt_global.h
66CFE_ENV		opt_global.h
67CFE_ENV_SIZE	opt_global.h
68
69GFB_DEBUG		opt_gfb.h
70GFB_NO_FONT_LOADING	opt_gfb.h
71GFB_NO_MODE_CHANGE	opt_gfb.h
72
73NOFPU		opt_global.h
74
75TICK_USE_YAMON_FREQ	opt_global.h
76TICK_USE_MALTA_RTC	opt_global.h
77
78#
79# The highest memory address that can be used by the kernel in units of KB.
80#
81MAXMEM			opt_global.h
82
83#
84# Manual override of cache config
85#
86MIPS_DISABLE_L1_CACHE	opt_global.h
87
88#
89# Options that control the Cavium Simple Executive.
90#
91OCTEON_MODEL			opt_cvmx.h
92OCTEON_VENDOR_LANNER		opt_cvmx.h
93OCTEON_VENDOR_UBIQUITI		opt_cvmx.h
94OCTEON_VENDOR_RADISYS		opt_cvmx.h
95OCTEON_VENDOR_GEFES		opt_cvmx.h
96OCTEON_BOARD_CAPK_0100ND	opt_cvmx.h
97
98#
99# Options specific to the BERI platform.
100#
101BERI_LARGE_TLB			opt_global.h
102PLATFORM_INIT_SECONDARY		opt_global.h
103
104#
105# Options that control the NetFPGA-10G Embedded CPU Ethernet Core.
106#
107NF10BMAC_64BIT			opt_netfpga.h
108
109#
110# Options that control the Atheros SoC peripherals
111#
112ARGE_DEBUG			opt_arge.h
113ARGE_MDIO			opt_arge.h
114
115#
116# At least one of the AR71XX ubiquiti boards has a Redboot configuration
117# that "lies" about the amount of RAM it has. Until a cleaner method is
118# defined, this option will suffice in overriding what Redboot says.
119#
120AR71XX_REALMEM			opt_ar71xx.h
121AR71XX_ENV_UBOOT		opt_ar71xx.h
122AR71XX_ENV_REDBOOT		opt_ar71xx.h
123AR71XX_ENV_ROUTERBOOT		opt_ar71xx.h
124AR71XX_ATH_EEPROM		opt_ar71xx.h
125
126#
127# Options for AR531X SOC. AR531X_1ST_GENERATION is AR5311 to AR5314.
128#
129
130AR531X_1ST_GENERATION		opt_ar531x.h
131AR531X_REALMEM			opt_ar531x.h
132AR531X_ENV_UBOOT		opt_ar531x.h
133AR531X_APB_DEBUG		opt_ar531x.h
134ARE_MDIO			opt_ar531x.h
135ARE_MII				opt_ar531x.h
136
137#
138# Options that control the Ralink RT305xF Etherenet MAC.
139#
140IF_RT_DEBUG			opt_if_rt.h
141IF_RT_PHY_SUPPORT		opt_if_rt.h
142IF_RT_RING_DATA_COUNT		opt_if_rt.h
143
144#
145# Options that control the Ralink/Mediatek SoC type.
146#
147MT7620				opt_rt305x.h
148RT5350				opt_rt305x.h
149RT305XF				opt_rt305x.h
150RT3052F				opt_rt305x.h
151RT3050F				opt_rt305x.h
152RT305X				opt_rt305x.h
153RT305X_UBOOT			opt_rt305x.h
154RT305X_USE_UART			opt_rt305x.h
155RT_MDIO				opt_rt305x.h
156
157#
158# Options that affect the pmap.
159#
160PV_STATS		opt_pmap.h
161
162#
163# Options to use INTRNG code
164#
165INTRNG			opt_global.h
166MIPS_NIRQ		opt_global.h
167