1 /*
2  * Copyright (c) 1992, 1993
3  *	The Regents of the University of California.  All rights reserved.
4  *
5  * This software was developed by the Computer Systems Engineering group
6  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
7  * contributed to Berkeley.
8  *
9  * All advertising materials mentioning features or use of this software
10  * must display the following acknowledgement:
11  *	This product includes software developed by the University of
12  *	California, Lawrence Berkeley Laboratory.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions
16  * are met:
17  * 1. Redistributions of source code must retain the above copyright
18  *    notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  *    notice, this list of conditions and the following disclaimer in the
21  *    documentation and/or other materials provided with the distribution.
22  * 3. Neither the name of the University nor the names of its contributors
23  *    may be used to endorse or promote products derived from this software
24  *    without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  *	@(#)fpu_mul.c	8.1 (Berkeley) 6/11/93
39  *	$NetBSD: fpu_mul.c,v 1.2 1994/11/20 20:52:44 deraadt Exp $
40  */
41 
42 #include <sys/cdefs.h>
43 __FBSDID("$FreeBSD: stable/12/lib/libc/sparc64/fpu/fpu_mul.c 314436 2017-02-28 23:42:47Z imp $");
44 
45 /*
46  * Perform an FPU multiply (return x * y).
47  */
48 
49 #include <sys/types.h>
50 
51 #include <machine/frame.h>
52 #include <machine/fp.h>
53 
54 #include "fpu_arith.h"
55 #include "fpu_emu.h"
56 #include "fpu_extern.h"
57 
58 /*
59  * The multiplication algorithm for normal numbers is as follows:
60  *
61  * The fraction of the product is built in the usual stepwise fashion.
62  * Each step consists of shifting the accumulator right one bit
63  * (maintaining any guard bits) and, if the next bit in y is set,
64  * adding the multiplicand (x) to the accumulator.  Then, in any case,
65  * we advance one bit leftward in y.  Algorithmically:
66  *
67  *	A = 0;
68  *	for (bit = 0; bit < FP_NMANT; bit++) {
69  *		sticky |= A & 1, A >>= 1;
70  *		if (Y & (1 << bit))
71  *			A += X;
72  *	}
73  *
74  * (X and Y here represent the mantissas of x and y respectively.)
75  * The resultant accumulator (A) is the product's mantissa.  It may
76  * be as large as 11.11111... in binary and hence may need to be
77  * shifted right, but at most one bit.
78  *
79  * Since we do not have efficient multiword arithmetic, we code the
80  * accumulator as four separate words, just like any other mantissa.
81  * We use local `register' variables in the hope that this is faster
82  * than memory.  We keep x->fp_mant in locals for the same reason.
83  *
84  * In the algorithm above, the bits in y are inspected one at a time.
85  * We will pick them up 32 at a time and then deal with those 32, one
86  * at a time.  Note, however, that we know several things about y:
87  *
88  *    - the guard and round bits at the bottom are sure to be zero;
89  *
90  *    - often many low bits are zero (y is often from a single or double
91  *	precision source);
92  *
93  *    - bit FP_NMANT-1 is set, and FP_1*2 fits in a word.
94  *
95  * We can also test for 32-zero-bits swiftly.  In this case, the center
96  * part of the loop---setting sticky, shifting A, and not adding---will
97  * run 32 times without adding X to A.  We can do a 32-bit shift faster
98  * by simply moving words.  Since zeros are common, we optimize this case.
99  * Furthermore, since A is initially zero, we can omit the shift as well
100  * until we reach a nonzero word.
101  */
102 struct fpn *
__fpu_mul(fe)103 __fpu_mul(fe)
104 	struct fpemu *fe;
105 {
106 	struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
107 	u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m;
108 	int sticky;
109 	FPU_DECL_CARRY
110 
111 	/*
112 	 * Put the `heavier' operand on the right (see fpu_emu.h).
113 	 * Then we will have one of the following cases, taken in the
114 	 * following order:
115 	 *
116 	 *  - y = NaN.  Implied: if only one is a signalling NaN, y is.
117 	 *	The result is y.
118 	 *  - y = Inf.  Implied: x != NaN (is 0, number, or Inf: the NaN
119 	 *    case was taken care of earlier).
120 	 *	If x = 0, the result is NaN.  Otherwise the result
121 	 *	is y, with its sign reversed if x is negative.
122 	 *  - x = 0.  Implied: y is 0 or number.
123 	 *	The result is 0 (with XORed sign as usual).
124 	 *  - other.  Implied: both x and y are numbers.
125 	 *	The result is x * y (XOR sign, multiply bits, add exponents).
126 	 */
127 	ORDER(x, y);
128 	if (ISNAN(y))
129 		return (y);
130 	if (ISINF(y)) {
131 		if (ISZERO(x))
132 			return (__fpu_newnan(fe));
133 		y->fp_sign ^= x->fp_sign;
134 		return (y);
135 	}
136 	if (ISZERO(x)) {
137 		x->fp_sign ^= y->fp_sign;
138 		return (x);
139 	}
140 
141 	/*
142 	 * Setup.  In the code below, the mask `m' will hold the current
143 	 * mantissa byte from y.  The variable `bit' denotes the bit
144 	 * within m.  We also define some macros to deal with everything.
145 	 */
146 	x3 = x->fp_mant[3];
147 	x2 = x->fp_mant[2];
148 	x1 = x->fp_mant[1];
149 	x0 = x->fp_mant[0];
150 	sticky = a3 = a2 = a1 = a0 = 0;
151 
152 #define	ADD	/* A += X */ \
153 	FPU_ADDS(a3, a3, x3); \
154 	FPU_ADDCS(a2, a2, x2); \
155 	FPU_ADDCS(a1, a1, x1); \
156 	FPU_ADDC(a0, a0, x0)
157 
158 #define	SHR1	/* A >>= 1, with sticky */ \
159 	sticky |= a3 & 1, a3 = (a3 >> 1) | (a2 << 31), \
160 	a2 = (a2 >> 1) | (a1 << 31), a1 = (a1 >> 1) | (a0 << 31), a0 >>= 1
161 
162 #define	SHR32	/* A >>= 32, with sticky */ \
163 	sticky |= a3, a3 = a2, a2 = a1, a1 = a0, a0 = 0
164 
165 #define	STEP	/* each 1-bit step of the multiplication */ \
166 	SHR1; if (bit & m) { ADD; }; bit <<= 1
167 
168 	/*
169 	 * We are ready to begin.  The multiply loop runs once for each
170 	 * of the four 32-bit words.  Some words, however, are special.
171 	 * As noted above, the low order bits of Y are often zero.  Even
172 	 * if not, the first loop can certainly skip the guard bits.
173 	 * The last word of y has its highest 1-bit in position FP_NMANT-1,
174 	 * so we stop the loop when we move past that bit.
175 	 */
176 	if ((m = y->fp_mant[3]) == 0) {
177 		/* SHR32; */			/* unneeded since A==0 */
178 	} else {
179 		bit = 1 << FP_NG;
180 		do {
181 			STEP;
182 		} while (bit != 0);
183 	}
184 	if ((m = y->fp_mant[2]) == 0) {
185 		SHR32;
186 	} else {
187 		bit = 1;
188 		do {
189 			STEP;
190 		} while (bit != 0);
191 	}
192 	if ((m = y->fp_mant[1]) == 0) {
193 		SHR32;
194 	} else {
195 		bit = 1;
196 		do {
197 			STEP;
198 		} while (bit != 0);
199 	}
200 	m = y->fp_mant[0];		/* definitely != 0 */
201 	bit = 1;
202 	do {
203 		STEP;
204 	} while (bit <= m);
205 
206 	/*
207 	 * Done with mantissa calculation.  Get exponent and handle
208 	 * 11.111...1 case, then put result in place.  We reuse x since
209 	 * it already has the right class (FP_NUM).
210 	 */
211 	m = x->fp_exp + y->fp_exp;
212 	if (a0 >= FP_2) {
213 		SHR1;
214 		m++;
215 	}
216 	x->fp_sign ^= y->fp_sign;
217 	x->fp_exp = m;
218 	x->fp_sticky = sticky;
219 	x->fp_mant[3] = a3;
220 	x->fp_mant[2] = a2;
221 	x->fp_mant[1] = a1;
222 	x->fp_mant[0] = a0;
223 	return (x);
224 }
225