1 /*-
2 * Copyright (c) 2003 Jake Burkholder.
3 * Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD: stable/10/sys/sparc64/fhc/fhc.c 227848 2011-11-22 21:55:40Z marius $");
30
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/bus.h>
34 #include <sys/kernel.h>
35 #include <sys/malloc.h>
36 #include <sys/module.h>
37 #include <sys/pcpu.h>
38
39 #include <dev/led/led.h>
40 #include <dev/ofw/ofw_bus.h>
41 #include <dev/ofw/ofw_bus_subr.h>
42 #include <dev/ofw/openfirm.h>
43
44 #include <machine/bus.h>
45 #include <machine/bus_common.h>
46 #include <machine/resource.h>
47
48 #include <sys/rman.h>
49
50 #include <sparc64/fhc/fhcreg.h>
51 #include <sparc64/sbus/ofw_sbus.h>
52
53 struct fhc_devinfo {
54 struct ofw_bus_devinfo fdi_obdinfo;
55 struct resource_list fdi_rl;
56 };
57
58 struct fhc_softc {
59 struct resource *sc_memres[FHC_NREG];
60 int sc_nrange;
61 struct sbus_ranges *sc_ranges;
62 int sc_ign;
63 struct cdev *sc_led_dev;
64 };
65
66 static device_probe_t fhc_probe;
67 static device_attach_t fhc_attach;
68 static bus_print_child_t fhc_print_child;
69 static bus_probe_nomatch_t fhc_probe_nomatch;
70 static bus_setup_intr_t fhc_setup_intr;
71 static bus_alloc_resource_t fhc_alloc_resource;
72 static bus_adjust_resource_t fhc_adjust_resource;
73 static bus_get_resource_list_t fhc_get_resource_list;
74 static ofw_bus_get_devinfo_t fhc_get_devinfo;
75
76 static void fhc_intr_enable(void *);
77 static void fhc_intr_disable(void *);
78 static void fhc_intr_assign(void *);
79 static void fhc_intr_clear(void *);
80 static void fhc_led_func(void *, int);
81 static int fhc_print_res(struct fhc_devinfo *);
82
83 static device_method_t fhc_methods[] = {
84 /* Device interface */
85 DEVMETHOD(device_probe, fhc_probe),
86 DEVMETHOD(device_attach, fhc_attach),
87 DEVMETHOD(device_shutdown, bus_generic_shutdown),
88 DEVMETHOD(device_suspend, bus_generic_suspend),
89 DEVMETHOD(device_resume, bus_generic_resume),
90
91 /* Bus interface */
92 DEVMETHOD(bus_print_child, fhc_print_child),
93 DEVMETHOD(bus_probe_nomatch, fhc_probe_nomatch),
94 DEVMETHOD(bus_alloc_resource, fhc_alloc_resource),
95 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
96 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
97 DEVMETHOD(bus_adjust_resource, fhc_adjust_resource),
98 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
99 DEVMETHOD(bus_setup_intr, fhc_setup_intr),
100 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
101 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
102 DEVMETHOD(bus_get_resource_list, fhc_get_resource_list),
103 DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str),
104
105 /* ofw_bus interface */
106 DEVMETHOD(ofw_bus_get_devinfo, fhc_get_devinfo),
107 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
108 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
109 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
110 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
111 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
112
113 DEVMETHOD_END
114 };
115
116 static driver_t fhc_driver = {
117 "fhc",
118 fhc_methods,
119 sizeof(struct fhc_softc),
120 };
121
122 static devclass_t fhc_devclass;
123
124 EARLY_DRIVER_MODULE(fhc, central, fhc_driver, fhc_devclass, 0, 0,
125 BUS_PASS_BUS);
126 MODULE_DEPEND(fhc, central, 1, 1, 1);
127 EARLY_DRIVER_MODULE(fhc, nexus, fhc_driver, fhc_devclass, 0, 0,
128 BUS_PASS_BUS);
129 MODULE_DEPEND(fhc, nexus, 1, 1, 1);
130 MODULE_VERSION(fhc, 1);
131
132 static const struct intr_controller fhc_ic = {
133 fhc_intr_enable,
134 fhc_intr_disable,
135 fhc_intr_assign,
136 fhc_intr_clear
137 };
138
139 struct fhc_icarg {
140 struct fhc_softc *fica_sc;
141 struct resource *fica_memres;
142 };
143
144 static int
fhc_probe(device_t dev)145 fhc_probe(device_t dev)
146 {
147
148 if (strcmp(ofw_bus_get_name(dev), "fhc") == 0) {
149 device_set_desc(dev, "fhc");
150 return (0);
151 }
152 return (ENXIO);
153 }
154
155 static int
fhc_attach(device_t dev)156 fhc_attach(device_t dev)
157 {
158 char ledname[sizeof("boardXX")];
159 struct fhc_devinfo *fdi;
160 struct fhc_icarg *fica;
161 struct fhc_softc *sc;
162 struct sbus_regs *reg;
163 phandle_t child;
164 phandle_t node;
165 device_t cdev;
166 uint32_t board;
167 uint32_t ctrl;
168 uint32_t *intr;
169 uint32_t iv;
170 char *name;
171 int central;
172 int error;
173 int i;
174 int j;
175
176 sc = device_get_softc(dev);
177 node = ofw_bus_get_node(dev);
178
179 central = 0;
180 if (strcmp(device_get_name(device_get_parent(dev)), "central") == 0)
181 central = 1;
182
183 for (i = 0; i < FHC_NREG; i++) {
184 j = i;
185 sc->sc_memres[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
186 &j, RF_ACTIVE);
187 if (sc->sc_memres[i] == NULL) {
188 device_printf(dev, "cannot allocate resource %d\n", i);
189 error = ENXIO;
190 goto fail_memres;
191 }
192 }
193
194 if (central != 0) {
195 board = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_BSR);
196 board = ((board >> 16) & 0x1) | ((board >> 12) & 0xe);
197 } else {
198 if (OF_getprop(node, "board#", &board, sizeof(board)) == -1) {
199 device_printf(dev, "cannot get board number\n");
200 error = ENXIO;
201 goto fail_memres;
202 }
203 }
204
205 device_printf(dev, "board %d, ", board);
206 if (OF_getprop_alloc(node, "board-model", 1, (void **)&name) != -1) {
207 printf("model %s\n", name);
208 free(name, M_OFWPROP);
209 } else
210 printf("model unknown\n");
211
212 for (i = FHC_FANFAIL; i <= FHC_TOD; i++) {
213 bus_write_4(sc->sc_memres[i], FHC_ICLR, INTCLR_IDLE);
214 (void)bus_read_4(sc->sc_memres[i], FHC_ICLR);
215 }
216
217 sc->sc_ign = board << 1;
218 bus_write_4(sc->sc_memres[FHC_IGN], 0x0, sc->sc_ign);
219 sc->sc_ign = bus_read_4(sc->sc_memres[FHC_IGN], 0x0);
220
221 ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
222 if (central == 0)
223 ctrl |= FHC_CTRL_IXIST;
224 ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE);
225 bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl);
226 (void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
227
228 sc->sc_nrange = OF_getprop_alloc(node, "ranges",
229 sizeof(*sc->sc_ranges), (void **)&sc->sc_ranges);
230 if (sc->sc_nrange == -1) {
231 device_printf(dev, "cannot get ranges\n");
232 error = ENXIO;
233 goto fail_memres;
234 }
235
236 /*
237 * Apparently only the interrupt controller of boards hanging off
238 * of central(4) is indented to be used, otherwise we would have
239 * conflicts registering the interrupt controllers for all FHC
240 * boards as the board number and thus the IGN isn't unique.
241 */
242 if (central == 1) {
243 /*
244 * Hunt through all the interrupt mapping regs and register
245 * our interrupt controller for the corresponding interrupt
246 * vectors. We do this early in order to be able to catch
247 * stray interrupts.
248 */
249 for (i = FHC_FANFAIL; i <= FHC_TOD; i++) {
250 fica = malloc(sizeof(*fica), M_DEVBUF, M_NOWAIT);
251 if (fica == NULL)
252 panic("%s: could not allocate interrupt "
253 "controller argument", __func__);
254 fica->fica_sc = sc;
255 fica->fica_memres = sc->sc_memres[i];
256 #ifdef FHC_DEBUG
257 device_printf(dev, "intr map %d: %#lx, clr: %#lx\n", i,
258 (u_long)bus_read_4(fica->fica_memres, FHC_IMAP),
259 (u_long)bus_read_4(fica->fica_memres, FHC_ICLR));
260 #endif
261 /*
262 * XXX we only pick the INO rather than the INR
263 * from the IMR since the firmware may not provide
264 * the IGN and the IGN is constant for all devices
265 * on that FireHose controller.
266 */
267 j = intr_controller_register(INTMAP_VEC(sc->sc_ign,
268 INTINO(bus_read_4(fica->fica_memres, FHC_IMAP))),
269 &fhc_ic, fica);
270 if (j != 0)
271 device_printf(dev, "could not register "
272 "interrupt controller for map %d (%d)\n",
273 i, j);
274 }
275 } else {
276 snprintf(ledname, sizeof(ledname), "board%d", board);
277 sc->sc_led_dev = led_create(fhc_led_func, sc, ledname);
278 }
279
280 for (child = OF_child(node); child != 0; child = OF_peer(child)) {
281 fdi = malloc(sizeof(*fdi), M_DEVBUF, M_WAITOK | M_ZERO);
282 if (ofw_bus_gen_setup_devinfo(&fdi->fdi_obdinfo, child) != 0) {
283 free(fdi, M_DEVBUF);
284 continue;
285 }
286 i = OF_getprop_alloc(child, "reg", sizeof(*reg),
287 (void **)®);
288 if (i == -1) {
289 device_printf(dev, "<%s>: incomplete\n",
290 fdi->fdi_obdinfo.obd_name);
291 ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo);
292 free(fdi, M_DEVBUF);
293 continue;
294 }
295 resource_list_init(&fdi->fdi_rl);
296 for (j = 0; j < i; j++)
297 resource_list_add(&fdi->fdi_rl, SYS_RES_MEMORY, j,
298 reg[j].sbr_offset, reg[j].sbr_offset +
299 reg[j].sbr_size, reg[j].sbr_size);
300 free(reg, M_OFWPROP);
301 if (central == 1) {
302 i = OF_getprop_alloc(child, "interrupts",
303 sizeof(*intr), (void **)&intr);
304 if (i != -1) {
305 for (j = 0; j < i; j++) {
306 iv = INTMAP_VEC(sc->sc_ign, intr[j]);
307 resource_list_add(&fdi->fdi_rl,
308 SYS_RES_IRQ, j, iv, iv, 1);
309 }
310 free(intr, M_OFWPROP);
311 }
312 }
313 cdev = device_add_child(dev, NULL, -1);
314 if (cdev == NULL) {
315 device_printf(dev, "<%s>: device_add_child failed\n",
316 fdi->fdi_obdinfo.obd_name);
317 resource_list_free(&fdi->fdi_rl);
318 ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo);
319 free(fdi, M_DEVBUF);
320 continue;
321 }
322 device_set_ivars(cdev, fdi);
323 }
324
325 return (bus_generic_attach(dev));
326
327 fail_memres:
328 for (i = 0; i < FHC_NREG; i++)
329 if (sc->sc_memres[i] != NULL)
330 bus_release_resource(dev, SYS_RES_MEMORY,
331 rman_get_rid(sc->sc_memres[i]), sc->sc_memres[i]);
332 return (error);
333 }
334
335 static int
fhc_print_child(device_t dev,device_t child)336 fhc_print_child(device_t dev, device_t child)
337 {
338 int rv;
339
340 rv = bus_print_child_header(dev, child);
341 rv += fhc_print_res(device_get_ivars(child));
342 rv += bus_print_child_footer(dev, child);
343 return (rv);
344 }
345
346 static void
fhc_probe_nomatch(device_t dev,device_t child)347 fhc_probe_nomatch(device_t dev, device_t child)
348 {
349 const char *type;
350
351 device_printf(dev, "<%s>", ofw_bus_get_name(child));
352 fhc_print_res(device_get_ivars(child));
353 type = ofw_bus_get_type(child);
354 printf(" type %s (no driver attached)\n",
355 type != NULL ? type : "unknown");
356 }
357
358 static void
fhc_intr_enable(void * arg)359 fhc_intr_enable(void *arg)
360 {
361 struct intr_vector *iv = arg;
362 struct fhc_icarg *fica = iv->iv_icarg;
363
364 bus_write_4(fica->fica_memres, FHC_IMAP,
365 INTMAP_ENABLE(iv->iv_vec, iv->iv_mid));
366 (void)bus_read_4(fica->fica_memres, FHC_IMAP);
367 }
368
369 static void
fhc_intr_disable(void * arg)370 fhc_intr_disable(void *arg)
371 {
372 struct intr_vector *iv = arg;
373 struct fhc_icarg *fica = iv->iv_icarg;
374
375 bus_write_4(fica->fica_memres, FHC_IMAP, iv->iv_vec);
376 (void)bus_read_4(fica->fica_memres, FHC_IMAP);
377 }
378
379 static void
fhc_intr_assign(void * arg)380 fhc_intr_assign(void *arg)
381 {
382 struct intr_vector *iv = arg;
383 struct fhc_icarg *fica = iv->iv_icarg;
384
385 bus_write_4(fica->fica_memres, FHC_IMAP, INTMAP_TID(
386 bus_read_4(fica->fica_memres, FHC_IMAP), iv->iv_mid));
387 (void)bus_read_4(fica->fica_memres, FHC_IMAP);
388 }
389
390 static void
fhc_intr_clear(void * arg)391 fhc_intr_clear(void *arg)
392 {
393 struct intr_vector *iv = arg;
394 struct fhc_icarg *fica = iv->iv_icarg;
395
396 bus_write_4(fica->fica_memres, FHC_ICLR, INTCLR_IDLE);
397 (void)bus_read_4(fica->fica_memres, FHC_ICLR);
398 }
399
400 static int
fhc_setup_intr(device_t bus,device_t child,struct resource * r,int flags,driver_filter_t * filt,driver_intr_t * func,void * arg,void ** cookiep)401 fhc_setup_intr(device_t bus, device_t child, struct resource *r, int flags,
402 driver_filter_t *filt, driver_intr_t *func, void *arg, void **cookiep)
403 {
404 struct fhc_softc *sc;
405 u_long vec;
406
407 sc = device_get_softc(bus);
408 /*
409 * Make sure the vector is fully specified and we registered
410 * our interrupt controller for it.
411 */
412 vec = rman_get_start(r);
413 if (INTIGN(vec) != sc->sc_ign || intr_vectors[vec].iv_ic != &fhc_ic) {
414 device_printf(bus, "invalid interrupt vector 0x%lx\n", vec);
415 return (EINVAL);
416 }
417 return (bus_generic_setup_intr(bus, child, r, flags, filt, func,
418 arg, cookiep));
419 }
420
421 static struct resource *
fhc_alloc_resource(device_t bus,device_t child,int type,int * rid,u_long start,u_long end,u_long count,u_int flags)422 fhc_alloc_resource(device_t bus, device_t child, int type, int *rid,
423 u_long start, u_long end, u_long count, u_int flags)
424 {
425 struct resource_list *rl;
426 struct resource_list_entry *rle;
427 struct fhc_softc *sc;
428 struct resource *res;
429 bus_addr_t coffset;
430 bus_addr_t cend;
431 bus_addr_t phys;
432 int isdefault;
433 int passthrough;
434 int i;
435
436 isdefault = (start == 0UL && end == ~0UL);
437 passthrough = (device_get_parent(child) != bus);
438 res = NULL;
439 rle = NULL;
440 rl = BUS_GET_RESOURCE_LIST(bus, child);
441 sc = device_get_softc(bus);
442 switch (type) {
443 case SYS_RES_IRQ:
444 return (resource_list_alloc(rl, bus, child, type, rid, start,
445 end, count, flags));
446 case SYS_RES_MEMORY:
447 if (!passthrough) {
448 rle = resource_list_find(rl, type, *rid);
449 if (rle == NULL)
450 return (NULL);
451 if (rle->res != NULL)
452 panic("%s: resource entry is busy", __func__);
453 if (isdefault) {
454 start = rle->start;
455 count = ulmax(count, rle->count);
456 end = ulmax(rle->end, start + count - 1);
457 }
458 }
459 for (i = 0; i < sc->sc_nrange; i++) {
460 coffset = sc->sc_ranges[i].coffset;
461 cend = coffset + sc->sc_ranges[i].size - 1;
462 if (start >= coffset && end <= cend) {
463 start -= coffset;
464 end -= coffset;
465 phys = sc->sc_ranges[i].poffset |
466 ((bus_addr_t)sc->sc_ranges[i].pspace << 32);
467 res = bus_generic_alloc_resource(bus, child,
468 type, rid, phys + start, phys + end,
469 count, flags);
470 if (!passthrough)
471 rle->res = res;
472 break;
473 }
474 }
475 break;
476 }
477 return (res);
478 }
479
480 static int
fhc_adjust_resource(device_t bus __unused,device_t child __unused,int type __unused,struct resource * r __unused,u_long start __unused,u_long end __unused)481 fhc_adjust_resource(device_t bus __unused, device_t child __unused,
482 int type __unused, struct resource *r __unused, u_long start __unused,
483 u_long end __unused)
484 {
485
486 return (ENXIO);
487 }
488
489 static struct resource_list *
fhc_get_resource_list(device_t bus,device_t child)490 fhc_get_resource_list(device_t bus, device_t child)
491 {
492 struct fhc_devinfo *fdi;
493
494 fdi = device_get_ivars(child);
495 return (&fdi->fdi_rl);
496 }
497
498 static const struct ofw_bus_devinfo *
fhc_get_devinfo(device_t bus,device_t child)499 fhc_get_devinfo(device_t bus, device_t child)
500 {
501 struct fhc_devinfo *fdi;
502
503 fdi = device_get_ivars(child);
504 return (&fdi->fdi_obdinfo);
505 }
506
507 static void
fhc_led_func(void * arg,int onoff)508 fhc_led_func(void *arg, int onoff)
509 {
510 struct fhc_softc *sc;
511 uint32_t ctrl;
512
513 sc = (struct fhc_softc *)arg;
514
515 ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
516 if (onoff)
517 ctrl |= FHC_CTRL_RLED;
518 else
519 ctrl &= ~FHC_CTRL_RLED;
520 ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE);
521 bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl);
522 (void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
523 }
524
525 static int
fhc_print_res(struct fhc_devinfo * fdi)526 fhc_print_res(struct fhc_devinfo *fdi)
527 {
528 int rv;
529
530 rv = 0;
531 rv += resource_list_print_type(&fdi->fdi_rl, "mem", SYS_RES_MEMORY,
532 "%#lx");
533 rv += resource_list_print_type(&fdi->fdi_rl, "irq", SYS_RES_IRQ, "%ld");
534 return (rv);
535 }
536