1/* 2 * Device Tree Source for the r8a73a4 SoC 3 * 4 * Copyright (C) 2013 Renesas Solutions Corp. 5 * Copyright (C) 2013 Magnus Damm 6 * 7 * This file is licensed under the terms of the GNU General Public License 8 * version 2. This program is licensed "as is" without any warranty of any 9 * kind, whether express or implied. 10 */ 11 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/interrupt-controller/irq.h> 14 15/ { 16 compatible = "renesas,r8a73a4"; 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 20 21 cpus { 22 #address-cells = <1>; 23 #size-cells = <0>; 24 25 cpu0: cpu@0 { 26 device_type = "cpu"; 27 compatible = "arm,cortex-a15"; 28 reg = <0>; 29 clock-frequency = <1500000000>; 30 }; 31 }; 32 33 timer { 34 compatible = "arm,armv7-timer"; 35 interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 36 <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 37 <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 38 <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 39 }; 40 41 dbsc1: memory-controller@e6790000 { 42 compatible = "renesas,dbsc-r8a73a4"; 43 reg = <0 0xe6790000 0 0x10000>; 44 }; 45 46 dbsc2: memory-controller@e67a0000 { 47 compatible = "renesas,dbsc-r8a73a4"; 48 reg = <0 0xe67a0000 0 0x10000>; 49 }; 50 51 dmac: dma-multiplexer { 52 compatible = "renesas,shdma-mux"; 53 #dma-cells = <1>; 54 dma-channels = <20>; 55 dma-requests = <256>; 56 #address-cells = <2>; 57 #size-cells = <2>; 58 ranges; 59 60 dma0: dma-controller@e6700020 { 61 compatible = "renesas,shdma-r8a73a4"; 62 reg = <0 0xe6700020 0 0x89e0>; 63 interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH 64 0 200 IRQ_TYPE_LEVEL_HIGH 65 0 201 IRQ_TYPE_LEVEL_HIGH 66 0 202 IRQ_TYPE_LEVEL_HIGH 67 0 203 IRQ_TYPE_LEVEL_HIGH 68 0 204 IRQ_TYPE_LEVEL_HIGH 69 0 205 IRQ_TYPE_LEVEL_HIGH 70 0 206 IRQ_TYPE_LEVEL_HIGH 71 0 207 IRQ_TYPE_LEVEL_HIGH 72 0 208 IRQ_TYPE_LEVEL_HIGH 73 0 209 IRQ_TYPE_LEVEL_HIGH 74 0 210 IRQ_TYPE_LEVEL_HIGH 75 0 211 IRQ_TYPE_LEVEL_HIGH 76 0 212 IRQ_TYPE_LEVEL_HIGH 77 0 213 IRQ_TYPE_LEVEL_HIGH 78 0 214 IRQ_TYPE_LEVEL_HIGH 79 0 215 IRQ_TYPE_LEVEL_HIGH 80 0 216 IRQ_TYPE_LEVEL_HIGH 81 0 217 IRQ_TYPE_LEVEL_HIGH 82 0 218 IRQ_TYPE_LEVEL_HIGH 83 0 219 IRQ_TYPE_LEVEL_HIGH>; 84 interrupt-names = "error", 85 "ch0", "ch1", "ch2", "ch3", 86 "ch4", "ch5", "ch6", "ch7", 87 "ch8", "ch9", "ch10", "ch11", 88 "ch12", "ch13", "ch14", "ch15", 89 "ch16", "ch17", "ch18", "ch19"; 90 }; 91 }; 92 93 pfc: pfc@e6050000 { 94 compatible = "renesas,pfc-r8a73a4"; 95 reg = <0 0xe6050000 0 0x9000>; 96 gpio-controller; 97 #gpio-cells = <2>; 98 interrupts-extended = 99 <&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>, 100 <&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>, 101 <&irqc0 8 0>, <&irqc0 9 0>, <&irqc0 10 0>, <&irqc0 11 0>, 102 <&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>, 103 <&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>, 104 <&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>, 105 <&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>, 106 <&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>, 107 <&irqc1 0 0>, <&irqc1 1 0>, <&irqc1 2 0>, <&irqc1 3 0>, 108 <&irqc1 4 0>, <&irqc1 5 0>, <&irqc1 6 0>, <&irqc1 7 0>, 109 <&irqc1 8 0>, <&irqc1 9 0>, <&irqc1 10 0>, <&irqc1 11 0>, 110 <&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>, 111 <&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>, 112 <&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>, 113 <&irqc1 24 0>, <&irqc1 25 0>; 114 }; 115 116 i2c5: i2c@e60b0000 { 117 #address-cells = <1>; 118 #size-cells = <0>; 119 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; 120 reg = <0 0xe60b0000 0 0x428>; 121 interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>; 122 123 status = "disabled"; 124 }; 125 126 cmt1: timer@e6130000 { 127 compatible = "renesas,cmt-48-r8a73a4", "renesas,cmt-48-gen2"; 128 reg = <0 0xe6130000 0 0x1004>; 129 interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>; 130 131 renesas,channels-mask = <0xff>; 132 133 status = "disabled"; 134 }; 135 136 irqc0: interrupt-controller@e61c0000 { 137 compatible = "renesas,irqc-r8a73a4", "renesas,irqc"; 138 #interrupt-cells = <2>; 139 interrupt-controller; 140 reg = <0 0xe61c0000 0 0x200>; 141 interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, 142 <0 1 IRQ_TYPE_LEVEL_HIGH>, 143 <0 2 IRQ_TYPE_LEVEL_HIGH>, 144 <0 3 IRQ_TYPE_LEVEL_HIGH>, 145 <0 4 IRQ_TYPE_LEVEL_HIGH>, 146 <0 5 IRQ_TYPE_LEVEL_HIGH>, 147 <0 6 IRQ_TYPE_LEVEL_HIGH>, 148 <0 7 IRQ_TYPE_LEVEL_HIGH>, 149 <0 8 IRQ_TYPE_LEVEL_HIGH>, 150 <0 9 IRQ_TYPE_LEVEL_HIGH>, 151 <0 10 IRQ_TYPE_LEVEL_HIGH>, 152 <0 11 IRQ_TYPE_LEVEL_HIGH>, 153 <0 12 IRQ_TYPE_LEVEL_HIGH>, 154 <0 13 IRQ_TYPE_LEVEL_HIGH>, 155 <0 14 IRQ_TYPE_LEVEL_HIGH>, 156 <0 15 IRQ_TYPE_LEVEL_HIGH>, 157 <0 16 IRQ_TYPE_LEVEL_HIGH>, 158 <0 17 IRQ_TYPE_LEVEL_HIGH>, 159 <0 18 IRQ_TYPE_LEVEL_HIGH>, 160 <0 19 IRQ_TYPE_LEVEL_HIGH>, 161 <0 20 IRQ_TYPE_LEVEL_HIGH>, 162 <0 21 IRQ_TYPE_LEVEL_HIGH>, 163 <0 22 IRQ_TYPE_LEVEL_HIGH>, 164 <0 23 IRQ_TYPE_LEVEL_HIGH>, 165 <0 24 IRQ_TYPE_LEVEL_HIGH>, 166 <0 25 IRQ_TYPE_LEVEL_HIGH>, 167 <0 26 IRQ_TYPE_LEVEL_HIGH>, 168 <0 27 IRQ_TYPE_LEVEL_HIGH>, 169 <0 28 IRQ_TYPE_LEVEL_HIGH>, 170 <0 29 IRQ_TYPE_LEVEL_HIGH>, 171 <0 30 IRQ_TYPE_LEVEL_HIGH>, 172 <0 31 IRQ_TYPE_LEVEL_HIGH>; 173 }; 174 175 irqc1: interrupt-controller@e61c0200 { 176 compatible = "renesas,irqc-r8a73a4", "renesas,irqc"; 177 #interrupt-cells = <2>; 178 interrupt-controller; 179 reg = <0 0xe61c0200 0 0x200>; 180 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, 181 <0 33 IRQ_TYPE_LEVEL_HIGH>, 182 <0 34 IRQ_TYPE_LEVEL_HIGH>, 183 <0 35 IRQ_TYPE_LEVEL_HIGH>, 184 <0 36 IRQ_TYPE_LEVEL_HIGH>, 185 <0 37 IRQ_TYPE_LEVEL_HIGH>, 186 <0 38 IRQ_TYPE_LEVEL_HIGH>, 187 <0 39 IRQ_TYPE_LEVEL_HIGH>, 188 <0 40 IRQ_TYPE_LEVEL_HIGH>, 189 <0 41 IRQ_TYPE_LEVEL_HIGH>, 190 <0 42 IRQ_TYPE_LEVEL_HIGH>, 191 <0 43 IRQ_TYPE_LEVEL_HIGH>, 192 <0 44 IRQ_TYPE_LEVEL_HIGH>, 193 <0 45 IRQ_TYPE_LEVEL_HIGH>, 194 <0 46 IRQ_TYPE_LEVEL_HIGH>, 195 <0 47 IRQ_TYPE_LEVEL_HIGH>, 196 <0 48 IRQ_TYPE_LEVEL_HIGH>, 197 <0 49 IRQ_TYPE_LEVEL_HIGH>, 198 <0 50 IRQ_TYPE_LEVEL_HIGH>, 199 <0 51 IRQ_TYPE_LEVEL_HIGH>, 200 <0 52 IRQ_TYPE_LEVEL_HIGH>, 201 <0 53 IRQ_TYPE_LEVEL_HIGH>, 202 <0 54 IRQ_TYPE_LEVEL_HIGH>, 203 <0 55 IRQ_TYPE_LEVEL_HIGH>, 204 <0 56 IRQ_TYPE_LEVEL_HIGH>, 205 <0 57 IRQ_TYPE_LEVEL_HIGH>; 206 }; 207 208 thermal@e61f0000 { 209 compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal"; 210 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>, 211 <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>; 212 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; 213 }; 214 215 i2c0: i2c@e6500000 { 216 #address-cells = <1>; 217 #size-cells = <0>; 218 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; 219 reg = <0 0xe6500000 0 0x428>; 220 interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; 221 status = "disabled"; 222 }; 223 224 i2c1: i2c@e6510000 { 225 #address-cells = <1>; 226 #size-cells = <0>; 227 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; 228 reg = <0 0xe6510000 0 0x428>; 229 interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; 230 status = "disabled"; 231 }; 232 233 i2c2: i2c@e6520000 { 234 #address-cells = <1>; 235 #size-cells = <0>; 236 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; 237 reg = <0 0xe6520000 0 0x428>; 238 interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>; 239 status = "disabled"; 240 }; 241 242 i2c3: i2c@e6530000 { 243 #address-cells = <1>; 244 #size-cells = <0>; 245 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; 246 reg = <0 0xe6530000 0 0x428>; 247 interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>; 248 status = "disabled"; 249 }; 250 251 i2c4: i2c@e6540000 { 252 #address-cells = <1>; 253 #size-cells = <0>; 254 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; 255 reg = <0 0xe6540000 0 0x428>; 256 interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>; 257 status = "disabled"; 258 }; 259 260 i2c6: i2c@e6550000 { 261 #address-cells = <1>; 262 #size-cells = <0>; 263 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; 264 reg = <0 0xe6550000 0 0x428>; 265 interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; 266 status = "disabled"; 267 }; 268 269 i2c7: i2c@e6560000 { 270 #address-cells = <1>; 271 #size-cells = <0>; 272 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; 273 reg = <0 0xe6560000 0 0x428>; 274 interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>; 275 status = "disabled"; 276 }; 277 278 i2c8: i2c@e6570000 { 279 #address-cells = <1>; 280 #size-cells = <0>; 281 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; 282 reg = <0 0xe6570000 0 0x428>; 283 interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; 284 status = "disabled"; 285 }; 286 287 scifb0: serial@e6c20000 { 288 compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; 289 reg = <0 0xe6c20000 0 0x100>; 290 interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; 291 status = "disabled"; 292 }; 293 294 scifb1: serial@e6c30000 { 295 compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; 296 reg = <0 0xe6c30000 0 0x100>; 297 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; 298 status = "disabled"; 299 }; 300 301 scifa0: serial@e6c40000 { 302 compatible = "renesas,scifa-r8a73a4", "renesas,scifa"; 303 reg = <0 0xe6c40000 0 0x100>; 304 interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; 305 status = "disabled"; 306 }; 307 308 scifa1: serial@e6c50000 { 309 compatible = "renesas,scifa-r8a73a4", "renesas,scifa"; 310 reg = <0 0xe6c50000 0 0x100>; 311 interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; 312 status = "disabled"; 313 }; 314 315 scifb2: serial@e6ce0000 { 316 compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; 317 reg = <0 0xe6ce0000 0 0x100>; 318 interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>; 319 status = "disabled"; 320 }; 321 322 scifb3: serial@e6cf0000 { 323 compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; 324 reg = <0 0xe6cf0000 0 0x100>; 325 interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>; 326 status = "disabled"; 327 }; 328 329 sdhi0: sd@ee100000 { 330 compatible = "renesas,sdhi-r8a73a4"; 331 reg = <0 0xee100000 0 0x100>; 332 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; 333 cap-sd-highspeed; 334 status = "disabled"; 335 }; 336 337 sdhi1: sd@ee120000 { 338 compatible = "renesas,sdhi-r8a73a4"; 339 reg = <0 0xee120000 0 0x100>; 340 interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>; 341 cap-sd-highspeed; 342 status = "disabled"; 343 }; 344 345 sdhi2: sd@ee140000 { 346 compatible = "renesas,sdhi-r8a73a4"; 347 reg = <0 0xee140000 0 0x100>; 348 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; 349 cap-sd-highspeed; 350 status = "disabled"; 351 }; 352 353 mmcif0: mmc@ee200000 { 354 compatible = "renesas,sh-mmcif"; 355 reg = <0 0xee200000 0 0x80>; 356 interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; 357 reg-io-width = <4>; 358 status = "disabled"; 359 }; 360 361 mmcif1: mmc@ee220000 { 362 compatible = "renesas,sh-mmcif"; 363 reg = <0 0xee220000 0 0x80>; 364 interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>; 365 reg-io-width = <4>; 366 status = "disabled"; 367 }; 368 369 gic: interrupt-controller@f1001000 { 370 compatible = "arm,cortex-a15-gic"; 371 #interrupt-cells = <3>; 372 #address-cells = <0>; 373 interrupt-controller; 374 reg = <0 0xf1001000 0 0x1000>, 375 <0 0xf1002000 0 0x1000>, 376 <0 0xf1004000 0 0x2000>, 377 <0 0xf1006000 0 0x2000>; 378 interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 379 }; 380}; 381