1 /* $NetBSD: uchcom.c,v 1.1 2007/09/03 17:57:37 tshiozak Exp $ */
2
3 /*-
4 * Copyright (c) 2007, Takanori Watanabe
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 /*
30 * Copyright (c) 2007 The NetBSD Foundation, Inc.
31 * All rights reserved.
32 *
33 * This code is derived from software contributed to The NetBSD Foundation
34 * by Takuya SHIOZAKI (tshiozak@netbsd.org).
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 *
45 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
46 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
47 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
48 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
49 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
50 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
51 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
52 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
53 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
54 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
55 * POSSIBILITY OF SUCH DAMAGE.
56 */
57
58 #include <sys/cdefs.h>
59 __FBSDID("$FreeBSD: stable/10/sys/dev/usb/serial/uchcom.c 335627 2018-06-25 08:57:03Z avg $");
60
61 /*
62 * Driver for WinChipHead CH341/340, the worst USB-serial chip in the
63 * world.
64 */
65
66 #include <sys/stdint.h>
67 #include <sys/stddef.h>
68 #include <sys/param.h>
69 #include <sys/queue.h>
70 #include <sys/types.h>
71 #include <sys/systm.h>
72 #include <sys/kernel.h>
73 #include <sys/bus.h>
74 #include <sys/module.h>
75 #include <sys/lock.h>
76 #include <sys/mutex.h>
77 #include <sys/condvar.h>
78 #include <sys/sysctl.h>
79 #include <sys/sx.h>
80 #include <sys/unistd.h>
81 #include <sys/callout.h>
82 #include <sys/malloc.h>
83 #include <sys/priv.h>
84
85 #include <dev/usb/usb.h>
86 #include <dev/usb/usbdi.h>
87 #include <dev/usb/usbdi_util.h>
88 #include "usbdevs.h"
89
90 #define USB_DEBUG_VAR uchcom_debug
91 #include <dev/usb/usb_debug.h>
92 #include <dev/usb/usb_process.h>
93
94 #include <dev/usb/serial/usb_serial.h>
95
96 #ifdef USB_DEBUG
97 static int uchcom_debug = 0;
98
99 static SYSCTL_NODE(_hw_usb, OID_AUTO, uchcom, CTLFLAG_RW, 0, "USB uchcom");
100 SYSCTL_INT(_hw_usb_uchcom, OID_AUTO, debug, CTLFLAG_RW,
101 &uchcom_debug, 0, "uchcom debug level");
102 #endif
103
104 #define UCHCOM_IFACE_INDEX 0
105 #define UCHCOM_CONFIG_INDEX 0
106
107 #define UCHCOM_REV_CH340 0x0250
108 #define UCHCOM_INPUT_BUF_SIZE 8
109
110 #define UCHCOM_REQ_GET_VERSION 0x5F
111 #define UCHCOM_REQ_READ_REG 0x95
112 #define UCHCOM_REQ_WRITE_REG 0x9A
113 #define UCHCOM_REQ_RESET 0xA1
114 #define UCHCOM_REQ_SET_DTRRTS 0xA4
115
116 #define UCHCOM_REG_STAT1 0x06
117 #define UCHCOM_REG_STAT2 0x07
118 #define UCHCOM_REG_BPS_PRE 0x12
119 #define UCHCOM_REG_BPS_DIV 0x13
120 #define UCHCOM_REG_BPS_MOD 0x14
121 #define UCHCOM_REG_BPS_PAD 0x0F
122 #define UCHCOM_REG_BREAK1 0x05
123 #define UCHCOM_REG_LCR1 0x18
124 #define UCHCOM_REG_LCR2 0x25
125
126 #define UCHCOM_VER_20 0x20
127 #define UCHCOM_VER_30 0x30
128
129 #define UCHCOM_BASE_UNKNOWN 0
130 #define UCHCOM_BPS_MOD_BASE 20000000
131 #define UCHCOM_BPS_MOD_BASE_OFS 1100
132
133 #define UCHCOM_DTR_MASK 0x20
134 #define UCHCOM_RTS_MASK 0x40
135
136 #define UCHCOM_BRK_MASK 0x01
137
138 #define UCHCOM_LCR1_MASK 0xAF
139 #define UCHCOM_LCR2_MASK 0x07
140 #define UCHCOM_LCR1_RX 0x80
141 #define UCHCOM_LCR1_TX 0x40
142 #define UCHCOM_LCR1_PARENB 0x08
143 #define UCHCOM_LCR1_CS8 0x03
144 #define UCHCOM_LCR2_PAREVEN 0x07
145 #define UCHCOM_LCR2_PARODD 0x06
146 #define UCHCOM_LCR2_PARMARK 0x05
147 #define UCHCOM_LCR2_PARSPACE 0x04
148
149 #define UCHCOM_INTR_STAT1 0x02
150 #define UCHCOM_INTR_STAT2 0x03
151 #define UCHCOM_INTR_LEAST 4
152
153 #define UCHCOM_BULK_BUF_SIZE 1024 /* bytes */
154
155 enum {
156 UCHCOM_BULK_DT_WR,
157 UCHCOM_BULK_DT_RD,
158 UCHCOM_INTR_DT_RD,
159 UCHCOM_N_TRANSFER,
160 };
161
162 struct uchcom_softc {
163 struct ucom_super_softc sc_super_ucom;
164 struct ucom_softc sc_ucom;
165
166 struct usb_xfer *sc_xfer[UCHCOM_N_TRANSFER];
167 struct usb_device *sc_udev;
168 struct mtx sc_mtx;
169
170 uint8_t sc_dtr; /* local copy */
171 uint8_t sc_rts; /* local copy */
172 uint8_t sc_version;
173 uint8_t sc_msr;
174 uint8_t sc_lsr; /* local status register */
175 };
176
177 struct uchcom_divider {
178 uint8_t dv_prescaler;
179 uint8_t dv_div;
180 uint8_t dv_mod;
181 };
182
183 struct uchcom_divider_record {
184 uint32_t dvr_high;
185 uint32_t dvr_low;
186 uint32_t dvr_base_clock;
187 struct uchcom_divider dvr_divider;
188 };
189
190 static const struct uchcom_divider_record dividers[] =
191 {
192 {307200, 307200, UCHCOM_BASE_UNKNOWN, {7, 0xD9, 0}},
193 {921600, 921600, UCHCOM_BASE_UNKNOWN, {7, 0xF3, 0}},
194 {2999999, 23530, 6000000, {3, 0, 0}},
195 {23529, 2942, 750000, {2, 0, 0}},
196 {2941, 368, 93750, {1, 0, 0}},
197 {367, 1, 11719, {0, 0, 0}},
198 };
199
200 #define NUM_DIVIDERS (sizeof (dividers) / sizeof (dividers[0]))
201
202 static const STRUCT_USB_HOST_ID uchcom_devs[] = {
203 {USB_VPI(USB_VENDOR_WCH, USB_PRODUCT_WCH_CH341SER, 0)},
204 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER, 0)},
205 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER_2, 0)},
206 };
207
208 /* protypes */
209
210 static void uchcom_free(struct ucom_softc *);
211 static int uchcom_pre_param(struct ucom_softc *, struct termios *);
212 static void uchcom_cfg_get_status(struct ucom_softc *, uint8_t *,
213 uint8_t *);
214 static void uchcom_cfg_open(struct ucom_softc *ucom);
215 static void uchcom_cfg_param(struct ucom_softc *, struct termios *);
216 static void uchcom_cfg_set_break(struct ucom_softc *, uint8_t);
217 static void uchcom_cfg_set_dtr(struct ucom_softc *, uint8_t);
218 static void uchcom_cfg_set_rts(struct ucom_softc *, uint8_t);
219 static void uchcom_start_read(struct ucom_softc *);
220 static void uchcom_start_write(struct ucom_softc *);
221 static void uchcom_stop_read(struct ucom_softc *);
222 static void uchcom_stop_write(struct ucom_softc *);
223 static void uchcom_update_version(struct uchcom_softc *);
224 static void uchcom_convert_status(struct uchcom_softc *, uint8_t);
225 static void uchcom_update_status(struct uchcom_softc *);
226 static void uchcom_set_dtr_rts(struct uchcom_softc *);
227 static int uchcom_calc_divider_settings(struct uchcom_divider *, uint32_t);
228 static void uchcom_set_baudrate(struct uchcom_softc *, uint32_t);
229 static void uchcom_poll(struct ucom_softc *ucom);
230
231 static device_probe_t uchcom_probe;
232 static device_attach_t uchcom_attach;
233 static device_detach_t uchcom_detach;
234 static void uchcom_free_softc(struct uchcom_softc *);
235
236 static usb_callback_t uchcom_intr_callback;
237 static usb_callback_t uchcom_write_callback;
238 static usb_callback_t uchcom_read_callback;
239
240 static const struct usb_config uchcom_config_data[UCHCOM_N_TRANSFER] = {
241
242 [UCHCOM_BULK_DT_WR] = {
243 .type = UE_BULK,
244 .endpoint = UE_ADDR_ANY,
245 .direction = UE_DIR_OUT,
246 .bufsize = UCHCOM_BULK_BUF_SIZE,
247 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
248 .callback = &uchcom_write_callback,
249 },
250
251 [UCHCOM_BULK_DT_RD] = {
252 .type = UE_BULK,
253 .endpoint = UE_ADDR_ANY,
254 .direction = UE_DIR_IN,
255 .bufsize = UCHCOM_BULK_BUF_SIZE,
256 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
257 .callback = &uchcom_read_callback,
258 },
259
260 [UCHCOM_INTR_DT_RD] = {
261 .type = UE_INTERRUPT,
262 .endpoint = UE_ADDR_ANY,
263 .direction = UE_DIR_IN,
264 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
265 .bufsize = 0, /* use wMaxPacketSize */
266 .callback = &uchcom_intr_callback,
267 },
268 };
269
270 static struct ucom_callback uchcom_callback = {
271 .ucom_cfg_get_status = &uchcom_cfg_get_status,
272 .ucom_cfg_set_dtr = &uchcom_cfg_set_dtr,
273 .ucom_cfg_set_rts = &uchcom_cfg_set_rts,
274 .ucom_cfg_set_break = &uchcom_cfg_set_break,
275 .ucom_cfg_open = &uchcom_cfg_open,
276 .ucom_cfg_param = &uchcom_cfg_param,
277 .ucom_pre_param = &uchcom_pre_param,
278 .ucom_start_read = &uchcom_start_read,
279 .ucom_stop_read = &uchcom_stop_read,
280 .ucom_start_write = &uchcom_start_write,
281 .ucom_stop_write = &uchcom_stop_write,
282 .ucom_poll = &uchcom_poll,
283 .ucom_free = &uchcom_free,
284 };
285
286 /* ----------------------------------------------------------------------
287 * driver entry points
288 */
289
290 static int
uchcom_probe(device_t dev)291 uchcom_probe(device_t dev)
292 {
293 struct usb_attach_arg *uaa = device_get_ivars(dev);
294
295 DPRINTFN(11, "\n");
296
297 if (uaa->usb_mode != USB_MODE_HOST) {
298 return (ENXIO);
299 }
300 if (uaa->info.bConfigIndex != UCHCOM_CONFIG_INDEX) {
301 return (ENXIO);
302 }
303 if (uaa->info.bIfaceIndex != UCHCOM_IFACE_INDEX) {
304 return (ENXIO);
305 }
306 return (usbd_lookup_id_by_uaa(uchcom_devs, sizeof(uchcom_devs), uaa));
307 }
308
309 static int
uchcom_attach(device_t dev)310 uchcom_attach(device_t dev)
311 {
312 struct uchcom_softc *sc = device_get_softc(dev);
313 struct usb_attach_arg *uaa = device_get_ivars(dev);
314 int error;
315 uint8_t iface_index;
316
317 DPRINTFN(11, "\n");
318
319 device_set_usb_desc(dev);
320 mtx_init(&sc->sc_mtx, "uchcom", NULL, MTX_DEF);
321 ucom_ref(&sc->sc_super_ucom);
322
323 sc->sc_udev = uaa->device;
324
325 switch (uaa->info.idProduct) {
326 case USB_PRODUCT_WCH2_CH341SER:
327 device_printf(dev, "CH340 detected\n");
328 break;
329 case USB_PRODUCT_WCH2_CH341SER_2:
330 device_printf(dev, "CH341 detected\n");
331 break;
332 default:
333 device_printf(dev, "New CH340/CH341 product 0x%04x detected\n",
334 uaa->info.idProduct);
335 break;
336 }
337
338 iface_index = UCHCOM_IFACE_INDEX;
339 error = usbd_transfer_setup(uaa->device,
340 &iface_index, sc->sc_xfer, uchcom_config_data,
341 UCHCOM_N_TRANSFER, sc, &sc->sc_mtx);
342
343 if (error) {
344 DPRINTF("one or more missing USB endpoints, "
345 "error=%s\n", usbd_errstr(error));
346 goto detach;
347 }
348
349 /* clear stall at first run */
350 mtx_lock(&sc->sc_mtx);
351 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
352 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
353 mtx_unlock(&sc->sc_mtx);
354
355 error = ucom_attach(&sc->sc_super_ucom, &sc->sc_ucom, 1, sc,
356 &uchcom_callback, &sc->sc_mtx);
357 if (error) {
358 goto detach;
359 }
360 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev);
361
362 return (0);
363
364 detach:
365 uchcom_detach(dev);
366 return (ENXIO);
367 }
368
369 static int
uchcom_detach(device_t dev)370 uchcom_detach(device_t dev)
371 {
372 struct uchcom_softc *sc = device_get_softc(dev);
373
374 DPRINTFN(11, "\n");
375
376 ucom_detach(&sc->sc_super_ucom, &sc->sc_ucom);
377 usbd_transfer_unsetup(sc->sc_xfer, UCHCOM_N_TRANSFER);
378
379 device_claim_softc(dev);
380
381 uchcom_free_softc(sc);
382
383 return (0);
384 }
385
386 UCOM_UNLOAD_DRAIN(uchcom);
387
388 static void
uchcom_free_softc(struct uchcom_softc * sc)389 uchcom_free_softc(struct uchcom_softc *sc)
390 {
391 if (ucom_unref(&sc->sc_super_ucom)) {
392 mtx_destroy(&sc->sc_mtx);
393 device_free_softc(sc);
394 }
395 }
396
397 static void
uchcom_free(struct ucom_softc * ucom)398 uchcom_free(struct ucom_softc *ucom)
399 {
400 uchcom_free_softc(ucom->sc_parent);
401 }
402
403 /* ----------------------------------------------------------------------
404 * low level i/o
405 */
406
407 static void
uchcom_ctrl_write(struct uchcom_softc * sc,uint8_t reqno,uint16_t value,uint16_t index)408 uchcom_ctrl_write(struct uchcom_softc *sc, uint8_t reqno,
409 uint16_t value, uint16_t index)
410 {
411 struct usb_device_request req;
412
413 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
414 req.bRequest = reqno;
415 USETW(req.wValue, value);
416 USETW(req.wIndex, index);
417 USETW(req.wLength, 0);
418
419 DPRINTF("WR REQ 0x%02X VAL 0x%04X IDX 0x%04X\n",
420 reqno, value, index);
421 ucom_cfg_do_request(sc->sc_udev,
422 &sc->sc_ucom, &req, NULL, 0, 1000);
423 }
424
425 static void
uchcom_ctrl_read(struct uchcom_softc * sc,uint8_t reqno,uint16_t value,uint16_t index,void * buf,uint16_t buflen)426 uchcom_ctrl_read(struct uchcom_softc *sc, uint8_t reqno,
427 uint16_t value, uint16_t index, void *buf, uint16_t buflen)
428 {
429 struct usb_device_request req;
430
431 req.bmRequestType = UT_READ_VENDOR_DEVICE;
432 req.bRequest = reqno;
433 USETW(req.wValue, value);
434 USETW(req.wIndex, index);
435 USETW(req.wLength, buflen);
436
437 DPRINTF("RD REQ 0x%02X VAL 0x%04X IDX 0x%04X LEN %d\n",
438 reqno, value, index, buflen);
439 ucom_cfg_do_request(sc->sc_udev,
440 &sc->sc_ucom, &req, buf, USB_SHORT_XFER_OK, 1000);
441 }
442
443 static void
uchcom_write_reg(struct uchcom_softc * sc,uint8_t reg1,uint8_t val1,uint8_t reg2,uint8_t val2)444 uchcom_write_reg(struct uchcom_softc *sc,
445 uint8_t reg1, uint8_t val1, uint8_t reg2, uint8_t val2)
446 {
447 DPRINTF("0x%02X<-0x%02X, 0x%02X<-0x%02X\n",
448 (unsigned)reg1, (unsigned)val1,
449 (unsigned)reg2, (unsigned)val2);
450 uchcom_ctrl_write(
451 sc, UCHCOM_REQ_WRITE_REG,
452 reg1 | ((uint16_t)reg2 << 8), val1 | ((uint16_t)val2 << 8));
453 }
454
455 static void
uchcom_read_reg(struct uchcom_softc * sc,uint8_t reg1,uint8_t * rval1,uint8_t reg2,uint8_t * rval2)456 uchcom_read_reg(struct uchcom_softc *sc,
457 uint8_t reg1, uint8_t *rval1, uint8_t reg2, uint8_t *rval2)
458 {
459 uint8_t buf[UCHCOM_INPUT_BUF_SIZE];
460
461 uchcom_ctrl_read(
462 sc, UCHCOM_REQ_READ_REG,
463 reg1 | ((uint16_t)reg2 << 8), 0, buf, sizeof(buf));
464
465 DPRINTF("0x%02X->0x%02X, 0x%02X->0x%02X\n",
466 (unsigned)reg1, (unsigned)buf[0],
467 (unsigned)reg2, (unsigned)buf[1]);
468
469 if (rval1)
470 *rval1 = buf[0];
471 if (rval2)
472 *rval2 = buf[1];
473 }
474
475 static void
uchcom_get_version(struct uchcom_softc * sc,uint8_t * rver)476 uchcom_get_version(struct uchcom_softc *sc, uint8_t *rver)
477 {
478 uint8_t buf[UCHCOM_INPUT_BUF_SIZE];
479
480 uchcom_ctrl_read(sc, UCHCOM_REQ_GET_VERSION, 0, 0, buf, sizeof(buf));
481
482 if (rver)
483 *rver = buf[0];
484 }
485
486 static void
uchcom_get_status(struct uchcom_softc * sc,uint8_t * rval)487 uchcom_get_status(struct uchcom_softc *sc, uint8_t *rval)
488 {
489 uchcom_read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL);
490 }
491
492 static void
uchcom_set_dtr_rts_10(struct uchcom_softc * sc,uint8_t val)493 uchcom_set_dtr_rts_10(struct uchcom_softc *sc, uint8_t val)
494 {
495 uchcom_write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val);
496 }
497
498 static void
uchcom_set_dtr_rts_20(struct uchcom_softc * sc,uint8_t val)499 uchcom_set_dtr_rts_20(struct uchcom_softc *sc, uint8_t val)
500 {
501 uchcom_ctrl_write(sc, UCHCOM_REQ_SET_DTRRTS, val, 0);
502 }
503
504
505 /* ----------------------------------------------------------------------
506 * middle layer
507 */
508
509 static void
uchcom_update_version(struct uchcom_softc * sc)510 uchcom_update_version(struct uchcom_softc *sc)
511 {
512 uchcom_get_version(sc, &sc->sc_version);
513 DPRINTF("Chip version: 0x%02x\n", sc->sc_version);
514 }
515
516 static void
uchcom_convert_status(struct uchcom_softc * sc,uint8_t cur)517 uchcom_convert_status(struct uchcom_softc *sc, uint8_t cur)
518 {
519 sc->sc_dtr = !(cur & UCHCOM_DTR_MASK);
520 sc->sc_rts = !(cur & UCHCOM_RTS_MASK);
521
522 cur = ~cur & 0x0F;
523 sc->sc_msr = (cur << 4) | ((sc->sc_msr >> 4) ^ cur);
524 }
525
526 static void
uchcom_update_status(struct uchcom_softc * sc)527 uchcom_update_status(struct uchcom_softc *sc)
528 {
529 uint8_t cur;
530
531 uchcom_get_status(sc, &cur);
532 uchcom_convert_status(sc, cur);
533 }
534
535
536 static void
uchcom_set_dtr_rts(struct uchcom_softc * sc)537 uchcom_set_dtr_rts(struct uchcom_softc *sc)
538 {
539 uint8_t val = 0;
540
541 if (sc->sc_dtr)
542 val |= UCHCOM_DTR_MASK;
543 if (sc->sc_rts)
544 val |= UCHCOM_RTS_MASK;
545
546 if (sc->sc_version < UCHCOM_VER_20)
547 uchcom_set_dtr_rts_10(sc, ~val);
548 else
549 uchcom_set_dtr_rts_20(sc, ~val);
550 }
551
552 static void
uchcom_cfg_set_break(struct ucom_softc * ucom,uint8_t onoff)553 uchcom_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
554 {
555 struct uchcom_softc *sc = ucom->sc_parent;
556 uint8_t brk1;
557 uint8_t brk2;
558
559 uchcom_read_reg(sc, UCHCOM_REG_BREAK1, &brk1, UCHCOM_REG_LCR1, &brk2);
560 if (onoff) {
561 /* on - clear bits */
562 brk1 &= ~UCHCOM_BRK_MASK;
563 brk2 &= ~UCHCOM_LCR1_TX;
564 } else {
565 /* off - set bits */
566 brk1 |= UCHCOM_BRK_MASK;
567 brk2 |= UCHCOM_LCR1_TX;
568 }
569 uchcom_write_reg(sc, UCHCOM_REG_BREAK1, brk1, UCHCOM_REG_LCR1, brk2);
570 }
571
572 static int
uchcom_calc_divider_settings(struct uchcom_divider * dp,uint32_t rate)573 uchcom_calc_divider_settings(struct uchcom_divider *dp, uint32_t rate)
574 {
575 const struct uchcom_divider_record *rp;
576 uint32_t div;
577 uint32_t rem;
578 uint32_t mod;
579 uint8_t i;
580
581 /* find record */
582 for (i = 0; i != NUM_DIVIDERS; i++) {
583 if (dividers[i].dvr_high >= rate &&
584 dividers[i].dvr_low <= rate) {
585 rp = ÷rs[i];
586 goto found;
587 }
588 }
589 return (-1);
590
591 found:
592 dp->dv_prescaler = rp->dvr_divider.dv_prescaler;
593 if (rp->dvr_base_clock == UCHCOM_BASE_UNKNOWN)
594 dp->dv_div = rp->dvr_divider.dv_div;
595 else {
596 div = rp->dvr_base_clock / rate;
597 rem = rp->dvr_base_clock % rate;
598 if (div == 0 || div >= 0xFF)
599 return (-1);
600 if ((rem << 1) >= rate)
601 div += 1;
602 dp->dv_div = (uint8_t)-div;
603 }
604
605 mod = (UCHCOM_BPS_MOD_BASE / rate) + UCHCOM_BPS_MOD_BASE_OFS;
606 mod = mod + (mod / 2);
607
608 dp->dv_mod = (mod + 0xFF) / 0x100;
609
610 return (0);
611 }
612
613 static void
uchcom_set_baudrate(struct uchcom_softc * sc,uint32_t rate)614 uchcom_set_baudrate(struct uchcom_softc *sc, uint32_t rate)
615 {
616 struct uchcom_divider dv;
617
618 if (uchcom_calc_divider_settings(&dv, rate))
619 return;
620
621 /*
622 * According to linux code we need to set bit 7 of UCHCOM_REG_BPS_PRE,
623 * otherwise the chip will buffer data.
624 */
625 uchcom_write_reg(sc,
626 UCHCOM_REG_BPS_PRE, dv.dv_prescaler | 0x80,
627 UCHCOM_REG_BPS_DIV, dv.dv_div);
628 uchcom_write_reg(sc,
629 UCHCOM_REG_BPS_MOD, dv.dv_mod,
630 UCHCOM_REG_BPS_PAD, 0);
631 }
632
633 /* ----------------------------------------------------------------------
634 * methods for ucom
635 */
636 static void
uchcom_cfg_get_status(struct ucom_softc * ucom,uint8_t * lsr,uint8_t * msr)637 uchcom_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
638 {
639 struct uchcom_softc *sc = ucom->sc_parent;
640
641 DPRINTF("\n");
642
643 *lsr = sc->sc_lsr;
644 *msr = sc->sc_msr;
645 }
646
647 static void
uchcom_cfg_set_dtr(struct ucom_softc * ucom,uint8_t onoff)648 uchcom_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
649 {
650 struct uchcom_softc *sc = ucom->sc_parent;
651
652 DPRINTF("onoff = %d\n", onoff);
653
654 sc->sc_dtr = onoff;
655 uchcom_set_dtr_rts(sc);
656 }
657
658 static void
uchcom_cfg_set_rts(struct ucom_softc * ucom,uint8_t onoff)659 uchcom_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
660 {
661 struct uchcom_softc *sc = ucom->sc_parent;
662
663 DPRINTF("onoff = %d\n", onoff);
664
665 sc->sc_rts = onoff;
666 uchcom_set_dtr_rts(sc);
667 }
668
669 static void
uchcom_cfg_open(struct ucom_softc * ucom)670 uchcom_cfg_open(struct ucom_softc *ucom)
671 {
672 struct uchcom_softc *sc = ucom->sc_parent;
673
674 DPRINTF("\n");
675
676 uchcom_update_version(sc);
677 uchcom_update_status(sc);
678 }
679
680 static int
uchcom_pre_param(struct ucom_softc * ucom,struct termios * t)681 uchcom_pre_param(struct ucom_softc *ucom, struct termios *t)
682 {
683 struct uchcom_divider dv;
684
685 switch (t->c_cflag & CSIZE) {
686 case CS8:
687 break;
688 default:
689 return (EIO);
690 }
691 if ((t->c_cflag & CSTOPB) != 0)
692 return (EIO);
693 if ((t->c_cflag & PARENB) != 0)
694 return (EIO);
695
696 if (uchcom_calc_divider_settings(&dv, t->c_ospeed)) {
697 return (EIO);
698 }
699 return (0); /* success */
700 }
701
702 static void
uchcom_cfg_param(struct ucom_softc * ucom,struct termios * t)703 uchcom_cfg_param(struct ucom_softc *ucom, struct termios *t)
704 {
705 struct uchcom_softc *sc = ucom->sc_parent;
706
707 uchcom_get_version(sc, NULL);
708 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0, 0);
709 uchcom_set_baudrate(sc, t->c_ospeed);
710 if (sc->sc_version < UCHCOM_VER_30) {
711 uchcom_read_reg(sc, UCHCOM_REG_LCR1, NULL,
712 UCHCOM_REG_LCR2, NULL);
713 uchcom_write_reg(sc, UCHCOM_REG_LCR1, 0x50,
714 UCHCOM_REG_LCR2, 0x00);
715 } else {
716 /*
717 * Set up line control:
718 * - enable transmit and receive
719 * - set 8n1 mode
720 * To do: support other sizes, parity, stop bits.
721 */
722 uchcom_write_reg(sc,
723 UCHCOM_REG_LCR1,
724 UCHCOM_LCR1_RX | UCHCOM_LCR1_TX | UCHCOM_LCR1_CS8,
725 UCHCOM_REG_LCR2, 0x00);
726 }
727 uchcom_update_status(sc);
728 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0x501f, 0xd90a);
729 uchcom_set_baudrate(sc, t->c_ospeed);
730 uchcom_set_dtr_rts(sc);
731 uchcom_update_status(sc);
732 }
733
734 static void
uchcom_start_read(struct ucom_softc * ucom)735 uchcom_start_read(struct ucom_softc *ucom)
736 {
737 struct uchcom_softc *sc = ucom->sc_parent;
738
739 /* start interrupt endpoint */
740 usbd_transfer_start(sc->sc_xfer[UCHCOM_INTR_DT_RD]);
741
742 /* start read endpoint */
743 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
744 }
745
746 static void
uchcom_stop_read(struct ucom_softc * ucom)747 uchcom_stop_read(struct ucom_softc *ucom)
748 {
749 struct uchcom_softc *sc = ucom->sc_parent;
750
751 /* stop interrupt endpoint */
752 usbd_transfer_stop(sc->sc_xfer[UCHCOM_INTR_DT_RD]);
753
754 /* stop read endpoint */
755 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
756 }
757
758 static void
uchcom_start_write(struct ucom_softc * ucom)759 uchcom_start_write(struct ucom_softc *ucom)
760 {
761 struct uchcom_softc *sc = ucom->sc_parent;
762
763 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
764 }
765
766 static void
uchcom_stop_write(struct ucom_softc * ucom)767 uchcom_stop_write(struct ucom_softc *ucom)
768 {
769 struct uchcom_softc *sc = ucom->sc_parent;
770
771 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
772 }
773
774 /* ----------------------------------------------------------------------
775 * callback when the modem status is changed.
776 */
777 static void
uchcom_intr_callback(struct usb_xfer * xfer,usb_error_t error)778 uchcom_intr_callback(struct usb_xfer *xfer, usb_error_t error)
779 {
780 struct uchcom_softc *sc = usbd_xfer_softc(xfer);
781 struct usb_page_cache *pc;
782 uint8_t buf[UCHCOM_INTR_LEAST];
783 int actlen;
784
785 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
786
787 switch (USB_GET_STATE(xfer)) {
788 case USB_ST_TRANSFERRED:
789
790 DPRINTF("actlen = %u\n", actlen);
791
792 if (actlen >= UCHCOM_INTR_LEAST) {
793 pc = usbd_xfer_get_frame(xfer, 0);
794 usbd_copy_out(pc, 0, buf, UCHCOM_INTR_LEAST);
795
796 DPRINTF("data = 0x%02X 0x%02X 0x%02X 0x%02X\n",
797 (unsigned)buf[0], (unsigned)buf[1],
798 (unsigned)buf[2], (unsigned)buf[3]);
799
800 uchcom_convert_status(sc, buf[UCHCOM_INTR_STAT1]);
801 ucom_status_change(&sc->sc_ucom);
802 }
803 case USB_ST_SETUP:
804 tr_setup:
805 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
806 usbd_transfer_submit(xfer);
807 break;
808
809 default: /* Error */
810 if (error != USB_ERR_CANCELLED) {
811 /* try to clear stall first */
812 usbd_xfer_set_stall(xfer);
813 goto tr_setup;
814 }
815 break;
816 }
817 }
818
819 static void
uchcom_write_callback(struct usb_xfer * xfer,usb_error_t error)820 uchcom_write_callback(struct usb_xfer *xfer, usb_error_t error)
821 {
822 struct uchcom_softc *sc = usbd_xfer_softc(xfer);
823 struct usb_page_cache *pc;
824 uint32_t actlen;
825
826 switch (USB_GET_STATE(xfer)) {
827 case USB_ST_SETUP:
828 case USB_ST_TRANSFERRED:
829 tr_setup:
830 pc = usbd_xfer_get_frame(xfer, 0);
831 if (ucom_get_data(&sc->sc_ucom, pc, 0,
832 usbd_xfer_max_len(xfer), &actlen)) {
833
834 DPRINTF("actlen = %d\n", actlen);
835
836 usbd_xfer_set_frame_len(xfer, 0, actlen);
837 usbd_transfer_submit(xfer);
838 }
839 break;
840
841 default: /* Error */
842 if (error != USB_ERR_CANCELLED) {
843 /* try to clear stall first */
844 usbd_xfer_set_stall(xfer);
845 goto tr_setup;
846 }
847 break;
848 }
849 }
850
851 static void
uchcom_read_callback(struct usb_xfer * xfer,usb_error_t error)852 uchcom_read_callback(struct usb_xfer *xfer, usb_error_t error)
853 {
854 struct uchcom_softc *sc = usbd_xfer_softc(xfer);
855 struct usb_page_cache *pc;
856 int actlen;
857
858 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
859
860 switch (USB_GET_STATE(xfer)) {
861 case USB_ST_TRANSFERRED:
862
863 if (actlen > 0) {
864 pc = usbd_xfer_get_frame(xfer, 0);
865 ucom_put_data(&sc->sc_ucom, pc, 0, actlen);
866 }
867
868 case USB_ST_SETUP:
869 tr_setup:
870 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
871 usbd_transfer_submit(xfer);
872 break;
873
874 default: /* Error */
875 if (error != USB_ERR_CANCELLED) {
876 /* try to clear stall first */
877 usbd_xfer_set_stall(xfer);
878 goto tr_setup;
879 }
880 break;
881 }
882 }
883
884 static void
uchcom_poll(struct ucom_softc * ucom)885 uchcom_poll(struct ucom_softc *ucom)
886 {
887 struct uchcom_softc *sc = ucom->sc_parent;
888 usbd_transfer_poll(sc->sc_xfer, UCHCOM_N_TRANSFER);
889 }
890
891 static device_method_t uchcom_methods[] = {
892 /* Device interface */
893 DEVMETHOD(device_probe, uchcom_probe),
894 DEVMETHOD(device_attach, uchcom_attach),
895 DEVMETHOD(device_detach, uchcom_detach),
896 DEVMETHOD_END
897 };
898
899 static driver_t uchcom_driver = {
900 .name = "uchcom",
901 .methods = uchcom_methods,
902 .size = sizeof(struct uchcom_softc)
903 };
904
905 static devclass_t uchcom_devclass;
906
907 DRIVER_MODULE(uchcom, uhub, uchcom_driver, uchcom_devclass, NULL, 0);
908 MODULE_DEPEND(uchcom, ucom, 1, 1, 1);
909 MODULE_DEPEND(uchcom, usb, 1, 1, 1);
910 MODULE_VERSION(uchcom, 1);
911