1 /*-
2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 *
25 * $FreeBSD: stable/10/sys/dev/mlx5/mlx5_core/mlx5_fw.c 308683 2016-11-15 08:58:12Z hselasky $
26 */
27
28 #include <dev/mlx5/driver.h>
29 #include <linux/module.h>
30 #include "mlx5_core.h"
31
mlx5_cmd_query_adapter(struct mlx5_core_dev * dev,u32 * out,int outlen)32 static int mlx5_cmd_query_adapter(struct mlx5_core_dev *dev, u32 *out,
33 int outlen)
34 {
35 u32 in[MLX5_ST_SZ_DW(query_adapter_in)];
36 int err;
37
38 memset(in, 0, sizeof(in));
39
40 MLX5_SET(query_adapter_in, in, opcode, MLX5_CMD_OP_QUERY_ADAPTER);
41
42 err = mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, outlen);
43 return err;
44 }
45
mlx5_query_board_id(struct mlx5_core_dev * dev)46 int mlx5_query_board_id(struct mlx5_core_dev *dev)
47 {
48 u32 *out;
49 int outlen = MLX5_ST_SZ_BYTES(query_adapter_out);
50 int err;
51
52 out = kzalloc(outlen, GFP_KERNEL);
53
54 err = mlx5_cmd_query_adapter(dev, out, outlen);
55 if (err)
56 goto out_out;
57
58 memcpy(dev->board_id,
59 MLX5_ADDR_OF(query_adapter_out, out,
60 query_adapter_struct.vsd_contd_psid),
61 MLX5_FLD_SZ_BYTES(query_adapter_out,
62 query_adapter_struct.vsd_contd_psid));
63
64 out_out:
65 kfree(out);
66
67 return err;
68 }
69
mlx5_core_query_vendor_id(struct mlx5_core_dev * mdev,u32 * vendor_id)70 int mlx5_core_query_vendor_id(struct mlx5_core_dev *mdev, u32 *vendor_id)
71 {
72 u32 *out;
73 int outlen = MLX5_ST_SZ_BYTES(query_adapter_out);
74 int err;
75
76 out = kzalloc(outlen, GFP_KERNEL);
77
78 err = mlx5_cmd_query_adapter(mdev, out, outlen);
79 if (err)
80 goto out_out;
81
82 *vendor_id = MLX5_GET(query_adapter_out, out,
83 query_adapter_struct.ieee_vendor_id);
84
85 out_out:
86 kfree(out);
87
88 return err;
89 }
90 EXPORT_SYMBOL(mlx5_core_query_vendor_id);
91
mlx5_core_query_special_contexts(struct mlx5_core_dev * dev)92 static int mlx5_core_query_special_contexts(struct mlx5_core_dev *dev)
93 {
94 u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)];
95 u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)];
96 int err;
97
98 memset(in, 0, sizeof(in));
99 memset(out, 0, sizeof(out));
100
101 MLX5_SET(query_special_contexts_in, in, opcode,
102 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS);
103 err = mlx5_cmd_exec_check_status(dev, in, sizeof(in), out,
104 sizeof(out));
105 if (err)
106 return err;
107
108 dev->special_contexts.resd_lkey = MLX5_GET(query_special_contexts_out,
109 out, resd_lkey);
110
111 return err;
112 }
113
mlx5_query_hca_caps(struct mlx5_core_dev * dev)114 int mlx5_query_hca_caps(struct mlx5_core_dev *dev)
115 {
116 int err;
117
118 err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL, HCA_CAP_OPMOD_GET_CUR);
119 if (err)
120 return err;
121
122 err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL, HCA_CAP_OPMOD_GET_MAX);
123 if (err)
124 return err;
125
126 if (MLX5_CAP_GEN(dev, eth_net_offloads)) {
127 err = mlx5_core_get_caps(dev, MLX5_CAP_ETHERNET_OFFLOADS,
128 HCA_CAP_OPMOD_GET_CUR);
129 if (err)
130 return err;
131 err = mlx5_core_get_caps(dev, MLX5_CAP_ETHERNET_OFFLOADS,
132 HCA_CAP_OPMOD_GET_MAX);
133 if (err)
134 return err;
135 }
136
137 if (MLX5_CAP_GEN(dev, pg)) {
138 err = mlx5_core_get_caps(dev, MLX5_CAP_ODP,
139 HCA_CAP_OPMOD_GET_CUR);
140 if (err)
141 return err;
142 err = mlx5_core_get_caps(dev, MLX5_CAP_ODP,
143 HCA_CAP_OPMOD_GET_MAX);
144 if (err)
145 return err;
146 }
147
148 if (MLX5_CAP_GEN(dev, atomic)) {
149 err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC,
150 HCA_CAP_OPMOD_GET_CUR);
151 if (err)
152 return err;
153 err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC,
154 HCA_CAP_OPMOD_GET_MAX);
155 if (err)
156 return err;
157 }
158
159 if (MLX5_CAP_GEN(dev, roce)) {
160 err = mlx5_core_get_caps(dev, MLX5_CAP_ROCE,
161 HCA_CAP_OPMOD_GET_CUR);
162 if (err)
163 return err;
164 err = mlx5_core_get_caps(dev, MLX5_CAP_ROCE,
165 HCA_CAP_OPMOD_GET_MAX);
166 if (err)
167 return err;
168 }
169
170 if ((MLX5_CAP_GEN(dev, port_type) ==
171 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET &&
172 MLX5_CAP_GEN(dev, nic_flow_table)) ||
173 (MLX5_CAP_GEN(dev, port_type) == MLX5_CMD_HCA_CAP_PORT_TYPE_IB &&
174 MLX5_CAP_GEN(dev, ipoib_enhanced_offloads))) {
175 err = mlx5_core_get_caps(dev, MLX5_CAP_FLOW_TABLE,
176 HCA_CAP_OPMOD_GET_CUR);
177 if (err)
178 return err;
179 err = mlx5_core_get_caps(dev, MLX5_CAP_FLOW_TABLE,
180 HCA_CAP_OPMOD_GET_MAX);
181 if (err)
182 return err;
183 }
184
185 if (
186 MLX5_CAP_GEN(dev, eswitch_flow_table)) {
187 err = mlx5_core_get_caps(dev, MLX5_CAP_ESWITCH_FLOW_TABLE,
188 HCA_CAP_OPMOD_GET_CUR);
189 if (err)
190 return err;
191 err = mlx5_core_get_caps(dev, MLX5_CAP_ESWITCH_FLOW_TABLE,
192 HCA_CAP_OPMOD_GET_MAX);
193 if (err)
194 return err;
195 }
196
197 if (MLX5_CAP_GEN(dev, vport_group_manager)) {
198 err = mlx5_core_get_caps(dev, MLX5_CAP_ESWITCH,
199 HCA_CAP_OPMOD_GET_CUR);
200 if (err)
201 return err;
202 err = mlx5_core_get_caps(dev, MLX5_CAP_ESWITCH,
203 HCA_CAP_OPMOD_GET_MAX);
204 if (err)
205 return err;
206 }
207
208 if (MLX5_CAP_GEN(dev, snapshot)) {
209 err = mlx5_core_get_caps(dev, MLX5_CAP_SNAPSHOT,
210 HCA_CAP_OPMOD_GET_CUR);
211 if (err)
212 return err;
213 err = mlx5_core_get_caps(dev, MLX5_CAP_SNAPSHOT,
214 HCA_CAP_OPMOD_GET_MAX);
215 if (err)
216 return err;
217 }
218
219 if (MLX5_CAP_GEN(dev, ipoib_enhanced_offloads)) {
220 err = mlx5_core_get_caps(dev, MLX5_CAP_EOIB_OFFLOADS,
221 HCA_CAP_OPMOD_GET_CUR);
222 if (err)
223 return err;
224 err = mlx5_core_get_caps(dev, MLX5_CAP_EOIB_OFFLOADS,
225 HCA_CAP_OPMOD_GET_MAX);
226 if (err)
227 return err;
228 }
229
230 if (MLX5_CAP_GEN(dev, debug)) {
231 err = mlx5_core_get_caps(dev, MLX5_CAP_DEBUG,
232 HCA_CAP_OPMOD_GET_CUR);
233 if (err)
234 return err;
235 err = mlx5_core_get_caps(dev, MLX5_CAP_DEBUG,
236 HCA_CAP_OPMOD_GET_MAX);
237 if (err)
238 return err;
239 }
240
241 if (MLX5_CAP_GEN(dev, qos)) {
242 err = mlx5_core_get_caps(dev, MLX5_CAP_QOS,
243 HCA_CAP_OPMOD_GET_CUR);
244 if (err)
245 return err;
246 err = mlx5_core_get_caps(dev, MLX5_CAP_QOS,
247 HCA_CAP_OPMOD_GET_MAX);
248 if (err)
249 return err;
250 }
251
252 err = mlx5_core_query_special_contexts(dev);
253 if (err)
254 return err;
255
256 return 0;
257 }
258
mlx5_cmd_init_hca(struct mlx5_core_dev * dev)259 int mlx5_cmd_init_hca(struct mlx5_core_dev *dev)
260 {
261 u32 in[MLX5_ST_SZ_DW(init_hca_in)];
262 u32 out[MLX5_ST_SZ_DW(init_hca_out)];
263
264 memset(in, 0, sizeof(in));
265
266 MLX5_SET(init_hca_in, in, opcode, MLX5_CMD_OP_INIT_HCA);
267
268 memset(out, 0, sizeof(out));
269 return mlx5_cmd_exec_check_status(dev, in, sizeof(in),
270 out, sizeof(out));
271 }
272
mlx5_cmd_teardown_hca(struct mlx5_core_dev * dev)273 int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev)
274 {
275 u32 in[MLX5_ST_SZ_DW(teardown_hca_in)];
276 u32 out[MLX5_ST_SZ_DW(teardown_hca_out)];
277
278 memset(in, 0, sizeof(in));
279
280 MLX5_SET(teardown_hca_in, in, opcode, MLX5_CMD_OP_TEARDOWN_HCA);
281
282 memset(out, 0, sizeof(out));
283 return mlx5_cmd_exec_check_status(dev, in, sizeof(in),
284 out, sizeof(out));
285 }
286
mlx5_core_set_dc_cnak_trace(struct mlx5_core_dev * dev,int enable,u64 addr)287 int mlx5_core_set_dc_cnak_trace(struct mlx5_core_dev *dev, int enable,
288 u64 addr)
289 {
290 struct mlx5_cmd_set_dc_cnak_mbox_in *in;
291 struct mlx5_cmd_set_dc_cnak_mbox_out out;
292 int err;
293
294 in = kzalloc(sizeof(*in), GFP_KERNEL);
295 if (!in)
296 return -ENOMEM;
297
298 memset(&out, 0, sizeof(out));
299 in->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_SET_DC_CNAK_TRACE);
300 in->enable = !!enable << 7;
301 in->pa = cpu_to_be64(addr);
302 err = mlx5_cmd_exec(dev, in, sizeof(*in), &out, sizeof(out));
303 if (err)
304 goto out;
305
306 if (out.hdr.status)
307 err = mlx5_cmd_status_to_err(&out.hdr);
308
309 out:
310 kfree(in);
311
312 return err;
313 }
314