1 /*-
2  * Copyright (c) 2003-2012 Broadcom Corporation
3  * All Rights Reserved
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in
13  *    the documentation and/or other materials provided with the
14  *    distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25  * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26  * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD: stable/10/sys/dev/iicbus/iicoc.c 294490 2016-01-21 08:32:11Z dumbbell $");
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/lock.h>
36 #include <sys/module.h>
37 #include <sys/mutex.h>
38 #include <sys/bus.h>
39 #include <sys/rman.h>
40 
41 #include <machine/bus.h>
42 
43 #include <dev/iicbus/iiconf.h>
44 #include <dev/iicbus/iicbus.h>
45 #include <dev/iicbus/iicoc.h>
46 
47 #include <dev/pci/pcireg.h>
48 #include <dev/pci/pcivar.h>
49 
50 #include "iicbus_if.h"
51 
52 static devclass_t iicoc_devclass;
53 
54 /*
55  * Device methods
56  */
57 static int iicoc_probe(device_t);
58 static int iicoc_attach(device_t);
59 static int iicoc_detach(device_t);
60 
61 static int iicoc_start(device_t dev, u_char slave, int timeout);
62 static int iicoc_stop(device_t dev);
63 static int iicoc_read(device_t dev, char *buf,
64     int len, int *read, int last, int delay);
65 static int iicoc_write(device_t dev, const char *buf,
66     int len, int *sent, int timeout);
67 static int iicoc_repeated_start(device_t dev, u_char slave, int timeout);
68 
69 struct iicoc_softc {
70 	device_t 	dev;		/* Self */
71 	u_int		reg_shift;	/* Chip specific */
72 	u_int		clockfreq;
73 	u_int		i2cfreq;
74 	struct resource *mem_res;	/* Memory resource */
75 	int		mem_rid;
76 	int 		sc_started;
77 	uint8_t		i2cdev_addr;
78 	device_t	iicbus;
79 	struct mtx	sc_mtx;
80 };
81 
82 static void
iicoc_dev_write(device_t dev,int reg,int value)83 iicoc_dev_write(device_t dev, int reg, int value)
84 {
85 	struct iicoc_softc *sc;
86 
87 	sc = device_get_softc(dev);
88 	bus_write_1(sc->mem_res, reg<<sc->reg_shift, value);
89 }
90 
91 static int
iicoc_dev_read(device_t dev,int reg)92 iicoc_dev_read(device_t dev, int reg)
93 {
94 	uint8_t val;
95 	struct iicoc_softc *sc;
96 
97 	sc = device_get_softc(dev);
98 	val = bus_read_1(sc->mem_res, reg<<sc->reg_shift);
99 	return (val);
100 }
101 
102 static int
iicoc_wait_on_status(device_t dev,uint8_t bit)103 iicoc_wait_on_status(device_t dev, uint8_t bit)
104 {
105 	int tries = I2C_TIMEOUT;
106 	uint8_t status;
107 
108 	do {
109 		status = iicoc_dev_read(dev, OC_I2C_STATUS_REG);
110 	} while ((status & bit) != 0 && --tries > 0);
111 
112 	return (tries == 0 ? -1: 0);
113 }
114 
115 static int
iicoc_rd_cmd(device_t dev,uint8_t cmd)116 iicoc_rd_cmd(device_t dev, uint8_t cmd)
117 {
118 	uint8_t data;
119 
120 	iicoc_dev_write(dev, OC_I2C_CMD_REG, cmd);
121 	if (iicoc_wait_on_status(dev, OC_STATUS_TIP) < 0) {
122 		device_printf(dev, "read: Timeout waiting for TIP clear.\n");
123 		return (-1);
124 	}
125 	data = iicoc_dev_read(dev, OC_I2C_DATA_REG);
126 	return (data);
127 }
128 
129 static int
iicoc_wr_cmd(device_t dev,uint8_t data,uint8_t cmd)130 iicoc_wr_cmd(device_t dev, uint8_t data, uint8_t cmd)
131 {
132 
133 	iicoc_dev_write(dev, OC_I2C_DATA_REG, data);
134 	iicoc_dev_write(dev, OC_I2C_CMD_REG, cmd);
135 	if (iicoc_wait_on_status(dev, OC_STATUS_TIP) < 0) {
136 		device_printf(dev, "write: Timeout waiting for TIP clear.\n");
137 		return (-1);
138 	}
139 	return (0);
140 }
141 
142 static int
iicoc_wr_ack_cmd(device_t dev,uint8_t data,uint8_t cmd)143 iicoc_wr_ack_cmd(device_t dev, uint8_t data, uint8_t cmd)
144 {
145 	if (iicoc_wr_cmd(dev, data, cmd) < 0)
146 		return (-1);
147 
148 	if (iicoc_dev_read(dev, OC_I2C_STATUS_REG) & OC_STATUS_NACK) {
149 		device_printf(dev, "write: I2C command ACK Error.\n");
150 		return (IIC_ENOACK);
151 	}
152 	return (0);
153 }
154 
155 static int
iicoc_init(device_t dev)156 iicoc_init(device_t dev)
157 {
158 	struct iicoc_softc *sc;
159 	int value;
160 
161 	sc = device_get_softc(dev);
162 	value = iicoc_dev_read(dev, OC_I2C_CTRL_REG);
163 	iicoc_dev_write(dev, OC_I2C_CTRL_REG,
164 	    value & ~(OC_CONTROL_EN | OC_CONTROL_IEN));
165 	value = (sc->clockfreq/(5 * sc->i2cfreq)) - 1;
166 	iicoc_dev_write(dev, OC_I2C_PRESCALE_LO_REG, value & 0xff);
167 	iicoc_dev_write(dev, OC_I2C_PRESCALE_HI_REG, value >> 8);
168 	value = iicoc_dev_read(dev, OC_I2C_CTRL_REG);
169 	iicoc_dev_write(dev, OC_I2C_CTRL_REG, value | OC_CONTROL_EN);
170 
171 	value = iicoc_dev_read(dev, OC_I2C_CTRL_REG);
172 	/* return 0 on success, 1 on error */
173 	return ((value & OC_CONTROL_EN) == 0);
174 }
175 
176 static int
iicoc_probe(device_t dev)177 iicoc_probe(device_t dev)
178 {
179 	struct iicoc_softc *sc;
180 
181 	sc = device_get_softc(dev);
182 	if ((pci_get_vendor(dev) == 0x184e) &&
183 	    (pci_get_device(dev) == 0x1011)) {
184 		sc->clockfreq = XLP_I2C_CLKFREQ;
185 		sc->i2cfreq = XLP_I2C_FREQ;
186 		sc->reg_shift = 2;
187 		device_set_desc(dev, "Netlogic XLP I2C Controller");
188 		return (BUS_PROBE_DEFAULT);
189 	}
190 	return (ENXIO);
191 }
192 
193 
194 /*
195  * We add all the devices which we know about.
196  * The generic attach routine will attach them if they are alive.
197  */
198 static int
iicoc_attach(device_t dev)199 iicoc_attach(device_t dev)
200 {
201 	int bus;
202 	struct iicoc_softc *sc;
203 
204 	sc = device_get_softc(dev);
205 	bus = device_get_unit(dev);
206 
207 	sc->dev = dev;
208 	mtx_init(&sc->sc_mtx, "iicoc", "iicoc", MTX_DEF);
209 	sc->mem_rid = 0;
210 	sc->mem_res = bus_alloc_resource(dev,
211 	    SYS_RES_MEMORY, &sc->mem_rid, 0ul, ~0ul, 0x100, RF_ACTIVE);
212 
213 	if (sc->mem_res == NULL) {
214 		device_printf(dev, "Could not allocate bus resource.\n");
215 		return (-1);
216 	}
217 	iicoc_init(dev);
218 	sc->iicbus = device_add_child(dev, "iicbus", -1);
219 	if (sc->iicbus == NULL) {
220 		device_printf(dev, "Could not allocate iicbus instance.\n");
221 		return (-1);
222 	}
223 	bus_generic_attach(dev);
224 
225 	return (0);
226 }
227 
228 static int
iicoc_detach(device_t dev)229 iicoc_detach(device_t dev)
230 {
231 	bus_generic_detach(dev);
232 	device_delete_children(dev);
233 
234 	return (0);
235 }
236 
237 static int
iicoc_start(device_t dev,u_char slave,int timeout)238 iicoc_start(device_t dev, u_char slave, int timeout)
239 {
240 	int error = IIC_EBUSERR;
241 	struct iicoc_softc *sc;
242 
243 	sc = device_get_softc(dev);
244 	mtx_lock(&sc->sc_mtx);
245 	sc->i2cdev_addr = (slave >> 1);
246 
247 	/* Verify the bus is idle */
248 	if (iicoc_wait_on_status(dev, OC_STATUS_BUSY) < 0)
249 		goto i2c_stx_error;
250 
251 	/* Write Slave Address */
252 	if (iicoc_wr_ack_cmd(dev, slave, OC_COMMAND_START)) {
253 		device_printf(dev,
254 		    "I2C write slave address [0x%x] failed.\n", slave);
255 		error = IIC_ENOACK;
256 		goto i2c_stx_error;
257 	}
258 
259 	/* Verify Arbitration is not Lost */
260 	if (iicoc_dev_read(dev, OC_I2C_STATUS_REG) & OC_STATUS_AL) {
261 		device_printf(dev, "I2C Bus Arbitration Lost, Aborting.\n");
262 		error = IIC_EBUSERR;
263 		goto i2c_stx_error;
264 	}
265 	error = IIC_NOERR;
266 	mtx_unlock(&sc->sc_mtx);
267 	return (error);
268 i2c_stx_error:
269 	iicoc_dev_write(dev, OC_I2C_CMD_REG, OC_COMMAND_STOP);
270 	iicoc_wait_on_status(dev, OC_STATUS_BUSY);  /* wait for idle */
271 	mtx_unlock(&sc->sc_mtx);
272 	return (error);
273 }
274 
275 static int
iicoc_stop(device_t dev)276 iicoc_stop(device_t dev)
277 {
278 	int error = 0;
279 	struct iicoc_softc *sc;
280 
281 	sc = device_get_softc(dev);
282 	mtx_lock(&sc->sc_mtx);
283 	iicoc_dev_write(dev, OC_I2C_CMD_REG, OC_COMMAND_STOP);
284 	iicoc_wait_on_status(dev, OC_STATUS_BUSY);  /* wait for idle */
285 	mtx_unlock(&sc->sc_mtx);
286 	return (error);
287 
288 }
289 
290 static int
iicoc_write(device_t dev,const char * buf,int len,int * sent,int timeout)291 iicoc_write(device_t dev, const char *buf, int len,
292     int *sent, int timeout /* us */ )
293 {
294 	uint8_t value;
295 	int i;
296 
297 	value = buf[0];
298 	/* Write Slave Offset */
299 	if (iicoc_wr_ack_cmd(dev, value, OC_COMMAND_WRITE)) {
300 		device_printf(dev, "I2C write slave offset failed.\n");
301 		goto i2c_tx_error;
302 	}
303 
304 	for (i = 1; i < len; i++) {
305 		/* Write data byte */
306 		value = buf[i];
307 		if (iicoc_wr_cmd(dev, value, OC_COMMAND_WRITE)) {
308 			device_printf(dev, "I2C write data byte %d failed.\n",
309 			    i);
310 			goto i2c_tx_error;
311 		}
312 	}
313 	*sent = len;
314 	return (IIC_NOERR);
315 
316 i2c_tx_error:
317 	return (IIC_EBUSERR);
318 }
319 
320 static int
iicoc_read(device_t dev,char * buf,int len,int * read,int last,int delay)321 iicoc_read(device_t dev, char *buf, int len, int *read, int last,
322     int delay)
323 {
324 	int data, i;
325 	uint8_t cmd;
326 
327 	for (i = 0; i < len; i++) {
328 		/* Read data byte */
329 		cmd = (i == len - 1) ? OC_COMMAND_RDNACK : OC_COMMAND_READ;
330 		data = iicoc_rd_cmd(dev, cmd);
331 		if (data < 0) {
332 			device_printf(dev,
333 			    "I2C read data byte %d failed.\n", i);
334 			goto i2c_rx_error;
335 		}
336 		buf[i] = (uint8_t)data;
337 	}
338 
339 	*read = len;
340 	return (IIC_NOERR);
341 
342 i2c_rx_error:
343 	return (IIC_EBUSERR);
344 }
345 
346 static int
iicoc_reset(device_t dev,u_char speed,u_char addr,u_char * oldadr)347 iicoc_reset(device_t dev, u_char speed, u_char addr, u_char *oldadr)
348 {
349 	int error;
350 	struct iicoc_softc *sc;
351 
352 	sc = device_get_softc(dev);
353 	mtx_lock(&sc->sc_mtx);
354 	error = iicoc_init(dev);
355 	mtx_unlock(&sc->sc_mtx);
356 	return (error);
357 }
358 
359 static int
iicoc_repeated_start(device_t dev,u_char slave,int timeout)360 iicoc_repeated_start(device_t dev, u_char slave, int timeout)
361 {
362 	return 0;
363 }
364 
365 static device_method_t iicoc_methods[] = {
366 	/* device interface */
367 	DEVMETHOD(device_probe, iicoc_probe),
368 	DEVMETHOD(device_attach, iicoc_attach),
369 	DEVMETHOD(device_detach, iicoc_detach),
370 
371 	/* iicbus interface */
372 	DEVMETHOD(iicbus_callback, iicbus_null_callback),
373 	DEVMETHOD(iicbus_repeated_start, iicoc_repeated_start),
374 	DEVMETHOD(iicbus_start, iicoc_start),
375 	DEVMETHOD(iicbus_stop, iicoc_stop),
376 	DEVMETHOD(iicbus_reset, iicoc_reset),
377 	DEVMETHOD(iicbus_write, iicoc_write),
378 	DEVMETHOD(iicbus_read, iicoc_read),
379 	DEVMETHOD(iicbus_transfer, iicbus_transfer_gen),
380 
381 	DEVMETHOD_END
382 };
383 
384 static driver_t iicoc_driver = {
385 	"iicoc",
386 	iicoc_methods,
387 	sizeof(struct iicoc_softc),
388 };
389 
390 DRIVER_MODULE(iicoc, pci, iicoc_driver, iicoc_devclass, 0, 0);
391 DRIVER_MODULE(iicbus, iicoc, iicbus_driver, iicbus_devclass, 0, 0);
392