1 /*-
2  * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD: stable/10/sys/dev/cpuctl/cpuctl.c 315972 2017-03-26 01:10:59Z kib $");
30 
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/conf.h>
34 #include <sys/fcntl.h>
35 #include <sys/ioccom.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/mutex.h>
39 #include <sys/priv.h>
40 #include <sys/proc.h>
41 #include <sys/queue.h>
42 #include <sys/sched.h>
43 #include <sys/kernel.h>
44 #include <sys/sysctl.h>
45 #include <sys/uio.h>
46 #include <sys/pcpu.h>
47 #include <sys/smp.h>
48 #include <sys/pmckern.h>
49 #include <sys/cpuctl.h>
50 
51 #include <machine/cpufunc.h>
52 #include <machine/md_var.h>
53 #include <machine/specialreg.h>
54 
55 static d_open_t cpuctl_open;
56 static d_ioctl_t cpuctl_ioctl;
57 
58 #define	CPUCTL_VERSION 1
59 
60 #ifdef CPUCTL_DEBUG
61 # define	DPRINTF(format,...) printf(format, __VA_ARGS__);
62 #else
63 # define	DPRINTF(...)
64 #endif
65 
66 #define	UCODE_SIZE_MAX	(4 * 1024 * 1024)
67 
68 static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd,
69     struct thread *td);
70 static int cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data,
71     struct thread *td);
72 static int cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data,
73     struct thread *td);
74 static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data,
75     struct thread *td);
76 static int update_intel(int cpu, cpuctl_update_args_t *args,
77     struct thread *td);
78 static int update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td);
79 static int update_via(int cpu, cpuctl_update_args_t *args,
80     struct thread *td);
81 
82 static struct cdev **cpuctl_devs;
83 static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer");
84 
85 static struct cdevsw cpuctl_cdevsw = {
86         .d_version =    D_VERSION,
87         .d_open =       cpuctl_open,
88         .d_ioctl =      cpuctl_ioctl,
89         .d_name =       "cpuctl",
90 };
91 
92 /*
93  * This function checks if specified cpu enabled or not.
94  */
95 static int
cpu_enabled(int cpu)96 cpu_enabled(int cpu)
97 {
98 
99 	return (pmc_cpu_is_disabled(cpu) == 0);
100 }
101 
102 /*
103  * Check if the current thread is bound to a specific cpu.
104  */
105 static int
cpu_sched_is_bound(struct thread * td)106 cpu_sched_is_bound(struct thread *td)
107 {
108 	int ret;
109 
110 	thread_lock(td);
111 	ret = sched_is_bound(td);
112 	thread_unlock(td);
113 	return (ret);
114 }
115 
116 /*
117  * Switch to target cpu to run.
118  */
119 static void
set_cpu(int cpu,struct thread * td)120 set_cpu(int cpu, struct thread *td)
121 {
122 
123 	KASSERT(cpu >= 0 && cpu < mp_ncpus && cpu_enabled(cpu),
124 	    ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
125 	thread_lock(td);
126 	sched_bind(td, cpu);
127 	thread_unlock(td);
128 	KASSERT(td->td_oncpu == cpu,
129 	    ("[cpuctl,%d]: cannot bind to target cpu %d", __LINE__, cpu));
130 }
131 
132 static void
restore_cpu(int oldcpu,int is_bound,struct thread * td)133 restore_cpu(int oldcpu, int is_bound, struct thread *td)
134 {
135 
136 	KASSERT(oldcpu >= 0 && oldcpu < mp_ncpus && cpu_enabled(oldcpu),
137 	    ("[cpuctl,%d]: bad cpu number %d", __LINE__, oldcpu));
138 	thread_lock(td);
139 	if (is_bound == 0)
140 		sched_unbind(td);
141 	else
142 		sched_bind(td, oldcpu);
143 	thread_unlock(td);
144 }
145 
146 int
cpuctl_ioctl(struct cdev * dev,u_long cmd,caddr_t data,int flags,struct thread * td)147 cpuctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data,
148 	int flags, struct thread *td)
149 {
150 	int ret;
151 	int cpu = dev2unit(dev);
152 
153 	if (cpu >= mp_ncpus || !cpu_enabled(cpu)) {
154 		DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu);
155 		return (ENXIO);
156 	}
157 	/* Require write flag for "write" requests. */
158 	if ((cmd == CPUCTL_MSRCBIT || cmd == CPUCTL_MSRSBIT ||
159 	    cmd == CPUCTL_UPDATE || cmd == CPUCTL_WRMSR) &&
160 	    (flags & FWRITE) == 0)
161 		return (EPERM);
162 	switch (cmd) {
163 	case CPUCTL_RDMSR:
164 		ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td);
165 		break;
166 	case CPUCTL_MSRSBIT:
167 	case CPUCTL_MSRCBIT:
168 	case CPUCTL_WRMSR:
169 		ret = priv_check(td, PRIV_CPUCTL_WRMSR);
170 		if (ret != 0)
171 			goto fail;
172 		ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td);
173 		break;
174 	case CPUCTL_CPUID:
175 		ret = cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data, td);
176 		break;
177 	case CPUCTL_UPDATE:
178 		ret = priv_check(td, PRIV_CPUCTL_UPDATE);
179 		if (ret != 0)
180 			goto fail;
181 		ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data, td);
182 		break;
183 	case CPUCTL_CPUID_COUNT:
184 		ret = cpuctl_do_cpuid_count(cpu,
185 		    (cpuctl_cpuid_count_args_t *)data, td);
186 		break;
187 	default:
188 		ret = EINVAL;
189 		break;
190 	}
191 fail:
192 	return (ret);
193 }
194 
195 /*
196  * Actually perform cpuid operation.
197  */
198 static int
cpuctl_do_cpuid_count(int cpu,cpuctl_cpuid_count_args_t * data,struct thread * td)199 cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data,
200     struct thread *td)
201 {
202 	int is_bound = 0;
203 	int oldcpu;
204 
205 	KASSERT(cpu >= 0 && cpu < mp_ncpus,
206 	    ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
207 
208 	/* Explicitly clear cpuid data to avoid returning stale info. */
209 	bzero(data->data, sizeof(data->data));
210 	DPRINTF("[cpuctl,%d]: retrieving cpuid lev %#0x type %#0x for %d cpu\n",
211 	    __LINE__, data->level, data->level_type, cpu);
212 #ifdef __i386__
213 	if (cpu_id == 0)
214 		return (ENODEV);
215 #endif
216 	oldcpu = td->td_oncpu;
217 	is_bound = cpu_sched_is_bound(td);
218 	set_cpu(cpu, td);
219 	cpuid_count(data->level, data->level_type, data->data);
220 	restore_cpu(oldcpu, is_bound, td);
221 	return (0);
222 }
223 
224 static int
cpuctl_do_cpuid(int cpu,cpuctl_cpuid_args_t * data,struct thread * td)225 cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data, struct thread *td)
226 {
227 	cpuctl_cpuid_count_args_t cdata;
228 	int error;
229 
230 	cdata.level = data->level;
231 	/* Override the level type. */
232 	cdata.level_type = 0;
233 	error = cpuctl_do_cpuid_count(cpu, &cdata, td);
234 	bcopy(cdata.data, data->data, sizeof(data->data)); /* Ignore error */
235 	return (error);
236 }
237 
238 /*
239  * Actually perform MSR operations.
240  */
241 static int
cpuctl_do_msr(int cpu,cpuctl_msr_args_t * data,u_long cmd,struct thread * td)242 cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd, struct thread *td)
243 {
244 	uint64_t reg;
245 	int is_bound = 0;
246 	int oldcpu;
247 	int ret;
248 
249 	KASSERT(cpu >= 0 && cpu < mp_ncpus,
250 	    ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
251 
252 	/*
253 	 * Explicitly clear cpuid data to avoid returning stale
254 	 * info
255 	 */
256 	DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__,
257 	    data->msr, cpu);
258 #ifdef __i386__
259 	if ((cpu_feature & CPUID_MSR) == 0)
260 		return (ENODEV);
261 #endif
262 	oldcpu = td->td_oncpu;
263 	is_bound = cpu_sched_is_bound(td);
264 	set_cpu(cpu, td);
265 	if (cmd == CPUCTL_RDMSR) {
266 		data->data = 0;
267 		ret = rdmsr_safe(data->msr, &data->data);
268 	} else if (cmd == CPUCTL_WRMSR) {
269 		ret = wrmsr_safe(data->msr, data->data);
270 	} else if (cmd == CPUCTL_MSRSBIT) {
271 		critical_enter();
272 		ret = rdmsr_safe(data->msr, &reg);
273 		if (ret == 0)
274 			ret = wrmsr_safe(data->msr, reg | data->data);
275 		critical_exit();
276 	} else if (cmd == CPUCTL_MSRCBIT) {
277 		critical_enter();
278 		ret = rdmsr_safe(data->msr, &reg);
279 		if (ret == 0)
280 			ret = wrmsr_safe(data->msr, reg & ~data->data);
281 		critical_exit();
282 	} else
283 		panic("[cpuctl,%d]: unknown operation requested: %lu", __LINE__, cmd);
284 	restore_cpu(oldcpu, is_bound, td);
285 	return (ret);
286 }
287 
288 /*
289  * Actually perform microcode update.
290  */
291 static int
cpuctl_do_update(int cpu,cpuctl_update_args_t * data,struct thread * td)292 cpuctl_do_update(int cpu, cpuctl_update_args_t *data, struct thread *td)
293 {
294 	cpuctl_cpuid_args_t args = {
295 		.level = 0,
296 	};
297 	char vendor[13];
298 	int ret;
299 
300 	KASSERT(cpu >= 0 && cpu < mp_ncpus,
301 	    ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
302 	DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu);
303 
304 	ret = cpuctl_do_cpuid(cpu, &args, td);
305 	if (ret != 0)
306 		return (ret);
307 	((uint32_t *)vendor)[0] = args.data[1];
308 	((uint32_t *)vendor)[1] = args.data[3];
309 	((uint32_t *)vendor)[2] = args.data[2];
310 	vendor[12] = '\0';
311 	if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0)
312 		ret = update_intel(cpu, data, td);
313 	else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0)
314 		ret = update_amd(cpu, data, td);
315 	else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) == 0)
316 		ret = update_via(cpu, data, td);
317 	else
318 		ret = ENXIO;
319 	return (ret);
320 }
321 
322 static int
update_intel(int cpu,cpuctl_update_args_t * args,struct thread * td)323 update_intel(int cpu, cpuctl_update_args_t *args, struct thread *td)
324 {
325 	void *ptr;
326 	uint64_t rev0, rev1;
327 	uint32_t tmp[4];
328 	int is_bound;
329 	int oldcpu;
330 	int ret;
331 
332 	if (args->size == 0 || args->data == NULL) {
333 		DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
334 		return (EINVAL);
335 	}
336 	if (args->size > UCODE_SIZE_MAX) {
337 		DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
338 		return (EINVAL);
339 	}
340 
341 	/*
342 	 * 16 byte alignment required.  Rely on the fact that
343 	 * malloc(9) always returns the pointer aligned at least on
344 	 * the size of the allocation.
345 	 */
346 	ptr = malloc(args->size + 16, M_CPUCTL, M_WAITOK);
347 	if (copyin(args->data, ptr, args->size) != 0) {
348 		DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
349 		    __LINE__, args->data, ptr, args->size);
350 		ret = EFAULT;
351 		goto fail;
352 	}
353 	oldcpu = td->td_oncpu;
354 	is_bound = cpu_sched_is_bound(td);
355 	set_cpu(cpu, td);
356 	critical_enter();
357 	rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
358 
359 	/*
360 	 * Perform update.
361 	 */
362 	wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
363 	wrmsr_safe(MSR_BIOS_SIGN, 0);
364 
365 	/*
366 	 * Serialize instruction flow.
367 	 */
368 	do_cpuid(0, tmp);
369 	critical_exit();
370 	rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */
371 	restore_cpu(oldcpu, is_bound, td);
372 	if (rev1 > rev0)
373 		ret = 0;
374 	else
375 		ret = EEXIST;
376 fail:
377 	free(ptr, M_CPUCTL);
378 	return (ret);
379 }
380 
381 /*
382  * NB: MSR 0xc0010020, MSR_K8_UCODE_UPDATE, is not documented by AMD.
383  * Coreboot, illumos and Linux source code was used to understand
384  * its workings.
385  */
386 static void
amd_ucode_wrmsr(void * ucode_ptr)387 amd_ucode_wrmsr(void *ucode_ptr)
388 {
389 	uint32_t tmp[4];
390 
391 	wrmsr_safe(MSR_K8_UCODE_UPDATE, (uintptr_t)ucode_ptr);
392 	do_cpuid(0, tmp);
393 }
394 
395 static int
update_amd(int cpu,cpuctl_update_args_t * args,struct thread * td)396 update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td)
397 {
398 	void *ptr;
399 	int ret;
400 
401 	if (args->size == 0 || args->data == NULL) {
402 		DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
403 		return (EINVAL);
404 	}
405 	if (args->size > UCODE_SIZE_MAX) {
406 		DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
407 		return (EINVAL);
408 	}
409 
410 	/*
411 	 * 16 byte alignment required.  Rely on the fact that
412 	 * malloc(9) always returns the pointer aligned at least on
413 	 * the size of the allocation.
414 	 */
415 	ptr = malloc(args->size + 16, M_CPUCTL, M_ZERO | M_WAITOK);
416 	if (copyin(args->data, ptr, args->size) != 0) {
417 		DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
418 		    __LINE__, args->data, ptr, args->size);
419 		ret = EFAULT;
420 		goto fail;
421 	}
422 	smp_rendezvous(NULL, amd_ucode_wrmsr, NULL, ptr);
423 	ret = 0;
424 fail:
425 	free(ptr, M_CPUCTL);
426 	return (ret);
427 }
428 
429 static int
update_via(int cpu,cpuctl_update_args_t * args,struct thread * td)430 update_via(int cpu, cpuctl_update_args_t *args, struct thread *td)
431 {
432 	void *ptr;
433 	uint64_t rev0, rev1, res;
434 	uint32_t tmp[4];
435 	int is_bound;
436 	int oldcpu;
437 	int ret;
438 
439 	if (args->size == 0 || args->data == NULL) {
440 		DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
441 		return (EINVAL);
442 	}
443 	if (args->size > UCODE_SIZE_MAX) {
444 		DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
445 		return (EINVAL);
446 	}
447 
448 	/*
449 	 * 4 byte alignment required.
450 	 */
451 	ptr = malloc(args->size, M_CPUCTL, M_WAITOK);
452 	if (copyin(args->data, ptr, args->size) != 0) {
453 		DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
454 		    __LINE__, args->data, ptr, args->size);
455 		ret = EFAULT;
456 		goto fail;
457 	}
458 	oldcpu = td->td_oncpu;
459 	is_bound = cpu_sched_is_bound(td);
460 	set_cpu(cpu, td);
461 	critical_enter();
462 	rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
463 
464 	/*
465 	 * Perform update.
466 	 */
467 	wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
468 	do_cpuid(1, tmp);
469 
470 	/*
471 	 * Result are in low byte of MSR FCR5:
472 	 * 0x00: No update has been attempted since RESET.
473 	 * 0x01: The last attempted update was successful.
474 	 * 0x02: The last attempted update was unsuccessful due to a bad
475 	 *       environment. No update was loaded and any preexisting
476 	 *       patches are still active.
477 	 * 0x03: The last attempted update was not applicable to this processor.
478 	 *       No update was loaded and any preexisting patches are still
479 	 *       active.
480 	 * 0x04: The last attempted update was not successful due to an invalid
481 	 *       update data block. No update was loaded and any preexisting
482 	 *       patches are still active
483 	 */
484 	rdmsr_safe(0x1205, &res);
485 	res &= 0xff;
486 	critical_exit();
487 	rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */
488 	restore_cpu(oldcpu, is_bound, td);
489 
490 	DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__,
491 	    (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res);
492 
493 	if (res != 0x01)
494 		ret = EINVAL;
495 	else
496 		ret = 0;
497 fail:
498 	free(ptr, M_CPUCTL);
499 	return (ret);
500 }
501 
502 int
cpuctl_open(struct cdev * dev,int flags,int fmt __unused,struct thread * td)503 cpuctl_open(struct cdev *dev, int flags, int fmt __unused, struct thread *td)
504 {
505 	int ret = 0;
506 	int cpu;
507 
508 	cpu = dev2unit(dev);
509 	if (cpu >= mp_ncpus || !cpu_enabled(cpu)) {
510 		DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n", __LINE__,
511 		    cpu);
512 		return (ENXIO);
513 	}
514 	if (flags & FWRITE)
515 		ret = securelevel_gt(td->td_ucred, 0);
516 	return (ret);
517 }
518 
519 static int
cpuctl_modevent(module_t mod __unused,int type,void * data __unused)520 cpuctl_modevent(module_t mod __unused, int type, void *data __unused)
521 {
522 	int cpu;
523 
524 	switch(type) {
525 	case MOD_LOAD:
526 		if (bootverbose)
527 			printf("cpuctl: access to MSR registers/cpuid info.\n");
528 		cpuctl_devs = malloc(sizeof(*cpuctl_devs) * mp_ncpus, M_CPUCTL,
529 		    M_WAITOK | M_ZERO);
530 		for (cpu = 0; cpu < mp_ncpus; cpu++)
531 			if (cpu_enabled(cpu))
532 				cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu,
533 				    UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu);
534 		break;
535 	case MOD_UNLOAD:
536 		for (cpu = 0; cpu < mp_ncpus; cpu++) {
537 			if (cpuctl_devs[cpu] != NULL)
538 				destroy_dev(cpuctl_devs[cpu]);
539 		}
540 		free(cpuctl_devs, M_CPUCTL);
541 		break;
542 	case MOD_SHUTDOWN:
543 		break;
544 	default:
545 		return (EOPNOTSUPP);
546         }
547 	return (0);
548 }
549 
550 DEV_MODULE(cpuctl, cpuctl_modevent, NULL);
551 MODULE_VERSION(cpuctl, CPUCTL_VERSION);
552