1 /*-
2 * Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 */
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD: stable/10/sys/arm/lpc/lpc_spi.c 266152 2014-05-15 16:11:06Z ian $");
29
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bio.h>
33 #include <sys/bus.h>
34 #include <sys/conf.h>
35 #include <sys/endian.h>
36 #include <sys/kernel.h>
37 #include <sys/kthread.h>
38 #include <sys/lock.h>
39 #include <sys/malloc.h>
40 #include <sys/module.h>
41 #include <sys/mutex.h>
42 #include <sys/queue.h>
43 #include <sys/resource.h>
44 #include <sys/rman.h>
45 #include <sys/time.h>
46 #include <sys/timetc.h>
47 #include <sys/watchdog.h>
48
49 #include <machine/bus.h>
50 #include <machine/cpu.h>
51 #include <machine/cpufunc.h>
52 #include <machine/resource.h>
53 #include <machine/intr.h>
54
55 #include <dev/spibus/spi.h>
56 #include <dev/spibus/spibusvar.h>
57
58 #include <dev/ofw/ofw_bus.h>
59 #include <dev/ofw/ofw_bus_subr.h>
60
61 #include <arm/lpc/lpcreg.h>
62 #include <arm/lpc/lpcvar.h>
63
64 #include "spibus_if.h"
65
66 struct lpc_spi_softc
67 {
68 device_t ls_dev;
69 struct resource * ls_mem_res;
70 struct resource * ls_irq_res;
71 bus_space_tag_t ls_bst;
72 bus_space_handle_t ls_bsh;
73 };
74
75 static int lpc_spi_probe(device_t);
76 static int lpc_spi_attach(device_t);
77 static int lpc_spi_detach(device_t);
78 static int lpc_spi_transfer(device_t, device_t, struct spi_command *);
79
80 #define lpc_spi_read_4(_sc, _reg) \
81 bus_space_read_4(_sc->ls_bst, _sc->ls_bsh, _reg)
82 #define lpc_spi_write_4(_sc, _reg, _val) \
83 bus_space_write_4(_sc->ls_bst, _sc->ls_bsh, _reg, _val)
84
85 static int
lpc_spi_probe(device_t dev)86 lpc_spi_probe(device_t dev)
87 {
88
89 if (!ofw_bus_status_okay(dev))
90 return (ENXIO);
91
92 if (!ofw_bus_is_compatible(dev, "lpc,spi"))
93 return (ENXIO);
94
95 device_set_desc(dev, "LPC32x0 PL022 SPI/SSP controller");
96 return (BUS_PROBE_DEFAULT);
97 }
98
99 static int
lpc_spi_attach(device_t dev)100 lpc_spi_attach(device_t dev)
101 {
102 struct lpc_spi_softc *sc = device_get_softc(dev);
103 int rid;
104
105 sc->ls_dev = dev;
106
107 rid = 0;
108 sc->ls_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
109 RF_ACTIVE);
110 if (!sc->ls_mem_res) {
111 device_printf(dev, "cannot allocate memory window\n");
112 return (ENXIO);
113 }
114
115 sc->ls_bst = rman_get_bustag(sc->ls_mem_res);
116 sc->ls_bsh = rman_get_bushandle(sc->ls_mem_res);
117
118 rid = 0;
119 sc->ls_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
120 RF_ACTIVE);
121 if (!sc->ls_irq_res) {
122 device_printf(dev, "cannot allocate interrupt\n");
123 return (ENXIO);
124 }
125
126 bus_space_write_4(sc->ls_bst, 0xd0028100, 0, (1<<12)|(1<<10)|(1<<9)|(1<<8)|(1<<6)|(1<<5));
127 lpc_pwr_write(dev, LPC_CLKPWR_SSP_CTRL, LPC_CLKPWR_SSP_CTRL_SSP0EN);
128 lpc_spi_write_4(sc, LPC_SSP_CR0, LPC_SSP_CR0_DSS(8));
129 lpc_spi_write_4(sc, LPC_SSP_CR1, LPC_SSP_CR1_SSE);
130 lpc_spi_write_4(sc, LPC_SSP_CPSR, 128);
131
132 device_add_child(dev, "spibus", 0);
133 return (bus_generic_attach(dev));
134 }
135
136 static int
lpc_spi_detach(device_t dev)137 lpc_spi_detach(device_t dev)
138 {
139 return (EBUSY);
140 }
141
142 static int
lpc_spi_transfer(device_t dev,device_t child,struct spi_command * cmd)143 lpc_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
144 {
145 struct lpc_spi_softc *sc = device_get_softc(dev);
146 struct spibus_ivar *devi = SPIBUS_IVAR(child);
147 uint8_t *in_buf, *out_buf;
148 int i;
149
150 /* Set CS active */
151 lpc_gpio_set_state(child, devi->cs, 0);
152
153 /* Wait for FIFO to be ready */
154 while ((lpc_spi_read_4(sc, LPC_SSP_SR) & LPC_SSP_SR_TNF) == 0);
155
156 /* Command */
157 in_buf = cmd->rx_cmd;
158 out_buf = cmd->tx_cmd;
159 for (i = 0; i < cmd->tx_cmd_sz; i++) {
160 lpc_spi_write_4(sc, LPC_SSP_DR, out_buf[i]);
161 in_buf[i] = lpc_spi_read_4(sc, LPC_SSP_DR);
162 }
163
164 /* Data */
165 in_buf = cmd->rx_data;
166 out_buf = cmd->tx_data;
167 for (i = 0; i < cmd->tx_data_sz; i++) {
168 lpc_spi_write_4(sc, LPC_SSP_DR, out_buf[i]);
169 in_buf[i] = lpc_spi_read_4(sc, LPC_SSP_DR);
170 }
171
172 /* Set CS inactive */
173 lpc_gpio_set_state(child, devi->cs, 1);
174
175 return (0);
176 }
177
178 static device_method_t lpc_spi_methods[] = {
179 /* Device interface */
180 DEVMETHOD(device_probe, lpc_spi_probe),
181 DEVMETHOD(device_attach, lpc_spi_attach),
182 DEVMETHOD(device_detach, lpc_spi_detach),
183
184 /* SPI interface */
185 DEVMETHOD(spibus_transfer, lpc_spi_transfer),
186
187 { 0, 0 }
188 };
189
190 static devclass_t lpc_spi_devclass;
191
192 static driver_t lpc_spi_driver = {
193 "spi",
194 lpc_spi_methods,
195 sizeof(struct lpc_spi_softc),
196 };
197
198 DRIVER_MODULE(lpcspi, simplebus, lpc_spi_driver, lpc_spi_devclass, 0, 0);
199