1 /*-
2  * Copyright (c) 1994-1998 Mark Brinicombe.
3  * Copyright (c) 1994 Brini.
4  * All rights reserved.
5  *
6  * This code is derived from software written for Brini by Mark Brinicombe
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *      This product includes software developed by Brini.
19  * 4. The name of the company nor the name of the author may be used to
20  *    endorse or promote products derived from this software without specific
21  *    prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
24  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  * from: FreeBSD: //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c, rev 45
36  */
37 
38 #include "opt_ddb.h"
39 #include "opt_platform.h"
40 
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD: stable/10/sys/arm/lpc/lpc_machdep.c 266084 2014-05-14 19:18:58Z ian $");
43 
44 #define _ARM32_BUS_DMA_PRIVATE
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/bus.h>
48 
49 #include <vm/vm.h>
50 #include <vm/pmap.h>
51 
52 #include <machine/bus.h>
53 #include <machine/fdt.h>
54 #include <machine/devmap.h>
55 #include <machine/machdep.h>
56 
57 #include <arm/lpc/lpcreg.h>
58 #include <arm/lpc/lpcvar.h>
59 
60 #include <dev/fdt/fdt_common.h>
61 
62 vm_offset_t
initarm_lastaddr(void)63 initarm_lastaddr(void)
64 {
65 
66 	return (arm_devmap_lastaddr());
67 }
68 
69 void
initarm_early_init(void)70 initarm_early_init(void)
71 {
72 }
73 
74 void
initarm_gpio_init(void)75 initarm_gpio_init(void)
76 {
77 
78 	/*
79 	 * Set initial values of GPIO output ports
80 	 */
81 	platform_gpio_init();
82 }
83 
84 void
initarm_late_init(void)85 initarm_late_init(void)
86 {
87 }
88 
89 /*
90  * Add a single static device mapping.
91  * The values used were taken from the ranges property of the SoC node in the
92  * dts file when this code was converted to arm_devmap_add_entry().
93  */
94 int
initarm_devmap_init(void)95 initarm_devmap_init(void)
96 {
97 
98 	arm_devmap_add_entry(LPC_DEV_PHYS_BASE, LPC_DEV_SIZE);
99 	return (0);
100 }
101 
102 struct arm32_dma_range *
bus_dma_get_range(void)103 bus_dma_get_range(void)
104 {
105 
106 	return (NULL);
107 }
108 
109 int
bus_dma_get_range_nb(void)110 bus_dma_get_range_nb(void)
111 {
112 
113 	return (0);
114 }
115 
116 void
cpu_reset(void)117 cpu_reset(void)
118 {
119 	bus_space_tag_t bst;
120 	bus_space_handle_t bsh;
121 
122 	bst = fdtbus_bs_tag;
123 
124 	/* Enable WDT */
125 	bus_space_map(bst, LPC_CLKPWR_PHYS_BASE, LPC_CLKPWR_SIZE, 0, &bsh);
126 	bus_space_write_4(bst, bsh, LPC_CLKPWR_TIMCLK_CTRL,
127 	    LPC_CLKPWR_TIMCLK_CTRL_WATCHDOG);
128 	bus_space_unmap(bst, bsh, LPC_CLKPWR_SIZE);
129 
130 	/* Instant assert of RESETOUT_N with pulse length 1ms */
131 	bus_space_map(bst, LPC_WDTIM_PHYS_BASE, LPC_WDTIM_SIZE, 0, &bsh);
132 	bus_space_write_4(bst, bsh, LPC_WDTIM_PULSE, 13000);
133 	bus_space_write_4(bst, bsh, LPC_WDTIM_MCTRL, 0x70);
134 	bus_space_unmap(bst, bsh, LPC_WDTIM_SIZE);
135 
136 	for (;;)
137 		continue;
138 }
139 
140