1 /*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31
32 #ifndef __RADEON_OBJECT_H__
33 #define __RADEON_OBJECT_H__
34
35 #include <dev/drm2/radeon/radeon_drm.h>
36 #include "radeon.h"
37
38 /*
39 * Undefine max_offset (defined in vm/vm_map.h), because it conflicts
40 * with an argument of the function radeon_bo_pin_restricted().
41 */
42 #undef max_offset
43
44 /**
45 * radeon_mem_type_to_domain - return domain corresponding to mem_type
46 * @mem_type: ttm memory type
47 *
48 * Returns corresponding domain of the ttm mem_type
49 */
radeon_mem_type_to_domain(u32 mem_type)50 static inline unsigned radeon_mem_type_to_domain(u32 mem_type)
51 {
52 switch (mem_type) {
53 case TTM_PL_VRAM:
54 return RADEON_GEM_DOMAIN_VRAM;
55 case TTM_PL_TT:
56 return RADEON_GEM_DOMAIN_GTT;
57 case TTM_PL_SYSTEM:
58 return RADEON_GEM_DOMAIN_CPU;
59 default:
60 break;
61 }
62 return 0;
63 }
64
65 int radeon_bo_reserve(struct radeon_bo *bo, bool no_intr);
66
radeon_bo_unreserve(struct radeon_bo * bo)67 static inline void radeon_bo_unreserve(struct radeon_bo *bo)
68 {
69 ttm_bo_unreserve(&bo->tbo);
70 }
71
72 /**
73 * radeon_bo_gpu_offset - return GPU offset of bo
74 * @bo: radeon object for which we query the offset
75 *
76 * Returns current GPU offset of the object.
77 *
78 * Note: object should either be pinned or reserved when calling this
79 * function, it might be useful to add check for this for debugging.
80 */
radeon_bo_gpu_offset(struct radeon_bo * bo)81 static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo)
82 {
83 return bo->tbo.offset;
84 }
85
radeon_bo_size(struct radeon_bo * bo)86 static inline unsigned long radeon_bo_size(struct radeon_bo *bo)
87 {
88 return bo->tbo.num_pages << PAGE_SHIFT;
89 }
90
radeon_bo_is_reserved(struct radeon_bo * bo)91 static inline bool radeon_bo_is_reserved(struct radeon_bo *bo)
92 {
93 return ttm_bo_is_reserved(&bo->tbo);
94 }
95
radeon_bo_ngpu_pages(struct radeon_bo * bo)96 static inline unsigned radeon_bo_ngpu_pages(struct radeon_bo *bo)
97 {
98 return (bo->tbo.num_pages << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
99 }
100
radeon_bo_gpu_page_alignment(struct radeon_bo * bo)101 static inline unsigned radeon_bo_gpu_page_alignment(struct radeon_bo *bo)
102 {
103 return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
104 }
105
106 /**
107 * radeon_bo_mmap_offset - return mmap offset of bo
108 * @bo: radeon object for which we query the offset
109 *
110 * Returns mmap offset of the object.
111 *
112 * Note: addr_space_offset is constant after ttm bo init thus isn't protected
113 * by any lock.
114 */
radeon_bo_mmap_offset(struct radeon_bo * bo)115 static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo)
116 {
117 return bo->tbo.addr_space_offset;
118 }
119
120 extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,
121 bool no_wait);
122
123 extern int radeon_bo_create(struct radeon_device *rdev,
124 unsigned long size, int byte_align,
125 bool kernel, u32 domain,
126 struct sg_table *sg,
127 struct radeon_bo **bo_ptr);
128 extern int radeon_bo_kmap(struct radeon_bo *bo, void **ptr);
129 extern void radeon_bo_kunmap(struct radeon_bo *bo);
130 extern void radeon_bo_unref(struct radeon_bo **bo);
131 extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr);
132 extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain,
133 u64 max_offset, u64 *gpu_addr);
134 extern int radeon_bo_unpin(struct radeon_bo *bo);
135 extern int radeon_bo_evict_vram(struct radeon_device *rdev);
136 extern void radeon_bo_force_delete(struct radeon_device *rdev);
137 extern int radeon_bo_init(struct radeon_device *rdev);
138 extern void radeon_bo_fini(struct radeon_device *rdev);
139 extern void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
140 struct list_head *head);
141 extern int radeon_bo_list_validate(struct list_head *head);
142 #ifdef FREEBSD_WIP
143 extern int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
144 struct vm_area_struct *vma);
145 #endif /* FREEBSD_WIP */
146 extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
147 u32 tiling_flags, u32 pitch);
148 extern void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
149 u32 *tiling_flags, u32 *pitch);
150 extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
151 bool force_drop);
152 extern void radeon_bo_move_notify(struct ttm_buffer_object *bo,
153 struct ttm_mem_reg *mem);
154 extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
155 extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
156
157 /*
158 * sub allocation
159 */
160
radeon_sa_bo_gpu_addr(struct radeon_sa_bo * sa_bo)161 static inline uint64_t radeon_sa_bo_gpu_addr(struct radeon_sa_bo *sa_bo)
162 {
163 return sa_bo->manager->gpu_addr + sa_bo->soffset;
164 }
165
radeon_sa_bo_cpu_addr(struct radeon_sa_bo * sa_bo)166 static inline void * radeon_sa_bo_cpu_addr(struct radeon_sa_bo *sa_bo)
167 {
168 return (char *)sa_bo->manager->cpu_ptr + sa_bo->soffset;
169 }
170
171 extern int radeon_sa_bo_manager_init(struct radeon_device *rdev,
172 struct radeon_sa_manager *sa_manager,
173 unsigned size, u32 domain);
174 extern void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
175 struct radeon_sa_manager *sa_manager);
176 extern int radeon_sa_bo_manager_start(struct radeon_device *rdev,
177 struct radeon_sa_manager *sa_manager);
178 extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
179 struct radeon_sa_manager *sa_manager);
180 extern int radeon_sa_bo_new(struct radeon_device *rdev,
181 struct radeon_sa_manager *sa_manager,
182 struct radeon_sa_bo **sa_bo,
183 unsigned size, unsigned align, bool block);
184 extern void radeon_sa_bo_free(struct radeon_device *rdev,
185 struct radeon_sa_bo **sa_bo,
186 struct radeon_fence *fence);
187 #if defined(CONFIG_DEBUG_FS)
188 extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
189 struct seq_file *m);
190 #endif
191
192
193 #endif
194