1 //===-- ABISysV_arm.cpp --------------------------------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9
10 #include "ABISysV_arm.h"
11
12 #include "lldb/Core/ConstString.h"
13 #include "lldb/Core/Error.h"
14 #include "lldb/Core/Module.h"
15 #include "lldb/Core/PluginManager.h"
16 #include "lldb/Core/RegisterValue.h"
17 #include "lldb/Core/Scalar.h"
18 #include "lldb/Core/Value.h"
19 #include "lldb/Core/ValueObjectConstResult.h"
20 #include "lldb/Symbol/ClangASTContext.h"
21 #include "lldb/Symbol/UnwindPlan.h"
22 #include "lldb/Target/Process.h"
23 #include "lldb/Target/RegisterContext.h"
24 #include "lldb/Target/Target.h"
25 #include "lldb/Target/Thread.h"
26
27 #include "llvm/ADT/STLExtras.h"
28 #include "llvm/ADT/Triple.h"
29
30 #include "Utility/ARM_DWARF_Registers.h"
31 #include "Utility/ARM_GCC_Registers.h"
32 #include "Plugins/Process/Utility/ARMDefines.h"
33
34 #include <vector>
35
36 using namespace lldb;
37 using namespace lldb_private;
38
39 static RegisterInfo g_register_infos[] =
40 {
41 // NAME ALT SZ OFF ENCODING FORMAT COMPILER DWARF GENERIC GDB LLDB NATIVE VALUE REGS INVALIDATE REGS
42 // ========== ======= == === ============= ============ ======================= =================== =========================== ======================= ====================== ========== ===============
43 { "r0", "arg1", 4, 0, eEncodingUint , eFormatHex, { gcc_r0, dwarf_r0, LLDB_REGNUM_GENERIC_ARG1, gdb_arm_r0, LLDB_INVALID_REGNUM }, NULL, NULL},
44 { "r1", "arg2", 4, 0, eEncodingUint , eFormatHex, { gcc_r1, dwarf_r1, LLDB_REGNUM_GENERIC_ARG2, gdb_arm_r1, LLDB_INVALID_REGNUM }, NULL, NULL},
45 { "r2", "arg3", 4, 0, eEncodingUint , eFormatHex, { gcc_r2, dwarf_r2, LLDB_REGNUM_GENERIC_ARG3, gdb_arm_r2, LLDB_INVALID_REGNUM }, NULL, NULL},
46 { "r3", "arg4", 4, 0, eEncodingUint , eFormatHex, { gcc_r3, dwarf_r3, LLDB_REGNUM_GENERIC_ARG4, gdb_arm_r3, LLDB_INVALID_REGNUM }, NULL, NULL},
47 { "r4", NULL, 4, 0, eEncodingUint , eFormatHex, { gcc_r4, dwarf_r4, LLDB_INVALID_REGNUM, gdb_arm_r4, LLDB_INVALID_REGNUM }, NULL, NULL},
48 { "r5", NULL, 4, 0, eEncodingUint , eFormatHex, { gcc_r5, dwarf_r5, LLDB_INVALID_REGNUM, gdb_arm_r5, LLDB_INVALID_REGNUM }, NULL, NULL},
49 { "r6", NULL, 4, 0, eEncodingUint , eFormatHex, { gcc_r6, dwarf_r6, LLDB_INVALID_REGNUM, gdb_arm_r6, LLDB_INVALID_REGNUM }, NULL, NULL},
50 { "r7", NULL, 4, 0, eEncodingUint , eFormatHex, { gcc_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, gdb_arm_r7, LLDB_INVALID_REGNUM }, NULL, NULL},
51 { "r8", NULL, 4, 0, eEncodingUint , eFormatHex, { gcc_r8, dwarf_r8, LLDB_INVALID_REGNUM, gdb_arm_r8, LLDB_INVALID_REGNUM }, NULL, NULL},
52 { "r9", NULL, 4, 0, eEncodingUint , eFormatHex, { gcc_r9, dwarf_r9, LLDB_INVALID_REGNUM, gdb_arm_r9, LLDB_INVALID_REGNUM }, NULL, NULL},
53 { "r10", NULL, 4, 0, eEncodingUint , eFormatHex, { gcc_r10, dwarf_r10, LLDB_INVALID_REGNUM, gdb_arm_r10, LLDB_INVALID_REGNUM }, NULL, NULL},
54 { "r11", NULL, 4, 0, eEncodingUint , eFormatHex, { gcc_r11, dwarf_r11, LLDB_INVALID_REGNUM, gdb_arm_r11, LLDB_INVALID_REGNUM }, NULL, NULL},
55 { "r12", NULL, 4, 0, eEncodingUint , eFormatHex, { gcc_r12, dwarf_r12, LLDB_INVALID_REGNUM, gdb_arm_r12, LLDB_INVALID_REGNUM }, NULL, NULL},
56 { "sp", "r13", 4, 0, eEncodingUint , eFormatHex, { gcc_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, gdb_arm_sp, LLDB_INVALID_REGNUM }, NULL, NULL},
57 { "lr", "r14", 4, 0, eEncodingUint , eFormatHex, { gcc_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, gdb_arm_lr, LLDB_INVALID_REGNUM }, NULL, NULL},
58 { "pc", "r15", 4, 0, eEncodingUint , eFormatHex, { gcc_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, gdb_arm_pc, LLDB_INVALID_REGNUM }, NULL, NULL},
59 { "cpsr", "psr", 4, 0, eEncodingUint , eFormatHex, { gcc_cpsr, dwarf_cpsr, LLDB_REGNUM_GENERIC_FLAGS, gdb_arm_cpsr, LLDB_INVALID_REGNUM }, NULL, NULL},
60 { "s0", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, gdb_arm_s0, LLDB_INVALID_REGNUM }, NULL, NULL},
61 { "s1", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, gdb_arm_s1, LLDB_INVALID_REGNUM }, NULL, NULL},
62 { "s2", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, gdb_arm_s2, LLDB_INVALID_REGNUM }, NULL, NULL},
63 { "s3", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, gdb_arm_s3, LLDB_INVALID_REGNUM }, NULL, NULL},
64 { "s4", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, gdb_arm_s4, LLDB_INVALID_REGNUM }, NULL, NULL},
65 { "s5", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, gdb_arm_s5, LLDB_INVALID_REGNUM }, NULL, NULL},
66 { "s6", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, gdb_arm_s6, LLDB_INVALID_REGNUM }, NULL, NULL},
67 { "s7", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, gdb_arm_s7, LLDB_INVALID_REGNUM }, NULL, NULL},
68 { "s8", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, gdb_arm_s8, LLDB_INVALID_REGNUM }, NULL, NULL},
69 { "s9", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, gdb_arm_s9, LLDB_INVALID_REGNUM }, NULL, NULL},
70 { "s10", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, gdb_arm_s10, LLDB_INVALID_REGNUM }, NULL, NULL},
71 { "s11", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, gdb_arm_s11, LLDB_INVALID_REGNUM }, NULL, NULL},
72 { "s12", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, gdb_arm_s12, LLDB_INVALID_REGNUM }, NULL, NULL},
73 { "s13", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, gdb_arm_s13, LLDB_INVALID_REGNUM }, NULL, NULL},
74 { "s14", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, gdb_arm_s14, LLDB_INVALID_REGNUM }, NULL, NULL},
75 { "s15", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, gdb_arm_s15, LLDB_INVALID_REGNUM }, NULL, NULL},
76 { "s16", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, gdb_arm_s16, LLDB_INVALID_REGNUM }, NULL, NULL},
77 { "s17", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, gdb_arm_s17, LLDB_INVALID_REGNUM }, NULL, NULL},
78 { "s18", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, gdb_arm_s18, LLDB_INVALID_REGNUM }, NULL, NULL},
79 { "s19", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, gdb_arm_s19, LLDB_INVALID_REGNUM }, NULL, NULL},
80 { "s20", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, gdb_arm_s20, LLDB_INVALID_REGNUM }, NULL, NULL},
81 { "s21", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, gdb_arm_s21, LLDB_INVALID_REGNUM }, NULL, NULL},
82 { "s22", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, gdb_arm_s22, LLDB_INVALID_REGNUM }, NULL, NULL},
83 { "s23", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, gdb_arm_s23, LLDB_INVALID_REGNUM }, NULL, NULL},
84 { "s24", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, gdb_arm_s24, LLDB_INVALID_REGNUM }, NULL, NULL},
85 { "s25", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, gdb_arm_s25, LLDB_INVALID_REGNUM }, NULL, NULL},
86 { "s26", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, gdb_arm_s26, LLDB_INVALID_REGNUM }, NULL, NULL},
87 { "s27", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, gdb_arm_s27, LLDB_INVALID_REGNUM }, NULL, NULL},
88 { "s28", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, gdb_arm_s28, LLDB_INVALID_REGNUM }, NULL, NULL},
89 { "s29", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, gdb_arm_s29, LLDB_INVALID_REGNUM }, NULL, NULL},
90 { "s30", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, gdb_arm_s30, LLDB_INVALID_REGNUM }, NULL, NULL},
91 { "s31", NULL, 4, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, gdb_arm_s31, LLDB_INVALID_REGNUM }, NULL, NULL},
92 { "fpscr", NULL, 4, 0, eEncodingUint , eFormatHex , { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,LLDB_INVALID_REGNUM, gdb_arm_fpscr, LLDB_INVALID_REGNUM }, NULL, NULL},
93 { "d0", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d0, LLDB_INVALID_REGNUM, gdb_arm_d0, LLDB_INVALID_REGNUM }, NULL, NULL},
94 { "d1", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d1, LLDB_INVALID_REGNUM, gdb_arm_d1, LLDB_INVALID_REGNUM }, NULL, NULL},
95 { "d2", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d2, LLDB_INVALID_REGNUM, gdb_arm_d2, LLDB_INVALID_REGNUM }, NULL, NULL},
96 { "d3", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d3, LLDB_INVALID_REGNUM, gdb_arm_d3, LLDB_INVALID_REGNUM }, NULL, NULL},
97 { "d4", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d4, LLDB_INVALID_REGNUM, gdb_arm_d4, LLDB_INVALID_REGNUM }, NULL, NULL},
98 { "d5", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d5, LLDB_INVALID_REGNUM, gdb_arm_d5, LLDB_INVALID_REGNUM }, NULL, NULL},
99 { "d6", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d6, LLDB_INVALID_REGNUM, gdb_arm_d6, LLDB_INVALID_REGNUM }, NULL, NULL},
100 { "d7", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d7, LLDB_INVALID_REGNUM, gdb_arm_d7, LLDB_INVALID_REGNUM }, NULL, NULL},
101 { "d8", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d8, LLDB_INVALID_REGNUM, gdb_arm_d8, LLDB_INVALID_REGNUM }, NULL, NULL},
102 { "d9", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d9, LLDB_INVALID_REGNUM, gdb_arm_d9, LLDB_INVALID_REGNUM }, NULL, NULL},
103 { "d10", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d10, LLDB_INVALID_REGNUM, gdb_arm_d10, LLDB_INVALID_REGNUM }, NULL, NULL},
104 { "d11", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d11, LLDB_INVALID_REGNUM, gdb_arm_d11, LLDB_INVALID_REGNUM }, NULL, NULL},
105 { "d12", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d12, LLDB_INVALID_REGNUM, gdb_arm_d12, LLDB_INVALID_REGNUM }, NULL, NULL},
106 { "d13", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d13, LLDB_INVALID_REGNUM, gdb_arm_d13, LLDB_INVALID_REGNUM }, NULL, NULL},
107 { "d14", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d14, LLDB_INVALID_REGNUM, gdb_arm_d14, LLDB_INVALID_REGNUM }, NULL, NULL},
108 { "d15", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d15, LLDB_INVALID_REGNUM, gdb_arm_d15, LLDB_INVALID_REGNUM }, NULL, NULL},
109 { "d16", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d16, LLDB_INVALID_REGNUM, gdb_arm_d16, LLDB_INVALID_REGNUM }, NULL, NULL},
110 { "d17", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d17, LLDB_INVALID_REGNUM, gdb_arm_d17, LLDB_INVALID_REGNUM }, NULL, NULL},
111 { "d18", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d18, LLDB_INVALID_REGNUM, gdb_arm_d18, LLDB_INVALID_REGNUM }, NULL, NULL},
112 { "d19", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d19, LLDB_INVALID_REGNUM, gdb_arm_d19, LLDB_INVALID_REGNUM }, NULL, NULL},
113 { "d20", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d20, LLDB_INVALID_REGNUM, gdb_arm_d20, LLDB_INVALID_REGNUM }, NULL, NULL},
114 { "d21", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d21, LLDB_INVALID_REGNUM, gdb_arm_d21, LLDB_INVALID_REGNUM }, NULL, NULL},
115 { "d22", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d22, LLDB_INVALID_REGNUM, gdb_arm_d22, LLDB_INVALID_REGNUM }, NULL, NULL},
116 { "d23", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d23, LLDB_INVALID_REGNUM, gdb_arm_d23, LLDB_INVALID_REGNUM }, NULL, NULL},
117 { "d24", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d24, LLDB_INVALID_REGNUM, gdb_arm_d24, LLDB_INVALID_REGNUM }, NULL, NULL},
118 { "d25", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d25, LLDB_INVALID_REGNUM, gdb_arm_d25, LLDB_INVALID_REGNUM }, NULL, NULL},
119 { "d26", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d26, LLDB_INVALID_REGNUM, gdb_arm_d26, LLDB_INVALID_REGNUM }, NULL, NULL},
120 { "d27", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d27, LLDB_INVALID_REGNUM, gdb_arm_d27, LLDB_INVALID_REGNUM }, NULL, NULL},
121 { "d28", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d28, LLDB_INVALID_REGNUM, gdb_arm_d28, LLDB_INVALID_REGNUM }, NULL, NULL},
122 { "d29", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d29, LLDB_INVALID_REGNUM, gdb_arm_d29, LLDB_INVALID_REGNUM }, NULL, NULL},
123 { "d30", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d30, LLDB_INVALID_REGNUM, gdb_arm_d30, LLDB_INVALID_REGNUM }, NULL, NULL},
124 { "d31", NULL, 8, 0, eEncodingIEEE754 , eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d31, LLDB_INVALID_REGNUM, gdb_arm_d31, LLDB_INVALID_REGNUM }, NULL, NULL},
125 { "r8_usr", NULL, 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r8_usr, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
126 { "r9_usr", NULL, 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r9_usr, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
127 { "r10_usr", NULL, 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r10_usr, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
128 { "r11_usr", NULL, 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r11_usr, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
129 { "r12_usr", NULL, 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r12_usr, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
130 { "r13_usr", "sp_usr", 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r13_usr, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
131 { "r14_usr", "lr_usr", 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r14_usr, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
132 { "r8_fiq", NULL, 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r8_fiq, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
133 { "r9_fiq", NULL, 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r9_fiq, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
134 { "r10_fiq", NULL, 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r10_fiq, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
135 { "r11_fiq", NULL, 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r11_fiq, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
136 { "r12_fiq", NULL, 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r12_fiq, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
137 { "r13_fiq", "sp_fiq", 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r13_fiq, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
138 { "r14_fiq", "lr_fiq", 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r14_fiq, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
139 { "r13_irq", "sp_irq", 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r13_irq, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
140 { "r14_irq", "lr_irq", 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r14_irq, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
141 { "r13_abt", "sp_abt", 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r13_abt, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
142 { "r14_abt", "lr_abt", 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r14_abt, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
143 { "r13_und", "sp_und", 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r13_und, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
144 { "r14_und", "lr_und", 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r14_und, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
145 { "r13_svc", "sp_svc", 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r13_svc, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL},
146 { "r14_svc", "lr_svc", 4, 0, eEncodingUint , eFormatHex, { LLDB_INVALID_REGNUM, dwarf_r14_svc, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL}
147 };
148 static const uint32_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
149 static bool g_register_info_names_constified = false;
150
151 const lldb_private::RegisterInfo *
GetRegisterInfoArray(uint32_t & count)152 ABISysV_arm::GetRegisterInfoArray (uint32_t &count)
153 {
154 // Make the C-string names and alt_names for the register infos into const
155 // C-string values by having the ConstString unique the names in the global
156 // constant C-string pool.
157 if (!g_register_info_names_constified)
158 {
159 g_register_info_names_constified = true;
160 for (uint32_t i=0; i<k_num_register_infos; ++i)
161 {
162 if (g_register_infos[i].name)
163 g_register_infos[i].name = ConstString(g_register_infos[i].name).GetCString();
164 if (g_register_infos[i].alt_name)
165 g_register_infos[i].alt_name = ConstString(g_register_infos[i].alt_name).GetCString();
166 }
167 }
168 count = k_num_register_infos;
169 return g_register_infos;
170 }
171
172
173 size_t
GetRedZoneSize() const174 ABISysV_arm::GetRedZoneSize () const
175 {
176 return 0;
177 }
178
179 //------------------------------------------------------------------
180 // Static Functions
181 //------------------------------------------------------------------
182 ABISP
CreateInstance(const ArchSpec & arch)183 ABISysV_arm::CreateInstance (const ArchSpec &arch)
184 {
185 static ABISP g_abi_sp;
186 const llvm::Triple::ArchType arch_type = arch.GetTriple().getArch();
187 const llvm::Triple::VendorType vendor_type = arch.GetTriple().getVendor();
188
189 if (vendor_type != llvm::Triple::Apple)
190 {
191 if ((arch_type == llvm::Triple::arm) ||
192 (arch_type == llvm::Triple::thumb))
193 {
194 if (!g_abi_sp)
195 g_abi_sp.reset (new ABISysV_arm);
196 return g_abi_sp;
197 }
198 }
199
200 return ABISP();
201 }
202
203 bool
PrepareTrivialCall(Thread & thread,addr_t sp,addr_t function_addr,addr_t return_addr,llvm::ArrayRef<addr_t> args) const204 ABISysV_arm::PrepareTrivialCall (Thread &thread,
205 addr_t sp,
206 addr_t function_addr,
207 addr_t return_addr,
208 llvm::ArrayRef<addr_t> args) const
209 {
210 RegisterContext *reg_ctx = thread.GetRegisterContext().get();
211 if (!reg_ctx)
212 return false;
213
214 const uint32_t pc_reg_num = reg_ctx->ConvertRegisterKindToRegisterNumber (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
215 const uint32_t sp_reg_num = reg_ctx->ConvertRegisterKindToRegisterNumber (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP);
216 const uint32_t ra_reg_num = reg_ctx->ConvertRegisterKindToRegisterNumber (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_RA);
217
218 RegisterValue reg_value;
219
220 const uint8_t reg_names[] = { LLDB_REGNUM_GENERIC_ARG1, LLDB_REGNUM_GENERIC_ARG2, LLDB_REGNUM_GENERIC_ARG3, LLDB_REGNUM_GENERIC_ARG4 };
221
222 llvm::ArrayRef<addr_t>::iterator ai = args.begin(), ae = args.end();
223
224 for (size_t i = 0; i < llvm::array_lengthof(reg_names); ++i)
225 {
226 if (ai == ae)
227 break;
228
229 reg_value.SetUInt32(*ai);
230 if (!reg_ctx->WriteRegister(reg_ctx->GetRegisterInfo(eRegisterKindGeneric, reg_names[i]), reg_value))
231 return false;
232
233 ++ai;
234 }
235
236 if (ai != ae)
237 {
238 // Spill onto the stack
239 size_t num_stack_regs = ae - ai;
240
241 sp -= (num_stack_regs * 4);
242 // Keep the stack 8 byte aligned, not that we need to
243 sp &= ~(8ull-1ull);
244
245 // just using arg1 to get the right size
246 const RegisterInfo *reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1);
247
248 addr_t arg_pos = sp;
249
250 for (; ai != ae; ++ai)
251 {
252 reg_value.SetUInt32(*ai);
253 if (reg_ctx->WriteRegisterValueToMemory(reg_info, arg_pos, reg_info->byte_size, reg_value).Fail())
254 return false;
255 arg_pos += reg_info->byte_size;
256 }
257 }
258
259 TargetSP target_sp (thread.CalculateTarget());
260 Address so_addr;
261
262 // Figure out if our return address is ARM or Thumb by using the
263 // Address::GetCallableLoadAddress(Target*) which will figure out the ARM
264 // thumb-ness and set the correct address bits for us.
265 so_addr.SetLoadAddress (return_addr, target_sp.get());
266 return_addr = so_addr.GetCallableLoadAddress (target_sp.get());
267
268 // Set "lr" to the return address
269 if (!reg_ctx->WriteRegisterFromUnsigned (ra_reg_num, return_addr))
270 return false;
271
272 // Set "sp" to the requested value
273 if (!reg_ctx->WriteRegisterFromUnsigned (sp_reg_num, sp))
274 return false;
275
276 // If bit zero or 1 is set, this must be a thumb function, no need to figure
277 // this out from the symbols.
278 so_addr.SetLoadAddress (function_addr, target_sp.get());
279 function_addr = so_addr.GetCallableLoadAddress (target_sp.get());
280
281 const RegisterInfo *cpsr_reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FLAGS);
282 const uint32_t curr_cpsr = reg_ctx->ReadRegisterAsUnsigned(cpsr_reg_info, 0);
283
284 // Make a new CPSR and mask out any Thumb IT (if/then) bits
285 uint32_t new_cpsr = curr_cpsr & ~MASK_CPSR_IT_MASK;
286 // If bit zero or 1 is set, this must be thumb...
287 if (function_addr & 1ull)
288 new_cpsr |= MASK_CPSR_T; // Set T bit in CPSR
289 else
290 new_cpsr &= ~MASK_CPSR_T; // Clear T bit in CPSR
291
292 if (new_cpsr != curr_cpsr)
293 {
294 if (!reg_ctx->WriteRegisterFromUnsigned (cpsr_reg_info, new_cpsr))
295 return false;
296 }
297
298 function_addr &= ~1ull; // clear bit zero since the CPSR will take care of the mode for us
299
300 // Set "pc" to the address requested
301 if (!reg_ctx->WriteRegisterFromUnsigned (pc_reg_num, function_addr))
302 return false;
303
304 return true;
305 }
306
307 bool
GetArgumentValues(Thread & thread,ValueList & values) const308 ABISysV_arm::GetArgumentValues (Thread &thread,
309 ValueList &values) const
310 {
311 uint32_t num_values = values.GetSize();
312
313
314 ExecutionContext exe_ctx (thread.shared_from_this());
315 // For now, assume that the types in the AST values come from the Target's
316 // scratch AST.
317
318 // Extract the register context so we can read arguments from registers
319
320 RegisterContext *reg_ctx = thread.GetRegisterContext().get();
321
322 if (!reg_ctx)
323 return false;
324
325 addr_t sp = 0;
326
327 for (uint32_t value_idx = 0; value_idx < num_values; ++value_idx)
328 {
329 // We currently only support extracting values with Clang QualTypes.
330 // Do we care about others?
331 Value *value = values.GetValueAtIndex(value_idx);
332
333 if (!value)
334 return false;
335
336 ClangASTType clang_type = value->GetClangType();
337 if (clang_type)
338 {
339 bool is_signed = false;
340 size_t bit_width = 0;
341 if (clang_type.IsIntegerType (is_signed))
342 {
343 bit_width = clang_type.GetBitSize(&thread);
344 }
345 else if (clang_type.IsPointerOrReferenceType ())
346 {
347 bit_width = clang_type.GetBitSize(&thread);
348 }
349 else
350 {
351 // We only handle integer, pointer and reference types currently...
352 return false;
353 }
354
355 if (bit_width <= (exe_ctx.GetProcessRef().GetAddressByteSize() * 8))
356 {
357 if (value_idx < 4)
358 {
359 // Arguments 1-4 are in r0-r3...
360 const RegisterInfo *arg_reg_info = NULL;
361 arg_reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1 + value_idx);
362 if (arg_reg_info)
363 {
364 RegisterValue reg_value;
365
366 if (reg_ctx->ReadRegister(arg_reg_info, reg_value))
367 {
368 if (is_signed)
369 reg_value.SignExtend(bit_width);
370 if (!reg_value.GetScalarValue(value->GetScalar()))
371 return false;
372 continue;
373 }
374 }
375 return false;
376 }
377 else
378 {
379 if (sp == 0)
380 {
381 // Read the stack pointer if it already hasn't been read
382 sp = reg_ctx->GetSP(0);
383 if (sp == 0)
384 return false;
385 }
386
387 // Arguments 5 on up are on the stack
388 const uint32_t arg_byte_size = (bit_width + (8-1)) / 8;
389 Error error;
390 if (!exe_ctx.GetProcessRef().ReadScalarIntegerFromMemory(sp, arg_byte_size, is_signed, value->GetScalar(), error))
391 return false;
392
393 sp += arg_byte_size;
394 }
395 }
396 }
397 }
398 return true;
399 }
400
401 ValueObjectSP
GetReturnValueObjectImpl(Thread & thread,lldb_private::ClangASTType & clang_type) const402 ABISysV_arm::GetReturnValueObjectImpl (Thread &thread,
403 lldb_private::ClangASTType &clang_type) const
404 {
405 Value value;
406 ValueObjectSP return_valobj_sp;
407
408 if (!clang_type)
409 return return_valobj_sp;
410
411 clang::ASTContext *ast_context = clang_type.GetASTContext();
412 if (!ast_context)
413 return return_valobj_sp;
414
415 //value.SetContext (Value::eContextTypeClangType, clang_type.GetOpaqueQualType());
416 value.SetClangType (clang_type);
417
418 RegisterContext *reg_ctx = thread.GetRegisterContext().get();
419 if (!reg_ctx)
420 return return_valobj_sp;
421
422 bool is_signed;
423 bool is_complex;
424 uint32_t float_count;
425
426 // Get the pointer to the first stack argument so we have a place to start
427 // when reading data
428
429 const RegisterInfo *r0_reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1);
430 size_t bit_width = clang_type.GetBitSize(&thread);
431
432 if (clang_type.IsIntegerType (is_signed))
433 {
434 switch (bit_width)
435 {
436 default:
437 return return_valobj_sp;
438 case 64:
439 {
440 const RegisterInfo *r1_reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2);
441 uint64_t raw_value;
442 raw_value = reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
443 raw_value |= ((uint64_t)(reg_ctx->ReadRegisterAsUnsigned(r1_reg_info, 0) & UINT32_MAX)) << 32;
444 if (is_signed)
445 value.GetScalar() = (int64_t)raw_value;
446 else
447 value.GetScalar() = (uint64_t)raw_value;
448 }
449 break;
450 case 32:
451 if (is_signed)
452 value.GetScalar() = (int32_t)(reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX);
453 else
454 value.GetScalar() = (uint32_t)(reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX);
455 break;
456 case 16:
457 if (is_signed)
458 value.GetScalar() = (int16_t)(reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT16_MAX);
459 else
460 value.GetScalar() = (uint16_t)(reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT16_MAX);
461 break;
462 case 8:
463 if (is_signed)
464 value.GetScalar() = (int8_t)(reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT8_MAX);
465 else
466 value.GetScalar() = (uint8_t)(reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT8_MAX);
467 break;
468 }
469 }
470 else if (clang_type.IsPointerType ())
471 {
472 uint32_t ptr = thread.GetRegisterContext()->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
473 value.GetScalar() = ptr;
474 }
475 else if (clang_type.IsFloatingPointType(float_count, is_complex))
476 {
477 if (float_count == 1 && !is_complex)
478 {
479 switch (bit_width)
480 {
481 default:
482 return return_valobj_sp;
483 case 64:
484 {
485 static_assert(sizeof(double) == sizeof(uint64_t), "");
486 const RegisterInfo *r1_reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2);
487 uint64_t raw_value;
488 raw_value = reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
489 raw_value |= ((uint64_t)(reg_ctx->ReadRegisterAsUnsigned(r1_reg_info, 0) & UINT32_MAX)) << 32;
490 value.GetScalar() = *reinterpret_cast<double*>(&raw_value);
491 break;
492 }
493 case 16: // Half precision returned after a conversion to single precision
494 case 32:
495 {
496 static_assert(sizeof(float) == sizeof(uint32_t), "");
497 uint32_t raw_value = reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
498 value.GetScalar() = *reinterpret_cast<float*>(&raw_value);
499 break;
500 }
501 }
502 }
503 else
504 {
505 // not handled yet
506 return return_valobj_sp;
507 }
508 }
509 else if (clang_type.IsAggregateType())
510 {
511 size_t byte_size = clang_type.GetByteSize(&thread);
512 if (byte_size <= 4)
513 {
514 RegisterValue r0_reg_value;
515 uint32_t raw_value = reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
516 value.SetBytes(&raw_value, byte_size);
517 }
518 else
519 {
520 RegisterValue r0_reg_value;
521 uint32_t address = reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
522
523 Error error;
524 DataBufferHeap buffer(byte_size, 0);
525 thread.GetProcess()->ReadMemory(address, buffer.GetBytes(), buffer.GetByteSize(), error);
526
527 if (error.Success())
528 value.SetBytes(buffer.GetBytes(), buffer.GetByteSize());
529 else
530 return return_valobj_sp;
531 }
532 }
533 else
534 {
535 // not handled yet
536 return return_valobj_sp;
537 }
538
539 // If we get here, we have a valid Value, so make our ValueObject out of it:
540
541 return_valobj_sp = ValueObjectConstResult::Create(thread.GetStackFrameAtIndex(0).get(),
542 value,
543 ConstString(""));
544 return return_valobj_sp;
545 }
546
547 Error
SetReturnValueObject(lldb::StackFrameSP & frame_sp,lldb::ValueObjectSP & new_value_sp)548 ABISysV_arm::SetReturnValueObject(lldb::StackFrameSP &frame_sp, lldb::ValueObjectSP &new_value_sp)
549 {
550 Error error;
551 if (!new_value_sp)
552 {
553 error.SetErrorString("Empty value object for return value.");
554 return error;
555 }
556
557 ClangASTType clang_type = new_value_sp->GetClangType();
558 if (!clang_type)
559 {
560 error.SetErrorString ("Null clang type for return value.");
561 return error;
562 }
563
564 Thread *thread = frame_sp->GetThread().get();
565
566 bool is_signed;
567 uint32_t count;
568 bool is_complex;
569
570 RegisterContext *reg_ctx = thread->GetRegisterContext().get();
571
572 bool set_it_simple = false;
573 if (clang_type.IsIntegerType (is_signed) || clang_type.IsPointerType())
574 {
575 DataExtractor data;
576 Error data_error;
577 size_t num_bytes = new_value_sp->GetData(data, data_error);
578 if (data_error.Fail())
579 {
580 error.SetErrorStringWithFormat("Couldn't convert return value to raw data: %s", data_error.AsCString());
581 return error;
582 }
583 lldb::offset_t offset = 0;
584 if (num_bytes <= 8)
585 {
586 const RegisterInfo *r0_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1);
587 if (num_bytes <= 4)
588 {
589 uint32_t raw_value = data.GetMaxU32(&offset, num_bytes);
590
591 if (reg_ctx->WriteRegisterFromUnsigned (r0_info, raw_value))
592 set_it_simple = true;
593 }
594 else
595 {
596 uint32_t raw_value = data.GetMaxU32(&offset, 4);
597
598 if (reg_ctx->WriteRegisterFromUnsigned (r0_info, raw_value))
599 {
600 const RegisterInfo *r1_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2);
601 uint32_t raw_value = data.GetMaxU32(&offset, num_bytes - offset);
602
603 if (reg_ctx->WriteRegisterFromUnsigned (r1_info, raw_value))
604 set_it_simple = true;
605 }
606 }
607 }
608 else
609 {
610 error.SetErrorString("We don't support returning longer than 64 bit integer values at present.");
611 }
612 }
613 else if (clang_type.IsFloatingPointType (count, is_complex))
614 {
615 if (is_complex)
616 error.SetErrorString ("We don't support returning complex values at present");
617 else
618 error.SetErrorString ("We don't support returning float values at present");
619 }
620
621 if (!set_it_simple)
622 error.SetErrorString ("We only support setting simple integer return types at present.");
623
624 return error;
625 }
626
627 bool
CreateFunctionEntryUnwindPlan(UnwindPlan & unwind_plan)628 ABISysV_arm::CreateFunctionEntryUnwindPlan (UnwindPlan &unwind_plan)
629 {
630 unwind_plan.Clear();
631 unwind_plan.SetRegisterKind (eRegisterKindDWARF);
632
633 uint32_t lr_reg_num = dwarf_lr;
634 uint32_t sp_reg_num = dwarf_sp;
635 uint32_t pc_reg_num = dwarf_pc;
636
637 UnwindPlan::RowSP row(new UnwindPlan::Row);
638
639 // Our Call Frame Address is the stack pointer value
640 row->GetCFAValue().SetIsRegisterPlusOffset (sp_reg_num, 0);
641
642 // The previous PC is in the LR
643 row->SetRegisterLocationToRegister(pc_reg_num, lr_reg_num, true);
644 unwind_plan.AppendRow (row);
645
646 // All other registers are the same.
647
648 unwind_plan.SetSourceName ("arm at-func-entry default");
649 unwind_plan.SetSourcedFromCompiler (eLazyBoolNo);
650
651 return true;
652 }
653
654 bool
CreateDefaultUnwindPlan(UnwindPlan & unwind_plan)655 ABISysV_arm::CreateDefaultUnwindPlan (UnwindPlan &unwind_plan)
656 {
657 unwind_plan.Clear ();
658 unwind_plan.SetRegisterKind (eRegisterKindDWARF);
659
660 //TODO: Handle thumb
661 uint32_t fp_reg_num = dwarf_r11;
662 uint32_t pc_reg_num = dwarf_pc;
663
664 UnwindPlan::RowSP row(new UnwindPlan::Row);
665 const int32_t ptr_size = 4;
666
667 row->GetCFAValue().SetIsRegisterPlusOffset (fp_reg_num, 2 * ptr_size);
668 row->SetOffset (0);
669
670 row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
671 row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
672
673 unwind_plan.AppendRow (row);
674 unwind_plan.SetSourceName ("arm default unwind plan");
675 unwind_plan.SetSourcedFromCompiler (eLazyBoolNo);
676 unwind_plan.SetUnwindPlanValidAtAllInstructions (eLazyBoolNo);
677
678 return true;
679 }
680
681 // cf. "ARMv6 Function Calling Conventions"
682
683 // ARMv7 on GNU/Linux general purpose reg rules:
684 // r0-r3 not preserved (used for argument passing)
685 // r4-r11 preserved (v1-v8)
686 // r12 not presrved
687 // r13 preserved (stack pointer)
688 // r14 preserved (link register)
689 // r15 preserved (pc)
690 // cpsr not preserved (different rules for different bits)
691
692 // ARMv7 VFP register rules:
693 // d0-d7 not preserved (aka s0-s15, q0-q3)
694 // d8-d15 preserved (aka s16-s31, q4-q7)
695 // d16-d31 not preserved (aka q8-q15)
696
697 bool
RegisterIsVolatile(const RegisterInfo * reg_info)698 ABISysV_arm::RegisterIsVolatile (const RegisterInfo *reg_info)
699 {
700 if (reg_info)
701 {
702 // Volatile registers are: r0, r1, r2, r3, r9, r12, r13 (aka sp)
703 const char *name = reg_info->name;
704 if (name[0] == 'r')
705 {
706 switch (name[1])
707 {
708 case '0': return name[2] == '\0'; // r0
709 case '1':
710 switch (name[2])
711 {
712 case '\0':
713 return true; // r1
714 case '2':
715 return name[3] == '\0'; // r12
716 default:
717 break;
718 }
719 break;
720
721 case '2': return name[2] == '\0'; // r2
722 case '3': return name[2] == '\0'; // r3
723 default:
724 break;
725 }
726 }
727 else if (name[0] == 'd')
728 {
729 switch (name[1])
730 {
731 case '0':
732 return name[2] == '\0'; // d0 is volatile
733
734 case '1':
735 switch (name[2])
736 {
737 case '\0':
738 return true; // d1 is volatile
739 case '6':
740 case '7':
741 case '8':
742 case '9':
743 return name[3] == '\0'; // d16 - d19 are volatile
744 default:
745 break;
746 }
747 break;
748
749 case '2':
750 switch (name[2])
751 {
752 case '\0':
753 return true; // d2 is volatile
754 case '0':
755 case '1':
756 case '2':
757 case '3':
758 case '4':
759 case '5':
760 case '6':
761 case '7':
762 case '8':
763 case '9':
764 return name[3] == '\0'; // d20 - d29 are volatile
765 default:
766 break;
767 }
768 break;
769
770 case '3':
771 switch (name[2])
772 {
773 case '\0':
774 return true; // d3 is volatile
775 case '0':
776 case '1':
777 return name[3] == '\0'; // d30 - d31 are volatile
778 default:
779 break;
780 }
781 case '4':
782 case '5':
783 case '6':
784 case '7':
785 return name[2] == '\0'; // d4 - d7 are volatile
786
787 default:
788 break;
789 }
790 }
791 else if (name[0] == 's')
792 {
793 switch (name[1])
794 {
795 case '0':
796 return name[2] == '\0'; // s0 is volatile
797
798 case '1':
799 switch (name[2])
800 {
801 case '\0':
802 return true; // s1 is volatile
803 case '0':
804 case '1':
805 case '2':
806 case '3':
807 case '4':
808 case '5':
809 return name[3] == '\0'; // s10 - s15 are volatile
810 default:
811 break;
812 }
813 break;
814
815 case '2':
816 switch (name[2])
817 {
818 case '\0':
819 return true; // s2 is volatile
820 default:
821 break;
822 }
823 break;
824
825 case '3':
826 switch (name[2])
827 {
828 case '\0':
829 return true; // s3 is volatile
830 default:
831 break;
832 }
833 case '4':
834 case '5':
835 case '6':
836 case '7':
837 case '8':
838 case '9':
839 return name[2] == '\0'; // s4 - s9 are volatile
840
841 default:
842 break;
843 }
844 }
845 else if (name[0] == 'q')
846 {
847 switch (name[1])
848 {
849 case '1':
850 switch (name[2])
851 {
852 case '\0':
853 return true; // q1 is volatile
854 case '0':
855 case '1':
856 case '2':
857 case '3':
858 case '4':
859 case '5':
860 return true; // q10-q15 are volatile
861 default:
862 break;
863 };
864 case '0':
865 case '2':
866 case '3':
867 return name[2] == '\0'; // q0-q3 are volatile
868 case '8':
869 case '9':
870 return name[2] == '\0'; // q8-q9 are volatile
871 default:
872 break;
873 }
874 }
875 else if (name[0] == 's' && name[1] == 'p' && name[2] == '\0')
876 return true;
877 }
878 return false;
879 }
880
881 void
Initialize()882 ABISysV_arm::Initialize()
883 {
884 PluginManager::RegisterPlugin (GetPluginNameStatic(),
885 "SysV ABI for arm targets",
886 CreateInstance);
887 }
888
889 void
Terminate()890 ABISysV_arm::Terminate()
891 {
892 PluginManager::UnregisterPlugin (CreateInstance);
893 }
894
895 lldb_private::ConstString
GetPluginNameStatic()896 ABISysV_arm::GetPluginNameStatic()
897 {
898 static ConstString g_name("SysV-arm");
899 return g_name;
900 }
901
902 //------------------------------------------------------------------
903 // PluginInterface protocol
904 //------------------------------------------------------------------
905 lldb_private::ConstString
GetPluginName()906 ABISysV_arm::GetPluginName()
907 {
908 return GetPluginNameStatic();
909 }
910
911 uint32_t
GetPluginVersion()912 ABISysV_arm::GetPluginVersion()
913 {
914 return 1;
915 }
916
917