1//===-- CIInstructions.td - CI Instruction Defintions ---------------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// Instruction definitions for CI and newer. 10//===----------------------------------------------------------------------===// 11 12 13def isCIVI : Predicate < 14 "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS || " 15 "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS" 16>, AssemblerPredicate<"FeatureCIInsts">; 17 18def HasFlatAddressSpace : Predicate<"Subtarget->hasFlatAddressSpace()">; 19 20//===----------------------------------------------------------------------===// 21// VOP1 Instructions 22//===----------------------------------------------------------------------===// 23 24let SubtargetPredicate = isCIVI in { 25 26defm V_TRUNC_F64 : VOP1Inst <vop1<0x17>, "v_trunc_f64", 27 VOP_F64_F64, ftrunc 28>; 29defm V_CEIL_F64 : VOP1Inst <vop1<0x18>, "v_ceil_f64", 30 VOP_F64_F64, fceil 31>; 32defm V_FLOOR_F64 : VOP1Inst <vop1<0x1A>, "v_floor_f64", 33 VOP_F64_F64, ffloor 34>; 35defm V_RNDNE_F64 : VOP1Inst <vop1<0x19>, "v_rndne_f64", 36 VOP_F64_F64, frint 37>; 38defm V_LOG_LEGACY_F32 : VOP1Inst <vop1<0x45, 0x4c>, "v_log_legacy_f32", 39 VOP_F32_F32 40>; 41defm V_EXP_LEGACY_F32 : VOP1Inst <vop1<0x46, 0x4b>, "v_exp_legacy_f32", 42 VOP_F32_F32 43>; 44 45//===----------------------------------------------------------------------===// 46// Flat Instructions 47//===----------------------------------------------------------------------===// 48 49def FLAT_LOAD_UBYTE : FLAT_Load_Helper <0x8, "flat_load_ubyte", VGPR_32>; 50def FLAT_LOAD_SBYTE : FLAT_Load_Helper <0x9, "flat_load_sbyte", VGPR_32>; 51def FLAT_LOAD_USHORT : FLAT_Load_Helper <0xa, "flat_load_ushort", VGPR_32>; 52def FLAT_LOAD_SSHORT : FLAT_Load_Helper <0xb, "flat_load_sshort", VGPR_32>; 53def FLAT_LOAD_DWORD : FLAT_Load_Helper <0xc, "flat_load_dword", VGPR_32>; 54def FLAT_LOAD_DWORDX2 : FLAT_Load_Helper <0xd, "flat_load_dwordx2", VReg_64>; 55def FLAT_LOAD_DWORDX4 : FLAT_Load_Helper <0xe, "flat_load_dwordx4", VReg_128>; 56def FLAT_LOAD_DWORDX3 : FLAT_Load_Helper <0xf, "flat_load_dwordx3", VReg_96>; 57def FLAT_STORE_BYTE : FLAT_Store_Helper <0x18, "flat_store_byte", VGPR_32>; 58def FLAT_STORE_SHORT : FLAT_Store_Helper <0x1a, "flat_store_short", VGPR_32>; 59def FLAT_STORE_DWORD : FLAT_Store_Helper <0x1c, "flat_store_dword", VGPR_32>; 60def FLAT_STORE_DWORDX2 : FLAT_Store_Helper < 61 0x1d, "flat_store_dwordx2", VReg_64 62>; 63def FLAT_STORE_DWORDX4 : FLAT_Store_Helper < 64 0x1e, "flat_store_dwordx4", VReg_128 65>; 66def FLAT_STORE_DWORDX3 : FLAT_Store_Helper < 67 0x1f, "flat_store_dwordx3", VReg_96 68>; 69defm FLAT_ATOMIC_SWAP : FLAT_ATOMIC <0x30, "flat_atomic_swap", VGPR_32>; 70defm FLAT_ATOMIC_CMPSWAP : FLAT_ATOMIC < 71 0x31, "flat_atomic_cmpswap", VGPR_32, VReg_64 72>; 73defm FLAT_ATOMIC_ADD : FLAT_ATOMIC <0x32, "flat_atomic_add", VGPR_32>; 74defm FLAT_ATOMIC_SUB : FLAT_ATOMIC <0x33, "flat_atomic_sub", VGPR_32>; 75defm FLAT_ATOMIC_RSUB : FLAT_ATOMIC <0x34, "flat_atomic_rsub", VGPR_32>; 76defm FLAT_ATOMIC_SMIN : FLAT_ATOMIC <0x35, "flat_atomic_smin", VGPR_32>; 77defm FLAT_ATOMIC_UMIN : FLAT_ATOMIC <0x36, "flat_atomic_umin", VGPR_32>; 78defm FLAT_ATOMIC_SMAX : FLAT_ATOMIC <0x37, "flat_atomic_smax", VGPR_32>; 79defm FLAT_ATOMIC_UMAX : FLAT_ATOMIC <0x38, "flat_atomic_umax", VGPR_32>; 80defm FLAT_ATOMIC_AND : FLAT_ATOMIC <0x39, "flat_atomic_and", VGPR_32>; 81defm FLAT_ATOMIC_OR : FLAT_ATOMIC <0x3a, "flat_atomic_or", VGPR_32>; 82defm FLAT_ATOMIC_XOR : FLAT_ATOMIC <0x3b, "flat_atomic_xor", VGPR_32>; 83defm FLAT_ATOMIC_INC : FLAT_ATOMIC <0x3c, "flat_atomic_inc", VGPR_32>; 84defm FLAT_ATOMIC_DEC : FLAT_ATOMIC <0x3d, "flat_atomic_dec", VGPR_32>; 85defm FLAT_ATOMIC_FCMPSWAP : FLAT_ATOMIC < 86 0x3e, "flat_atomic_fcmpswap", VGPR_32, VReg_64 87>; 88defm FLAT_ATOMIC_FMIN : FLAT_ATOMIC <0x3f, "flat_atomic_fmin", VGPR_32>; 89defm FLAT_ATOMIC_FMAX : FLAT_ATOMIC <0x40, "flat_atomic_fmax", VGPR_32>; 90defm FLAT_ATOMIC_SWAP_X2 : FLAT_ATOMIC <0x50, "flat_atomic_swap_x2", VReg_64>; 91defm FLAT_ATOMIC_CMPSWAP_X2 : FLAT_ATOMIC < 92 0x51, "flat_atomic_cmpswap_x2", VReg_64, VReg_128 93>; 94defm FLAT_ATOMIC_ADD_X2 : FLAT_ATOMIC <0x52, "flat_atomic_add_x2", VReg_64>; 95defm FLAT_ATOMIC_SUB_X2 : FLAT_ATOMIC <0x53, "flat_atomic_sub_x2", VReg_64>; 96defm FLAT_ATOMIC_RSUB_X2 : FLAT_ATOMIC <0x54, "flat_atomic_rsub_x2", VReg_64>; 97defm FLAT_ATOMIC_SMIN_X2 : FLAT_ATOMIC <0x55, "flat_atomic_smin_x2", VReg_64>; 98defm FLAT_ATOMIC_UMIN_X2 : FLAT_ATOMIC <0x56, "flat_atomic_umin_x2", VReg_64>; 99defm FLAT_ATOMIC_SMAX_X2 : FLAT_ATOMIC <0x57, "flat_atomic_smax_x2", VReg_64>; 100defm FLAT_ATOMIC_UMAX_X2 : FLAT_ATOMIC <0x58, "flat_atomic_umax_x2", VReg_64>; 101defm FLAT_ATOMIC_AND_X2 : FLAT_ATOMIC <0x59, "flat_atomic_and_x2", VReg_64>; 102defm FLAT_ATOMIC_OR_X2 : FLAT_ATOMIC <0x5a, "flat_atomic_or_x2", VReg_64>; 103defm FLAT_ATOMIC_XOR_X2 : FLAT_ATOMIC <0x5b, "flat_atomic_xor_x2", VReg_64>; 104defm FLAT_ATOMIC_INC_X2 : FLAT_ATOMIC <0x5c, "flat_atomic_inc_x2", VReg_64>; 105defm FLAT_ATOMIC_DEC_X2 : FLAT_ATOMIC <0x5d, "flat_atomic_dec_x2", VReg_64>; 106defm FLAT_ATOMIC_FCMPSWAP_X2 : FLAT_ATOMIC < 107 0x5e, "flat_atomic_fcmpswap_x2", VReg_64, VReg_128 108>; 109defm FLAT_ATOMIC_FMIN_X2 : FLAT_ATOMIC <0x5f, "flat_atomic_fmin_x2", VReg_64>; 110defm FLAT_ATOMIC_FMAX_X2 : FLAT_ATOMIC <0x60, "flat_atomic_fmax_x2", VReg_64>; 111 112} // End SubtargetPredicate = isCIVI 113 114//===----------------------------------------------------------------------===// 115// Flat Patterns 116//===----------------------------------------------------------------------===// 117 118let Predicates = [HasFlatAddressSpace] in { 119 120class FLATLoad_Pattern <FLAT Instr_ADDR64, ValueType vt, 121 PatFrag flat_ld> : 122 Pat <(vt (flat_ld i64:$ptr)), 123 (Instr_ADDR64 $ptr, 0, 0, 0) 124>; 125 126def : FLATLoad_Pattern <FLAT_LOAD_SBYTE, i32, sextloadi8_flat>; 127def : FLATLoad_Pattern <FLAT_LOAD_UBYTE, i32, az_extloadi8_flat>; 128def : FLATLoad_Pattern <FLAT_LOAD_SSHORT, i32, sextloadi16_flat>; 129def : FLATLoad_Pattern <FLAT_LOAD_USHORT, i32, az_extloadi16_flat>; 130def : FLATLoad_Pattern <FLAT_LOAD_DWORD, i32, flat_load>; 131def : FLATLoad_Pattern <FLAT_LOAD_DWORDX2, i64, flat_load>; 132def : FLATLoad_Pattern <FLAT_LOAD_DWORDX2, i64, az_extloadi32_flat>; 133def : FLATLoad_Pattern <FLAT_LOAD_DWORDX2, v2i32, flat_load>; 134def : FLATLoad_Pattern <FLAT_LOAD_DWORDX4, v4i32, flat_load>; 135 136class FLATStore_Pattern <FLAT Instr, ValueType vt, PatFrag st> : 137 Pat <(st vt:$value, i64:$ptr), 138 (Instr $value, $ptr, 0, 0, 0) 139 >; 140 141def : FLATStore_Pattern <FLAT_STORE_BYTE, i32, truncstorei8_flat>; 142def : FLATStore_Pattern <FLAT_STORE_SHORT, i32, truncstorei16_flat>; 143def : FLATStore_Pattern <FLAT_STORE_DWORD, i32, flat_store>; 144def : FLATStore_Pattern <FLAT_STORE_DWORDX2, i64, flat_store>; 145def : FLATStore_Pattern <FLAT_STORE_DWORDX2, v2i32, flat_store>; 146def : FLATStore_Pattern <FLAT_STORE_DWORDX4, v4i32, flat_store>; 147 148} // End HasFlatAddressSpace predicate 149 150