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Searched refs:Ops (Results 1 – 25 of 137) sorted by relevance

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/trueos/contrib/llvm/tools/clang/lib/CodeGen/
HDCGBuiltin.cpp1641 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, in EmitNeonCall() argument
1648 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); in EmitNeonCall()
1650 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); in EmitNeonCall()
1652 return Builder.CreateCall(F, Ops, name); in EmitNeonCall()
1768 SmallVector<Value *, 4> Ops; in EmitAArch64ScalarBuiltinExpr() local
1770 Ops.push_back(CGF.EmitScalarExpr(E->getArg(i))); in EmitAArch64ScalarBuiltinExpr()
1781 return CGF.Builder.CreateExtractElement(Ops[0], Ops[1], "vdup_lane"); in EmitAArch64ScalarBuiltinExpr()
1795 Value* SV = llvm::ConstantVector::getSplat(1, cast<ConstantInt>(Ops[1])); in EmitAArch64ScalarBuiltinExpr()
1796 Value *Result = CGF.Builder.CreateShuffleVector(Ops[0], Ops[0], SV, s); in EmitAArch64ScalarBuiltinExpr()
1826 MulOps.push_back(Ops[1]); in EmitAArch64ScalarBuiltinExpr()
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HDCGExprScalar.cpp410 Value *EmitMul(const BinOpInfo &Ops) { in EmitMul() argument
411 if (Ops.Ty->isSignedIntegerOrEnumerationType()) { in EmitMul()
414 return Builder.CreateMul(Ops.LHS, Ops.RHS, "mul"); in EmitMul()
417 return Builder.CreateNSWMul(Ops.LHS, Ops.RHS, "mul"); in EmitMul()
420 return EmitOverflowCheckedBinOp(Ops); in EmitMul()
424 if (Ops.Ty->isUnsignedIntegerType() && CGF.SanOpts->UnsignedIntegerOverflow) in EmitMul()
425 return EmitOverflowCheckedBinOp(Ops); in EmitMul()
427 if (Ops.LHS->getType()->isFPOrFPVectorTy()) in EmitMul()
428 return Builder.CreateFMul(Ops.LHS, Ops.RHS, "mul"); in EmitMul()
429 return Builder.CreateMul(Ops.LHS, Ops.RHS, "mul"); in EmitMul()
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/trueos/contrib/llvm/lib/Transforms/Scalar/
HDReassociate.cpp64 static void PrintOps(Instruction *I, const SmallVectorImpl<ValueEntry> &Ops) { in PrintOps() argument
67 << *Ops[0].Op->getType() << '\t'; in PrintOps()
68 for (unsigned i = 0, e = Ops.size(); i != e; ++i) { in PrintOps()
70 WriteAsOperand(dbgs(), Ops[i].Op, false, M); in PrintOps()
71 dbgs() << ", #" << Ops[i].Rank << "] "; in PrintOps()
180 void RewriteExprTree(BinaryOperator *I, SmallVectorImpl<ValueEntry> &Ops);
182 SmallVectorImpl<ValueEntry> &Ops);
183 Value *OptimizeAdd(Instruction *I, SmallVectorImpl<ValueEntry> &Ops);
184 Value *OptimizeXor(Instruction *I, SmallVectorImpl<ValueEntry> &Ops);
189 bool collectMultiplyFactors(SmallVectorImpl<ValueEntry> &Ops,
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/trueos/contrib/llvm/include/llvm/IR/
HDMDBuilder.h130 Value *Ops[3] = { createString(Name), Parent, Flags }; variable
131 return MDNode::get(Context, Ops);
133 Value *Ops[2] = { createString(Name), Parent }; variable
134 return MDNode::get(Context, Ops);
163 SmallVector<Value *, 4> Ops(Fields.size() * 2 + 1); in createTBAAStructTypeNode()
165 Ops[0] = createString(Name); in createTBAAStructTypeNode()
167 Ops[i * 2 + 1] = Fields[i].first; in createTBAAStructTypeNode()
168 Ops[i * 2 + 2] = ConstantInt::get(Int64, Fields[i].second); in createTBAAStructTypeNode()
170 return MDNode::get(Context, Ops); in createTBAAStructTypeNode()
177 SmallVector<Value *, 4> Ops(3);
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/trueos/contrib/llvm/lib/Analysis/
HDScalarEvolution.cpp639 static void GroupByComplexity(SmallVectorImpl<const SCEV *> &Ops, in GroupByComplexity() argument
641 if (Ops.size() < 2) return; // Noop in GroupByComplexity()
642 if (Ops.size() == 2) { in GroupByComplexity()
645 const SCEV *&LHS = Ops[0], *&RHS = Ops[1]; in GroupByComplexity()
652 std::stable_sort(Ops.begin(), Ops.end(), SCEVComplexityCompare(LI)); in GroupByComplexity()
658 for (unsigned i = 0, e = Ops.size(); i != e-2; ++i) { in GroupByComplexity()
659 const SCEV *S = Ops[i]; in GroupByComplexity()
664 for (unsigned j = i+1; j != e && Ops[j]->getSCEVType() == Complexity; ++j) { in GroupByComplexity()
665 if (Ops[j] == S) { // Found a duplicate. in GroupByComplexity()
667 std::swap(Ops[i+1], Ops[j]); in GroupByComplexity()
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HDConstantFolding.cpp102 Constant *Ops = C; // don't take the address of C! in FoldBitCast() local
103 return FoldBitCast(ConstantVector::get(Ops), DestTy, TD); in FoldBitCast()
617 static Constant *CastGEPIndices(ArrayRef<Constant *> Ops, in CastGEPIndices() argument
627 for (unsigned i = 1, e = Ops.size(); i != e; ++i) { in CastGEPIndices()
630 Ops[0]->getType(), in CastGEPIndices()
631 Ops.slice(1, i - 1)))) && in CastGEPIndices()
632 Ops[i]->getType() != IntPtrTy) { in CastGEPIndices()
634 NewIdxs.push_back(ConstantExpr::getCast(CastInst::getCastOpcode(Ops[i], in CastGEPIndices()
638 Ops[i], IntPtrTy)); in CastGEPIndices()
640 NewIdxs.push_back(Ops[i]); in CastGEPIndices()
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HDScalarEvolutionExpander.cpp306 static void SimplifyAddOperands(SmallVectorImpl<const SCEV *> &Ops, in SimplifyAddOperands() argument
310 for (unsigned i = Ops.size(); i > 0 && isa<SCEVAddRecExpr>(Ops[i-1]); --i) in SimplifyAddOperands()
313 SmallVector<const SCEV *, 8> NoAddRecs(Ops.begin(), Ops.end() - NumAddRecs); in SimplifyAddOperands()
314 SmallVector<const SCEV *, 8> AddRecs(Ops.end() - NumAddRecs, Ops.end()); in SimplifyAddOperands()
321 Ops.clear(); in SimplifyAddOperands()
323 Ops.append(Add->op_begin(), Add->op_end()); in SimplifyAddOperands()
325 Ops.push_back(Sum); in SimplifyAddOperands()
327 Ops.append(AddRecs.begin(), AddRecs.end()); in SimplifyAddOperands()
335 static void SplitAddRecs(SmallVectorImpl<const SCEV *> &Ops, in SplitAddRecs() argument
340 for (unsigned i = 0, e = Ops.size(); i != e; ++i) in SplitAddRecs()
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/trueos/contrib/llvm/lib/Target/XCore/
HDXCoreISelDAGToDAG.cpp139 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
142 Ops); in Select()
145 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
148 Ops); in Select()
151 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
154 Ops); in Select()
157 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
160 Ops); in Select()
163 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
166 Ops); in Select()
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/trueos/contrib/llvm/lib/Target/ARM/MCTargetDesc/
HDARMUnwindOpAsm.h30 llvm::SmallVector<uint8_t, 32> Ops;
42 Ops.clear(); in Reset()
71 Ops.push_back(Opcode & 0xff); in EmitInt8()
76 Ops.push_back((Opcode >> 8) & 0xff); in EmitInt16()
77 Ops.push_back(Opcode & 0xff); in EmitInt16()
82 Ops.insert(Ops.end(), Opcode, Opcode + Size); in EmitBytes()
/trueos/contrib/llvm/lib/IR/
HDIRBuilder.cpp55 static CallInst *createCallHelper(Value *Callee, ArrayRef<Value *> Ops, in createCallHelper() argument
57 CallInst *CI = CallInst::Create(Callee, Ops, ""); in createCallHelper()
67 Value *Ops[] = { Ptr, Val, Size, getInt32(Align), getInt1(isVolatile) }; in CreateMemSet() local
72 CallInst *CI = createCallHelper(TheFn, Ops, this); in CreateMemSet()
87 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) }; in CreateMemCpy() local
92 CallInst *CI = createCallHelper(TheFn, Ops, this); in CreateMemCpy()
111 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) }; in CreateMemMove() local
116 CallInst *CI = createCallHelper(TheFn, Ops, this); in CreateMemMove()
134 Value *Ops[] = { Size, Ptr }; in CreateLifetimeStart() local
137 return createCallHelper(TheFn, Ops, this); in CreateLifetimeStart()
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/trueos/contrib/llvm/lib/Target/ARM/
HDARMISelDAGToDAG.cpp1504 SDValue Ops[]= { Base, AMOpc, getAL(CurDAG), in SelectARMIndexedLoad() local
1507 MVT::i32, MVT::Other, Ops); in SelectARMIndexedLoad()
1511 SDValue Ops[]= { Base, Offset, AMOpc, getAL(CurDAG), in SelectARMIndexedLoad() local
1514 MVT::i32, MVT::Other, Ops); in SelectARMIndexedLoad()
1560 SDValue Ops[]= { Base, Offset, getAL(CurDAG), in SelectT2IndexedLoad() local
1563 MVT::Other, Ops); in SelectT2IndexedLoad()
1576 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createGPRPairNode() local
1577 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createGPRPairNode()
1587 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createSRegPairNode() local
1588 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createSRegPairNode()
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/trueos/contrib/llvm/include/llvm/CodeGen/
HDSelectionDAGNodes.h702 const SDValue *Ops, unsigned NumOps)
711 OperandList[i].setInitial(Ops[i]);
725 void InitOperands(SDUse *Ops, const SDValue &Op0) {
726 Ops[0].setUser(this);
727 Ops[0].setInitial(Op0);
729 OperandList = Ops;
734 void InitOperands(SDUse *Ops, const SDValue &Op0, const SDValue &Op1) {
735 Ops[0].setUser(this);
736 Ops[0].setInitial(Op0);
737 Ops[1].setUser(this);
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HDSelectionDAG.h502 SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue };
503 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3);
510 SDValue Ops[] = { Chain, Reg, N, Glue };
511 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3);
516 SDValue Ops[] = { Chain, getRegister(Reg, VT) };
517 return getNode(ISD::CopyFromReg, dl, VTs, Ops, 2);
526 SDValue Ops[] = { Chain, getRegister(Reg, VT), Glue };
527 return getNode(ISD::CopyFromReg, dl, VTs, Ops, Glue.getNode() ? 3 : 2);
569 SDValue Ops[] = { Chain, Op };
570 return getNode(ISD::CALLSEQ_START, DL, VTs, Ops, 2);
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/trueos/contrib/llvm/include/llvm/Analysis/
HDScalarEvolution.h580 const SCEV *getAddExpr(SmallVectorImpl<const SCEV *> &Ops,
584 SmallVector<const SCEV *, 2> Ops;
585 Ops.push_back(LHS);
586 Ops.push_back(RHS);
587 return getAddExpr(Ops, Flags);
591 SmallVector<const SCEV *, 3> Ops;
592 Ops.push_back(Op0);
593 Ops.push_back(Op1);
594 Ops.push_back(Op2);
595 return getAddExpr(Ops, Flags);
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/trueos/contrib/llvm/tools/clang/include/clang/ASTMatchers/Dynamic/
HDVariantValue.h68 virtual void makeTypedMatcher(MatcherOps &Ops) const = 0;
113 TypedMatcherOps<T> Ops; in hasTypedMatcher() local
114 if (Value) Value->makeTypedMatcher(Ops); in hasTypedMatcher()
115 return Ops.hasMatcher(); in hasTypedMatcher()
124 TypedMatcherOps<T> Ops; in getTypedMatcher() local
125 Value->makeTypedMatcher(Ops); in getTypedMatcher()
126 assert(Ops.hasMatcher() && "hasTypedMatcher<T>() == false"); in getTypedMatcher()
127 return Ops.matcher(); in getTypedMatcher()
/trueos/contrib/llvm/lib/CodeGen/SelectionDAG/
HDSelectionDAG.cpp338 const SDValue *Ops, unsigned NumOps) { in AddNodeIDOperands() argument
339 for (; NumOps; --NumOps, ++Ops) { in AddNodeIDOperands()
340 ID.AddPointer(Ops->getNode()); in AddNodeIDOperands()
341 ID.AddInteger(Ops->getResNo()); in AddNodeIDOperands()
348 const SDUse *Ops, unsigned NumOps) { in AddNodeIDOperands() argument
349 for (; NumOps; --NumOps, ++Ops) { in AddNodeIDOperands()
350 ID.AddPointer(Ops->getNode()); in AddNodeIDOperands()
351 ID.AddInteger(Ops->getResNo()); in AddNodeIDOperands()
746 SDValue Ops[] = { Op }; in FindModifiedNodeSlot() local
748 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); in FindModifiedNodeSlot()
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/trueos/contrib/llvm/tools/clang/lib/ASTMatchers/Dynamic/
HDVariantValue.cpp40 virtual void makeTypedMatcher(MatcherOps &Ops) const { in makeTypedMatcher()
41 if (Ops.canConstructFrom(Matcher)) in makeTypedMatcher()
42 Ops.constructFrom(Matcher); in makeTypedMatcher()
72 virtual void makeTypedMatcher(MatcherOps &Ops) const { in makeTypedMatcher()
75 if (Ops.canConstructFrom(Matchers[i])) { in makeTypedMatcher()
82 Ops.constructFrom(*Found); in makeTypedMatcher()
108 virtual void makeTypedMatcher(MatcherOps &Ops) const { in makeTypedMatcher()
109 Ops.constructVariadicOperator(Func, Args); in makeTypedMatcher()
/trueos/contrib/llvm/lib/CodeGen/
HDIntrinsicLowering.cpp469 Value *Ops[3]; in LowerIntrinsicCall() local
470 Ops[0] = CI->getArgOperand(0); in LowerIntrinsicCall()
471 Ops[1] = CI->getArgOperand(1); in LowerIntrinsicCall()
472 Ops[2] = Size; in LowerIntrinsicCall()
473 ReplaceCallWith("memcpy", CI, Ops, Ops+3, CI->getArgOperand(0)->getType()); in LowerIntrinsicCall()
480 Value *Ops[3]; in LowerIntrinsicCall() local
481 Ops[0] = CI->getArgOperand(0); in LowerIntrinsicCall()
482 Ops[1] = CI->getArgOperand(1); in LowerIntrinsicCall()
483 Ops[2] = Size; in LowerIntrinsicCall()
484 ReplaceCallWith("memmove", CI, Ops, Ops+3, CI->getArgOperand(0)->getType()); in LowerIntrinsicCall()
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HDTargetInstrInfo.cpp371 const SmallVectorImpl<unsigned> &Ops) const { in canFoldMemoryOperand()
372 return MI->isCopy() && Ops.size() == 1 && canFoldCopy(MI, Ops[0]); in canFoldMemoryOperand()
383 const SmallVectorImpl<unsigned> &Ops, in foldMemoryOperand() argument
386 for (unsigned i = 0, e = Ops.size(); i != e; ++i) in foldMemoryOperand()
387 if (MI->getOperand(Ops[i]).isDef()) in foldMemoryOperand()
397 if (MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, FI)) { in foldMemoryOperand()
419 if (!MI->isCopy() || Ops.size() != 1) in foldMemoryOperand()
422 const TargetRegisterClass *RC = canFoldCopy(MI, Ops[0]); in foldMemoryOperand()
426 const MachineOperand &MO = MI->getOperand(1-Ops[0]); in foldMemoryOperand()
442 const SmallVectorImpl<unsigned> &Ops, in foldMemoryOperand() argument
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/trueos/contrib/llvm/lib/Transforms/Utils/
HDValueMapper.cpp148 SmallVector<Constant*, 8> Ops; in MapValue() local
149 Ops.reserve(NumOperands); in MapValue()
151 Ops.push_back(cast<Constant>(C->getOperand(j))); in MapValue()
155 Ops.push_back(cast<Constant>(Mapped)); in MapValue()
159 Ops.push_back(MapValue(cast<Constant>(C->getOperand(OpNo)), VM, in MapValue()
164 return VM[V] = CE->getWithOperands(Ops, NewTy); in MapValue()
166 return VM[V] = ConstantArray::get(cast<ArrayType>(NewTy), Ops); in MapValue()
168 return VM[V] = ConstantStruct::get(cast<StructType>(NewTy), Ops); in MapValue()
170 return VM[V] = ConstantVector::get(Ops); in MapValue()
/trueos/contrib/llvm/lib/Target/NVPTX/
HDNVPTXISelDAGToDAG.cpp279 SDValue Ops[] = { getI32Imm(isVolatile), getI32Imm(codeAddrSpace), in SelectLoad() local
282 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops); in SelectLoad()
308 SDValue Ops[] = { getI32Imm(isVolatile), getI32Imm(codeAddrSpace), in SelectLoad() local
311 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops); in SelectLoad()
362 SDValue Ops[] = { getI32Imm(isVolatile), getI32Imm(codeAddrSpace), in SelectLoad() local
365 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops); in SelectLoad()
414 SDValue Ops[] = { getI32Imm(isVolatile), getI32Imm(codeAddrSpace), in SelectLoad() local
417 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops); in SelectLoad()
540 SDValue Ops[] = { getI32Imm(IsVolatile), getI32Imm(CodeAddrSpace), in SelectLoadVector() local
543 LD = CurDAG->getMachineNode(Opcode, DL, N->getVTList(), Ops); in SelectLoadVector()
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/trueos/contrib/llvm/lib/Target/R600/
HDSIISelLowering.cpp511 SDValue Ops [] = { in LowerOperation() local
521 Op->getVTList(), Ops, 2, VT, MMO); in LowerOperation()
546 SDValue Ops [] = { in LowerOperation() local
569 Op->getVTList(), Ops, in LowerOperation()
570 sizeof(Ops)/sizeof(Ops[0]), VT, MMO); in LowerOperation()
655 SmallVector<SDValue, 4> Ops; in LowerBRCOND() local
656 Ops.push_back(BRCOND.getOperand(0)); in LowerBRCOND()
658 Ops.push_back(Intr->getOperand(i)); in LowerBRCOND()
659 Ops.push_back(Target); in LowerBRCOND()
664 DAG.getVTList(Res.data(), Res.size()), Ops.data(), Ops.size()).getNode(); in LowerBRCOND()
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/trueos/contrib/llvm/lib/Target/PowerPC/
HDPPCISelDAGToDAG.cpp461 SDValue Ops[] = { Op0, Op1, getI32Imm(SH), getI32Imm(MB), in SelectBitfieldInsert() local
463 return CurDAG->getMachineNode(PPC::RLWIMI, dl, MVT::i32, Ops); in SelectBitfieldInsert()
728 SDValue Ops[] = { Op, getI32Imm(27), getI32Imm(5), getI32Imm(31) }; in SelectSETCC() local
729 return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4); in SelectSETCC()
740 SDValue Ops[] = { Op, getI32Imm(1), getI32Imm(31), getI32Imm(31) }; in SelectSETCC() local
741 return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4); in SelectSETCC()
747 SDValue Ops[] = { T, getI32Imm(1), getI32Imm(31), getI32Imm(31) }; in SelectSETCC() local
748 return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4); in SelectSETCC()
777 SDValue Ops[] = { AN, getI32Imm(1), getI32Imm(31), getI32Imm(31) }; in SelectSETCC() local
778 return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4); in SelectSETCC()
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/trueos/contrib/llvm/lib/Target/X86/
HDX86SelectionDAGInfo.cpp141 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag }; in EmitTargetCodeForMemset() local
142 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops, array_lengthof(Ops)); in EmitTargetCodeForMemset()
155 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag }; in EmitTargetCodeForMemset() local
156 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops, array_lengthof(Ops)); in EmitTargetCodeForMemset()
243 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag }; in EmitTargetCodeForMemcpy() local
244 SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops, in EmitTargetCodeForMemcpy()
245 array_lengthof(Ops)); in EmitTargetCodeForMemcpy()
/trueos/contrib/llvm/lib/Target/AArch64/
HDAArch64ISelDAGToDAG.cpp420 SmallVector<SDValue, 4> Ops; in SelectAtomic() local
422 Ops.push_back(AN->getOperand(i)); in SelectAtomic()
424 Ops.push_back(CurDAG->getTargetConstant(AN->getOrdering(), MVT::i32)); in SelectAtomic()
425 Ops.push_back(AN->getOperand(0)); // Chain moves to the end in SelectAtomic()
429 &Ops[0], Ops.size()); in SelectAtomic()
464 SmallVector<SDValue, 4> Ops; in createTuple() local
467 Ops.push_back( in createTuple()
472 Ops.push_back(Regs[i]); in createTuple()
473 Ops.push_back(CurDAG->getTargetConstant(SubRegs[i], MVT::i32)); in createTuple()
477 CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, DL, MVT::Untyped, Ops); in createTuple()
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