Lines Matching refs:Ops
1504 SDValue Ops[]= { Base, AMOpc, getAL(CurDAG), in SelectARMIndexedLoad() local
1507 MVT::i32, MVT::Other, Ops); in SelectARMIndexedLoad()
1511 SDValue Ops[]= { Base, Offset, AMOpc, getAL(CurDAG), in SelectARMIndexedLoad() local
1514 MVT::i32, MVT::Other, Ops); in SelectARMIndexedLoad()
1560 SDValue Ops[]= { Base, Offset, getAL(CurDAG), in SelectT2IndexedLoad() local
1563 MVT::Other, Ops); in SelectT2IndexedLoad()
1576 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createGPRPairNode() local
1577 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createGPRPairNode()
1587 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createSRegPairNode() local
1588 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createSRegPairNode()
1597 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createDRegPairNode() local
1598 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createDRegPairNode()
1607 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createQRegPairNode() local
1608 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createQRegPairNode()
1621 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in createQuadSRegsNode() local
1623 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createQuadSRegsNode()
1635 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in createQuadDRegsNode() local
1637 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createQuadDRegsNode()
1649 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in createQuadQRegsNode() local
1651 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createQuadQRegsNode()
1832 SmallVector<SDValue, 7> Ops; in SelectVLD() local
1838 Ops.push_back(MemAddr); in SelectVLD()
1839 Ops.push_back(Align); in SelectVLD()
1850 Ops.push_back(isa<ConstantSDNode>(Inc.getNode()) ? Reg0 : Inc); in SelectVLD()
1852 Ops.push_back(Pred); in SelectVLD()
1853 Ops.push_back(Reg0); in SelectVLD()
1854 Ops.push_back(Chain); in SelectVLD()
1855 VLd = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectVLD()
1872 Ops.push_back(SDValue(VLdA, 1)); in SelectVLD()
1873 Ops.push_back(Align); in SelectVLD()
1879 Ops.push_back(Reg0); in SelectVLD()
1881 Ops.push_back(SDValue(VLdA, 0)); in SelectVLD()
1882 Ops.push_back(Pred); in SelectVLD()
1883 Ops.push_back(Reg0); in SelectVLD()
1884 Ops.push_back(Chain); in SelectVLD()
1885 VLd = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys, Ops); in SelectVLD()
1957 SmallVector<SDValue, 7> Ops; in SelectVST() local
1988 Ops.push_back(MemAddr); in SelectVST()
1989 Ops.push_back(Align); in SelectVST()
1999 Ops.push_back(Inc); in SelectVST()
2001 Ops.push_back(Reg0); in SelectVST()
2003 Ops.push_back(SrcReg); in SelectVST()
2004 Ops.push_back(Pred); in SelectVST()
2005 Ops.push_back(Reg0); in SelectVST()
2006 Ops.push_back(Chain); in SelectVST()
2007 SDNode *VSt = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectVST()
2037 Ops.push_back(SDValue(VStA, 0)); in SelectVST()
2038 Ops.push_back(Align); in SelectVST()
2044 Ops.push_back(Reg0); in SelectVST()
2046 Ops.push_back(RegSeq); in SelectVST()
2047 Ops.push_back(Pred); in SelectVST()
2048 Ops.push_back(Reg0); in SelectVST()
2049 Ops.push_back(Chain); in SelectVST()
2051 Ops); in SelectVST()
2122 SmallVector<SDValue, 8> Ops; in SelectVLDSTLane() local
2123 Ops.push_back(MemAddr); in SelectVLDSTLane()
2124 Ops.push_back(Align); in SelectVLDSTLane()
2127 Ops.push_back(isa<ConstantSDNode>(Inc.getNode()) ? Reg0 : Inc); in SelectVLDSTLane()
2148 Ops.push_back(SuperReg); in SelectVLDSTLane()
2149 Ops.push_back(getI32Imm(Lane)); in SelectVLDSTLane()
2150 Ops.push_back(Pred); in SelectVLDSTLane()
2151 Ops.push_back(Reg0); in SelectVLDSTLane()
2152 Ops.push_back(Chain); in SelectVLDSTLane()
2156 SDNode *VLdLn = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectVLDSTLane()
2219 SmallVector<SDValue, 6> Ops; in SelectVLDDup() local
2220 Ops.push_back(MemAddr); in SelectVLDDup()
2221 Ops.push_back(Align); in SelectVLDDup()
2227 Ops.push_back(Inc); in SelectVLDDup()
2230 Ops.push_back(Reg0); in SelectVLDDup()
2232 Ops.push_back(Pred); in SelectVLDDup()
2233 Ops.push_back(Reg0); in SelectVLDDup()
2234 Ops.push_back(Chain); in SelectVLDDup()
2242 SDNode *VLdDup = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectVLDDup()
2281 SmallVector<SDValue, 6> Ops; in SelectVTBL() local
2283 Ops.push_back(N->getOperand(1)); in SelectVTBL()
2284 Ops.push_back(RegSeq); in SelectVTBL()
2285 Ops.push_back(N->getOperand(FirstTblReg + NumVecs)); in SelectVTBL()
2286 Ops.push_back(getAL(CurDAG)); // predicate in SelectVTBL()
2287 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); // predicate register in SelectVTBL()
2288 return CurDAG->getMachineNode(Opc, dl, VT, Ops); in SelectVTBL()
2324 SDValue Ops[] = { N->getOperand(0).getOperand(0), in SelectV6T2BitfieldExtractOp() local
2327 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in SelectV6T2BitfieldExtractOp()
2335 SDValue Ops[] = { N->getOperand(0).getOperand(0), ShOpc, in SelectV6T2BitfieldExtractOp() local
2337 return CurDAG->SelectNodeTo(N, ARM::MOVsi, MVT::i32, Ops, 5); in SelectV6T2BitfieldExtractOp()
2340 SDValue Ops[] = { N->getOperand(0).getOperand(0), in SelectV6T2BitfieldExtractOp() local
2344 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in SelectV6T2BitfieldExtractOp()
2363 SDValue Ops[] = { N->getOperand(0).getOperand(0), in SelectV6T2BitfieldExtractOp() local
2367 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in SelectV6T2BitfieldExtractOp()
2443 SmallVector<SDValue, 6> Ops; in SelectAtomic() local
2445 Ops.push_back(AN->getOperand(i)); in SelectAtomic()
2447 Ops.push_back(CurDAG->getTargetConstant(AN->getOrdering(), MVT::i32)); in SelectAtomic()
2448 Ops.push_back(AN->getOperand(0)); // Chain moves to the end in SelectAtomic()
2450 return CurDAG->SelectNodeTo(Node, Op, VTs, &Ops[0], Ops.size()); in SelectAtomic()
2505 SDValue Ops[] = { CPIdx, Pred, PredReg, CurDAG->getEntryNode() }; in Select() local
2507 Ops); in Select()
2509 SDValue Ops[] = { in Select() local
2517 Ops); in Select()
2532 SDValue Ops[] = { TFI, CurDAG->getTargetConstant(0, MVT::i32), in Select() local
2534 return CurDAG->SelectNodeTo(N, ARM::tADDrSPi, MVT::i32, Ops, 4); in Select()
2538 SDValue Ops[] = { TFI, CurDAG->getTargetConstant(0, MVT::i32), in Select() local
2541 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in Select()
2567 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG), Reg0, Reg0 }; in Select() local
2568 return CurDAG->SelectNodeTo(N, ARM::t2ADDrs, MVT::i32, Ops, 6); in Select()
2570 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG), Reg0, Reg0 }; in Select() local
2571 return CurDAG->SelectNodeTo(N, ARM::ADDrsi, MVT::i32, Ops, 7); in Select()
2583 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG), Reg0, Reg0 }; in Select() local
2584 return CurDAG->SelectNodeTo(N, ARM::t2RSBrs, MVT::i32, Ops, 6); in Select()
2586 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG), Reg0, Reg0 }; in Select() local
2587 return CurDAG->SelectNodeTo(N, ARM::RSBrsi, MVT::i32, Ops, 7); in Select()
2626 SDValue Ops[] = { N0.getOperand(0), Imm16, in Select() local
2628 return CurDAG->getMachineNode(Opc, dl, VT, Ops); in Select()
2641 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
2643 return CurDAG->getMachineNode(ARM::t2UMULL, dl, MVT::i32, MVT::i32, Ops); in Select()
2645 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
2650 dl, MVT::i32, MVT::i32, Ops); in Select()
2657 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
2659 return CurDAG->getMachineNode(ARM::t2SMULL, dl, MVT::i32, MVT::i32, Ops); in Select()
2661 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
2666 dl, MVT::i32, MVT::i32, Ops); in Select()
2671 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2), in Select() local
2674 return CurDAG->getMachineNode(ARM::t2UMLAL, dl, MVT::i32, MVT::i32, Ops); in Select()
2676 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2), in Select() local
2682 dl, MVT::i32, MVT::i32, Ops); in Select()
2687 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2), in Select() local
2690 return CurDAG->getMachineNode(ARM::t2SMLAL, dl, MVT::i32, MVT::i32, Ops); in Select()
2692 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2), in Select() local
2698 dl, MVT::i32, MVT::i32, Ops); in Select()
2739 SDValue Ops[] = { N1, Tmp2, N3, Chain, InFlag }; in Select() local
2741 MVT::Glue, Ops); in Select()
2768 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg }; in Select() local
2769 return CurDAG->getMachineNode(Opc, dl, VT, VT, Ops); in Select()
2788 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg }; in Select() local
2789 return CurDAG->getMachineNode(Opc, dl, VT, VT, Ops); in Select()
2807 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg }; in Select() local
2808 return CurDAG->getMachineNode(Opc, dl, VT, VT, Ops); in Select()
3048 SmallVector<SDValue, 7> Ops; in Select() local
3049 Ops.push_back(MemAddr); in Select()
3050 Ops.push_back(getAL(CurDAG)); in Select()
3051 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); in Select()
3052 Ops.push_back(Chain); in Select()
3053 SDNode *Ld = CurDAG->getMachineNode(NewOpc, dl, ResTys, Ops); in Select()
3102 SmallVector<SDValue, 7> Ops; in Select() local
3104 Ops.push_back(Val0); in Select()
3105 Ops.push_back(Val1); in Select()
3108 Ops.push_back(SDValue(createGPRPairNode(MVT::Untyped, Val0, Val1), 0)); in Select()
3109 Ops.push_back(MemAddr); in Select()
3110 Ops.push_back(getAL(CurDAG)); in Select()
3111 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); in Select()
3112 Ops.push_back(Chain); in Select()
3116 SDNode *St = CurDAG->getMachineNode(NewOpc, dl, ResTys, Ops); in Select()
3296 SmallVector<SDValue, 6> Ops; in Select() local
3298 Ops.push_back(N->getOperand(0)); in Select()
3299 Ops.push_back(N->getOperand(1)); in Select()
3300 Ops.push_back(getAL(CurDAG)); // Predicate in Select()
3301 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); // Predicate Register in Select()
3302 return CurDAG->getMachineNode(ARM::VTBL1, dl, VT, Ops); in Select()
3313 SmallVector<SDValue, 6> Ops; in Select() local
3314 Ops.push_back(RegSeq); in Select()
3315 Ops.push_back(N->getOperand(2)); in Select()
3316 Ops.push_back(getAL(CurDAG)); // Predicate in Select()
3317 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); // Predicate Register in Select()
3318 return CurDAG->getMachineNode(ARM::VTBL2, dl, VT, Ops); in Select()
3508 std::vector<SDValue> Ops(GU->op_begin(), GU->op_end()-1); in SelectInlineAsm() local
3509 Ops.push_back(T1.getValue(1)); in SelectInlineAsm()
3510 CurDAG->UpdateNodeOperands(GU, &Ops[0], Ops.size()); in SelectInlineAsm()