Searched refs:MLX4_MAX_PORTS (Results 1 – 12 of 12) sorted by relevance
69 int ib_mtu[MLX4_MAX_PORTS + 1];70 int max_port_width[MLX4_MAX_PORTS + 1];71 int max_vl[MLX4_MAX_PORTS + 1];72 int max_gids[MLX4_MAX_PORTS + 1];73 int max_pkeys[MLX4_MAX_PORTS + 1];74 u64 def_mac[MLX4_MAX_PORTS + 1];75 u16 eth_mtu[MLX4_MAX_PORTS + 1];76 int trans_type[MLX4_MAX_PORTS + 1];77 int vendor_oui[MLX4_MAX_PORTS + 1];78 u16 wavelength[MLX4_MAX_PORTS + 1];[all …]
466 u16 mtu[MLX4_MAX_PORTS + 1];467 __be32 ib_cap_mask[MLX4_MAX_PORTS + 1];469 struct list_head mcast_filters[MLX4_MAX_PORTS + 1];470 struct mlx4_vlan_fltr *vlan_filter[MLX4_MAX_PORTS + 1];479 enum slave_port_state port_state[MLX4_MAX_PORTS + 1];496 struct mlx4_vport_state vport[MLX4_MAX_PORTS + 1];505 struct mlx4_vport_oper_state vport[MLX4_MAX_PORTS + 1];517 int res_port_rsvd[MLX4_MAX_PORTS];521 int res_port_free[MLX4_MAX_PORTS];556 struct mlx4_master_qp0_state qp0_state[MLX4_MAX_PORTS + 1];[all …]
98 enum mlx4_port_type stype[MLX4_MAX_PORTS]; in mlx4_sense_port()
439 struct mlx4_en_port_profile prof[MLX4_MAX_PORTS + 1];446 struct net_device *pndev[MLX4_MAX_PORTS + 1];458 u8 mac_removed[MLX4_MAX_PORTS + 1];
219 enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1];614 if (dev_cap->num_ports > MLX4_MAX_PORTS) { in mlx4_dev_cap()617 dev_cap->num_ports, MLX4_MAX_PORTS); in mlx4_dev_cap()1026 if (dev->caps.num_ports > MLX4_MAX_PORTS) { in mlx4_slave_cap()1028 "aborting.\n", dev->caps.num_ports, MLX4_MAX_PORTS); in mlx4_slave_cap()1199 enum mlx4_port_type types[MLX4_MAX_PORTS]; in set_port_type()1200 enum mlx4_port_type new_types[MLX4_MAX_PORTS]; in set_port_type()2313 (port < 0) || (port > MLX4_MAX_PORTS)) { in __mlx4_counter_alloc()2438 (port < 0) || (port > MLX4_MAX_PORTS)) { in __mlx4_counter_free()3547 enum mlx4_port_type curr_type[MLX4_MAX_PORTS]; in mlx4_restart_one()[all …]
91 for (i = 1; i <= MLX4_MAX_PORTS; i++) { in mlx4_en_get_profile()
1833 for (port = 1; port <= MLX4_MAX_PORTS; port++) { in mlx4_master_activate_admin_state()1875 for (port = 1; port <= MLX4_MAX_PORTS; port++) { in mlx4_master_deactivate_admin_state()2172 for (port = 1; port <= MLX4_MAX_PORTS; port++) { in mlx4_multi_func_init()2233 for (port = 1; port <= MLX4_MAX_PORTS; port++) in mlx4_multi_func_init()2312 for (port = 1; port <= MLX4_MAX_PORTS; port++) in mlx4_multi_func_cleanup()
272 if (slave >= dev->num_slaves || port > MLX4_MAX_PORTS) { in mlx4_get_slave_port_state()287 if (slave >= dev->num_slaves || port > MLX4_MAX_PORTS || port == 0) { in mlx4_set_slave_port_state()327 if (slave >= dev->num_slaves || port > MLX4_MAX_PORTS || port == 0) { in set_and_calc_slave_port_state()
534 8 * mlx4_master_func_num(dev) + MLX4_MAX_PORTS + k; in mlx4_init_qp_table()
454 res_alloc->allocated = kzalloc(MLX4_MAX_PORTS * in mlx4_init_resource_tracker()498 for (j = 0; j < MLX4_MAX_PORTS; j++) in mlx4_init_resource_tracker()509 for (j = 0; j < MLX4_MAX_PORTS; j++) in mlx4_init_resource_tracker()527 for (j = 0; j < MLX4_MAX_PORTS; j++) in mlx4_init_resource_tracker()
83 MLX4_MAX_PORTS = 2, enumerator422 u32 gid_phys_table_len[MLX4_MAX_PORTS + 1];423 u32 pkey_phys_table_len[MLX4_MAX_PORTS + 1];434 int vl_cap[MLX4_MAX_PORTS + 1];435 int ib_mtu_cap[MLX4_MAX_PORTS + 1];436 __be32 ib_port_def_cap[MLX4_MAX_PORTS + 1];437 u64 def_mac[MLX4_MAX_PORTS + 1];438 int eth_mtu_cap[MLX4_MAX_PORTS + 1];439 int gid_table_len[MLX4_MAX_PORTS + 1];440 int pkey_table_len[MLX4_MAX_PORTS + 1];[all …]
392 struct mlx4_sriov_alias_guid_port_rec_det ports_guid[MLX4_MAX_PORTS];462 struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];463 struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];480 struct net_device *netdevs[MLX4_MAX_PORTS];482 union ib_gid gid_table[MLX4_MAX_PORTS][128];486 u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];487 u16 phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];529 struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];530 struct ib_ah *sm_ah[MLX4_MAX_PORTS];537 int counters[MLX4_MAX_PORTS];[all …]