| /netbsd/src/sys/arch/arm/arm/ |
| D | process_machdep.c | 161 regs->r_cpsr = tf->tf_spsr; in process_read_regs() 163 KASSERT(VALID_PSR(tf->tf_spsr)); in process_read_regs() 166 if (tf->tf_spsr & PSR_T_bit) in process_read_regs() 199 tf->tf_spsr &= ~(PSR_FLAGS | PSR_T_bit); in process_write_regs() 200 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS; in process_write_regs() 203 tf->tf_spsr |= PSR_T_bit; in process_write_regs() 205 KASSERT(VALID_PSR(tf->tf_spsr)); in process_write_regs() 234 tf->tf_spsr |= PSR_T_bit; in process_set_pc() 236 tf->tf_spsr &= ~PSR_T_bit; in process_set_pc()
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| D | syscall.c | 104 KASSERT(VALID_PSR(tf->tf_spsr)); in swi_handler() 105 restore_interrupts(tf->tf_spsr & IF32_bits); in swi_handler() 131 if (tf->tf_spsr & PSR_T_bit) { in swi_handler() 212 if (tf->tf_spsr & PSR_T_bit) in syscall() 256 tf->tf_spsr &= ~PSR_C_bit; /* carry bit */ in syscall() 264 if (tf->tf_spsr & PSR_T_bit) in syscall() 278 tf->tf_spsr |= PSR_C_bit; /* carry bit */ in syscall() 291 tf->tf_spsr &= ~PSR_C_bit; /* carry bit */ in md_child_return()
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| D | undefined.c | 131 if (tf->tf_spsr & PSR_T_bit) in cp15_trapper() 182 if (tf->tf_spsr & PSR_T_bit) { in gdb_trapper() 270 if (!arm_cond_ok_p(__SHIFTIN(insn, INSN_COND_MASK), frame->tf_spsr)) { in dtrace_trapper() 316 if ((tf->tf_spsr & PSR_MODE) != PSR_USR32_MODE) { in undefinedinstruction() 325 restore_interrupts(tf->tf_spsr & IF32_bits); in undefinedinstruction() 328 if (tf->tf_spsr & PSR_T_bit) in undefinedinstruction() 341 if ((tf->tf_spsr & PSR_MODE) == PSR_USR32_MODE) { in undefinedinstruction() 348 if (tf->tf_spsr & PSR_T_bit) { in undefinedinstruction() 387 if ((tf->tf_spsr & PSR_T_bit) && !CPU_IS_ARMV7_P()) { in undefinedinstruction() 409 } else if ((tf->tf_spsr & PSR_T_bit) && !CPU_IS_ARMV7_P()) { in undefinedinstruction()
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| D | compat_16_machdep.c | 121 frame.sf_sc.sc_spsr = tf->tf_spsr; in sendsig_sigcontext() 170 tf->tf_spsr |= PSR_T_bit; in sendsig_sigcontext() 172 tf->tf_spsr &= ~PSR_T_bit; in sendsig_sigcontext() 257 tf->tf_spsr = context.sc_spsr; in compat_16_sys___sigreturn14()
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| D | arm_machdep.c | 179 tf->tf_spsr = PSR_USR32_MODE; in setregs() 185 tf->tf_spsr |= PSR_E_BIT; in setregs() 190 tf->tf_spsr |= PSR_T_bit; in setregs()
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| D | sig_machdep.c | 147 tf->tf_spsr |= PSR_T_bit; in sendsig_siginfo() 149 tf->tf_spsr &= ~PSR_T_bit; in sendsig_siginfo() 183 gr[_REG_CPSR] = tf->tf_spsr; in cpu_getmcontext() 251 tf->tf_spsr = gr[_REG_CPSR]; in cpu_setmcontext()
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| D | ast.c | 94 KASSERT(VALID_PSR(lwp_trapframe(l)->tf_spsr)); in userret() 111 KASSERT(VALID_PSR(tf->tf_spsr)); in ast()
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| D | compat_13_machdep.c | 100 tf->tf_spsr = context.sc_spsr; in compat_13_sys_sigreturn()
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| D | cpufunc.c | 2047 if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) { in early_abort_fixup() 2124 (frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) in early_abort_fixup() 2138 if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) { in early_abort_fixup() 2187 if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) { in late_abort_fixup() 2243 (frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) in late_abort_fixup() 2314 if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) { in late_abort_fixup()
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| /netbsd/src/sys/arch/arm/arm32/ |
| D | fault.c | 183 tf->tf_spsr); in call_trapsignal() 206 if (tf->tf_spsr & PSR_T_bit) { in data_abort_fixup() 253 KASSERT(!TRAP_USERMODE(tf) || VALID_PSR(tf->tf_spsr)); in data_abort_handler() 255 if (__predict_true((tf->tf_spsr & I32_bit) != I32_bit)) in data_abort_handler() 256 restore_interrupts(tf->tf_spsr & IF32_bits); in data_abort_handler() 258 if (__predict_true((tf->tf_spsr & IF32_bits) != IF32_bits)) in data_abort_handler() 259 restore_interrupts(tf->tf_spsr & IF32_bits); in data_abort_handler() 377 if (__predict_false((tf->tf_spsr & PSR_MODE)==PSR_UND32_MODE)) { in data_abort_handler() 415 if (__predict_false(tf->tf_spsr & PSR_T_bit)) { in data_abort_handler() 582 printf("spsr=%08x\n", tf->tf_spsr); in dab_fatal() [all …]
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| D | kgdb_machdep.c | 113 gdb_regs[KGDB_REGNUM_SPSR] = regs->tf_spsr; in kgdb_getregs() 139 regs->tf_spsr = gdb_regs[KGDB_REGNUM_SPSR]; in kgdb_setregs()
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| D | arm32_boot.c | 194 tf->tf_spsr = PSR_USR32_MODE; in initarm_common() 196 tf->tf_spsr |= PSR_E_BIT; in initarm_common()
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| D | db_machdep.c | 86 { "spsr", XO(tf_spsr), ddb_reg_var, NULL }, 161 db_printf("spsr=%08x\n", frame->tf_spsr); in db_show_frame_cmd() 477 if (DDB_REGS->tf_spsr & PSR_T_bit) { in db_switch_cpu_cmd()
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| D | arm32_machdep.c | 352 tf->tf_spsr = PSR_USR32_MODE; in cpu_startup() 354 tf->tf_spsr |= PSR_E_BIT; in cpu_startup()
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| D | genassym.cf | 208 define TF_SPSR offsetof(struct trapframe, tf_spsr)
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| /netbsd/src/sys/arch/arm/include/ |
| D | frame.h | 54 register_t tf_spsr; member 82 #define TRAP_USERMODE(tf) (((tf)->tf_spsr & PSR_MODE) == PSR_USR32_MODE)
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| D | cpu.h | 119 #define CLKF_USERMODE(cf) (((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_USR32_MODE) 129 ((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_UND32_MODE)
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| /netbsd/src/sys/arch/arm/xscale/ |
| D | i80321_icu.c | 403 frame->cf_tf.tf_spsr |= I32_bit; in i80321_intr_dispatch() 438 frame->cf_tf.tf_spsr &= ~I32_bit; in i80321_intr_dispatch()
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| /netbsd/src/sys/compat/linux/arch/arm/ |
| D | linux_machdep.c | 129 frame.sf_sc.sc_cpsr = tf->tf_spsr; in linux_sendsig() 239 tf->tf_spsr = frame.sf_sc.sc_cpsr; in linux_sys_sigreturn()
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| /netbsd/src/sys/arch/aarch64/include/ |
| D | frame.h | 47 #define tf_spsr tf_regs.r_spsr macro
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| D | cpu.h | 58 #define CLKF_USERMODE(cf) ((((cf)->cf_tf.tf_spsr) & 0x0f) == 0)
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| /netbsd/src/external/cddl/osnet/dev/dtrace/arm/ |
| D | dtrace_subr.c | 385 uint32_t spsr = frame->tf_spsr; in dtrace_invop_emulate() 422 frame->tf_spsr = spsr; in dtrace_invop_emulate()
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