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Searched refs:DD_CSR (Results 1 – 3 of 3) sorted by relevance

/netbsd/src/sys/arch/next68k/dev/
Dnextdma.c285 nd_bsw4(DD_CSR, DMACSR_RESET | DMACSR_CLRCOMPLETE); in nextdma_init()
286 nd_bsw4(DD_CSR, 0); in nextdma_init()
296 state = nd_bsr4 (DD_CSR); in nextdma_init()
331 nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | DMACSR_RESET); in nextdma_reset()
584 state = nd_bsr4(DD_CSR); in nextdma_enet_intr()
745 nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | dmadir); in nextdma_enet_intr()
748 nd_bsw4(DD_CSR, in nextdma_enet_intr()
754 nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | DMACSR_RESET); in nextdma_enet_intr()
876 nd_bsw4(DD_CSR, (turbo ? in nextdma_start()
878 nd_bsw4(DD_CSR, 0); in nextdma_start()
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Dnextdmareg.h73 #define DD_CSR 0 macro
74 #define DD_SAVED_NEXT (DD_CSR + sizeof(int) + 0x3fec)
Desp.c543 (nd_bsr4(DD_CSR) & 0x08000000) == 0 && in esp_dma_intr()
1468 state = nd_bsr4(DD_CSR); in esp_dma_int()
1528 nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | in esp_dma_int()
1548 state = nd_bsr4(DD_CSR); in esp_dma_int()
1555 nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | in esp_dma_int()
1577 nd_bsw4(DD_CSR, DMACSR_SETENABLE | DMACSR_CLRCOMPLETE | in esp_dma_int()
1609 nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | DMACSR_RESET); in esp_dma_int()
1611 nd_bsw4(DD_CSR, 0); in esp_dma_int()
1615 nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | in esp_dma_int()
1640 nd_bsw4(DD_CSR, DMACSR_SETENABLE | in esp_dma_int()
[all …]