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Searched refs:PHY_CTRL (Results 1 – 3 of 3) sorted by relevance

/mirbsd/src/sys/dev/pci/
Dif_em_hw.c1186 if((ret_val = em_read_phy_reg(hw, PHY_CTRL, &phy_data))) in em_setup_copper_link()
1190 if((ret_val = em_write_phy_reg(hw, PHY_CTRL, phy_data))) in em_setup_copper_link()
1432 if((ret_val = em_read_phy_reg(hw, PHY_CTRL, &mii_ctrl_reg))) in em_phy_force_speed_duplex()
1512 if((ret_val = em_write_phy_reg(hw, PHY_CTRL, mii_ctrl_reg))) in em_phy_force_speed_duplex()
2673 if((ret_val = em_read_phy_reg(hw, PHY_CTRL, &phy_data))) in em_phy_reset()
2677 if((ret_val = em_write_phy_reg(hw, PHY_CTRL, phy_data))) in em_phy_reset()
Dif_em.c2334 !em_read_phy_reg(&sc->hw, PHY_CTRL,
2339 PHY_CTRL, phy_tmp);
2351 !em_read_phy_reg(&sc->hw, PHY_CTRL, &phy_tmp)) {
2354 em_write_phy_reg(&sc->hw, PHY_CTRL, phy_tmp);
Dif_em_hw.h1718 #define PHY_CTRL 0x00 /* Control Register */ macro