Searched refs:last_frame (Results 1 – 18 of 18) sorted by relevance
164 unsigned int last_frame; member
215 drm_mga_age_t last_frame; member
520 dev_priv->sarea_priv->last_frame++; in r128_cce_dispatch_swap()525 OUT_RING(dev_priv->sarea_priv->last_frame); in r128_cce_dispatch_swap()560 dev_priv->sarea_priv->last_frame++; in r128_cce_dispatch_flip()567 OUT_RING(dev_priv->sarea_priv->last_frame); in r128_cce_dispatch_flip()
555 dev_priv->sarea_priv->last_frame = 0; in r128_do_init_cce()556 R128_WRITE(R128_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame); in r128_do_init_cce()
931 dev_priv->sarea_priv->last_frame.head = 0; in mga_do_init_dma()932 dev_priv->sarea_priv->last_frame.wrap = 0; in mga_do_init_dma()
448 unsigned int last_frame; member
607 sarea_priv->last_frame.head = dev_priv->prim.tail; in mga_dma_dispatch_swap()608 sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap; in mga_dma_dispatch_swap()
1410 sarea_priv->last_frame++; in radeon_cp_dispatch_swap()1414 RADEON_FRAME_AGE(sarea_priv->last_frame); in radeon_cp_dispatch_swap()1455 dev_priv->sarea_priv->last_frame++; in radeon_cp_dispatch_flip()1461 RADEON_FRAME_AGE(dev_priv->sarea_priv->last_frame); in radeon_cp_dispatch_flip()
1752 dev_priv->sarea_priv->last_frame = 0; in r600_cp_init_ring_buffer()2288 dev_priv->sarea_priv->last_frame++; in r600_cp_dispatch_swap()2291 R600_FRAME_AGE(dev_priv->sarea_priv->last_frame); in r600_cp_dispatch_swap()
790 dev_priv->sarea_priv->last_frame = 0; in radeon_cp_init_ring_buffer()
133 uint8_t last_frame; member1372 if (temp->last_frame) { in ohci_setup_standard_chain_sub()1417 temp.last_frame = 0; in ohci_setup_standard_chain()1437 temp.last_frame = 1; in ohci_setup_standard_chain()1484 temp.last_frame = 1; in ohci_setup_standard_chain()1488 temp.last_frame = 1; in ohci_setup_standard_chain()1531 temp.last_frame = 1; in ohci_setup_standard_chain()
148 uint8_t last_frame; member1645 if (temp->last_frame) { in uhci_setup_standard_chain_sub()1685 temp.last_frame = 0; in uhci_setup_standard_chain()1723 temp.last_frame = 1; in uhci_setup_standard_chain()1747 temp.last_frame = 1; in uhci_setup_standard_chain()1751 temp.last_frame = 1; in uhci_setup_standard_chain()1808 temp.last_frame = 1; in uhci_setup_standard_chain()
146 uint8_t last_frame; member1748 if (temp->last_frame) { in ehci_setup_standard_chain_sub()1801 temp.last_frame = 0; in ehci_setup_standard_chain()1842 temp.last_frame = 1; in ehci_setup_standard_chain()1866 temp.last_frame = 1; in ehci_setup_standard_chain()1870 temp.last_frame = 1; in ehci_setup_standard_chain()1929 temp.last_frame = 1; in ehci_setup_standard_chain()
125 uint8_t last_frame; member1961 if (temp->last_frame) { in xhci_setup_generic_chain_sub()2013 temp.last_frame = 0; in xhci_setup_generic_chain()2118 temp.last_frame = 1; in xhci_setup_generic_chain()2158 temp.last_frame = 1; in xhci_setup_generic_chain()2160 temp.last_frame = 1; in xhci_setup_generic_chain()2235 temp.last_frame = 1; in xhci_setup_generic_chain()
451 unsigned int last_frame; member
1442 sarea_priv->last_frame++; in radeon_cp_dispatch_swap()1446 RADEON_FRAME_AGE(sarea_priv->last_frame); in radeon_cp_dispatch_swap()1488 master_priv->sarea_priv->last_frame++; in radeon_cp_dispatch_flip()1494 RADEON_FRAME_AGE(master_priv->sarea_priv->last_frame); in radeon_cp_dispatch_flip()
1912 master_priv->sarea_priv->last_frame = 0; in r600_cp_init_ring_buffer()2454 sarea_priv->last_frame++; in r600_cp_dispatch_swap()2457 R600_FRAME_AGE(sarea_priv->last_frame); in r600_cp_dispatch_swap()
839 master_priv->sarea_priv->last_frame = 0; in radeon_cp_init_ring_buffer()