Searched refs:QCA953X_DDR_REG_FLUSH_GE1 (Results 1 – 2 of 2) sorted by relevance
139 #define QCA953X_DDR_REG_FLUSH_GE1 (AR71XX_APB_BASE + 0xa0) macro
215 ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_GE1); in qca953x_chip_ddr_flush()