Home
last modified time | relevance | path

Searched refs:phy_ctrl (Results 1 – 23 of 23) sorted by relevance

/freebsd-12-stable/sys/arm/allwinner/
Daw_usbphy.c134 struct resource * phy_ctrl; member
227 sc->phy_ctrl = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in awusbphy_init()
229 if (sc->phy_ctrl == NULL) { in awusbphy_init()
288 val = bus_read_4(sc->phy_ctrl, PHY_CSR); in awusbphy_init()
295 bus_write_4(sc->phy_ctrl, PHY_CSR, val); in awusbphy_init()
426 val = bus_read_4(sc->phy_ctrl, PHY_CSR); in awusbphy_set_mode()
438 CLR4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); in awusbphy_set_mode()
443 SET4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); in awusbphy_set_mode()
449 bus_write_4(sc->phy_ctrl, PHY_CSR, val); in awusbphy_set_mode()
/freebsd-12-stable/sys/dev/igc/
Digc_phy.c476 u16 phy_ctrl; in igc_copper_link_autoneg() local
502 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl); in igc_copper_link_autoneg()
506 phy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG); in igc_copper_link_autoneg()
507 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl); in igc_copper_link_autoneg()
593 void igc_phy_force_speed_duplex_setup(struct igc_hw *hw, u16 *phy_ctrl) in igc_phy_force_speed_duplex_setup() argument
612 *phy_ctrl &= ~MII_CR_AUTO_NEG_EN; in igc_phy_force_speed_duplex_setup()
617 *phy_ctrl &= ~MII_CR_FULL_DUPLEX; in igc_phy_force_speed_duplex_setup()
621 *phy_ctrl |= MII_CR_FULL_DUPLEX; in igc_phy_force_speed_duplex_setup()
628 *phy_ctrl |= MII_CR_SPEED_100; in igc_phy_force_speed_duplex_setup()
629 *phy_ctrl &= ~MII_CR_SPEED_1000; in igc_phy_force_speed_duplex_setup()
[all …]
Digc_phy.h21 void igc_phy_force_speed_duplex_setup(struct igc_hw *hw, u16 *phy_ctrl);
/freebsd-12-stable/sys/dev/e1000/
De1000_phy.c1639 u16 phy_ctrl; in e1000_copper_link_autoneg() local
1665 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl); in e1000_copper_link_autoneg()
1669 phy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG); in e1000_copper_link_autoneg()
1670 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl); in e1000_copper_link_autoneg()
2025 void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl) in e1000_phy_force_speed_duplex_setup() argument
2044 *phy_ctrl &= ~MII_CR_AUTO_NEG_EN; in e1000_phy_force_speed_duplex_setup()
2049 *phy_ctrl &= ~MII_CR_FULL_DUPLEX; in e1000_phy_force_speed_duplex_setup()
2053 *phy_ctrl |= MII_CR_FULL_DUPLEX; in e1000_phy_force_speed_duplex_setup()
2060 *phy_ctrl |= MII_CR_SPEED_100; in e1000_phy_force_speed_duplex_setup()
2061 *phy_ctrl &= ~MII_CR_SPEED_1000; in e1000_phy_force_speed_duplex_setup()
[all …]
De1000_ich8lan.c3243 u32 phy_ctrl; in e1000_set_d0_lplu_state_ich8lan() local
3252 phy_ctrl = E1000_READ_REG(hw, E1000_PHY_CTRL); in e1000_set_d0_lplu_state_ich8lan()
3255 phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU; in e1000_set_d0_lplu_state_ich8lan()
3256 E1000_WRITE_REG(hw, E1000_PHY_CTRL, phy_ctrl); in e1000_set_d0_lplu_state_ich8lan()
3280 phy_ctrl &= ~E1000_PHY_CTRL_D0A_LPLU; in e1000_set_d0_lplu_state_ich8lan()
3281 E1000_WRITE_REG(hw, E1000_PHY_CTRL, phy_ctrl); in e1000_set_d0_lplu_state_ich8lan()
3339 u32 phy_ctrl; in e1000_set_d3_lplu_state_ich8lan() local
3345 phy_ctrl = E1000_READ_REG(hw, E1000_PHY_CTRL); in e1000_set_d3_lplu_state_ich8lan()
3348 phy_ctrl &= ~E1000_PHY_CTRL_NOND0A_LPLU; in e1000_set_d3_lplu_state_ich8lan()
3349 E1000_WRITE_REG(hw, E1000_PHY_CTRL, phy_ctrl); in e1000_set_d3_lplu_state_ich8lan()
[all …]
De1000_phy.h71 void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
/freebsd-12-stable/sys/dev/bwi/
Dif_bwi.c2919 uint16_t phy_ctrl; in bwi_encap() local
3010 phy_ctrl = __SHIFTIN(mac->mac_rf.rf_ant_mode, in bwi_encap()
3013 phy_ctrl |= BWI_TXH_PHY_C_OFDM; in bwi_encap()
3015 phy_ctrl |= BWI_TXH_PHY_C_SHPREAMBLE; in bwi_encap()
3024 hdr->txh_phy_ctrl = htole16(phy_ctrl); in bwi_encap()
3109 uint16_t phy_ctrl; in bwi_encap_raw() local
3192 phy_ctrl = __SHIFTIN(mac->mac_rf.rf_ant_mode, in bwi_encap_raw()
3195 phy_ctrl |= BWI_TXH_PHY_C_OFDM; in bwi_encap_raw()
3198 phy_ctrl |= BWI_TXH_PHY_C_SHPREAMBLE; in bwi_encap_raw()
3201 hdr->txh_phy_ctrl = htole16(phy_ctrl); in bwi_encap_raw()
/freebsd-12-stable/sys/gnu/dts/arm/
Dsun8i-a23.dtsi103 reg-names = "phy_ctrl", "pmu1";
Dam33xx.dtsi280 reg-names = "phy_ctrl", "wakeup";
Dsun8i-v3s.dtsi254 reg-names = "phy_ctrl",
Dsun8i-a33.dtsi432 reg-names = "phy_ctrl", "pmu1";
Ddm814x.dtsi427 reg-names = "phy_ctrl", "wakeup";
Dsun5i.dtsi381 reg-names = "phy_ctrl", "pmu1";
Dsun8i-r40.dtsi290 reg-names = "phy_ctrl",
Dsunxi-h3-h5.dtsi263 reg-names = "phy_ctrl",
Dsun4i-a10.dtsi507 reg-names = "phy_ctrl", "pmu1", "pmu2";
Dsun8i-a83t.dtsi622 reg-names = "phy_ctrl",
Dsun6i-a31.dtsi530 reg-names = "phy_ctrl",
Dsun7i-a20.dtsi609 reg-names = "phy_ctrl", "pmu1", "pmu2";
/freebsd-12-stable/sys/gnu/dts/arm64/allwinner/
Dsun50i-h6.dtsi561 reg-names = "phy_ctrl",
Dsun50i-a64.dtsi567 reg-names = "phy_ctrl",
/freebsd-12-stable/sys/contrib/octeon-sdk/
Dcvmx-pciercx-defs.h5763 uint32_t phy_ctrl : 32; /**< PHY Control */ member
5765 uint32_t phy_ctrl : 32;
Dcvmx-pcieepx-defs.h6065 uint32_t phy_ctrl : 32; /**< PHY Control */ member
6067 uint32_t phy_ctrl : 32;