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Searched refs:seq_printf (Results 1 – 25 of 39) sorted by relevance

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/dragonfly/sys/dev/drm/radeon/
HDrs400.c308 seq_printf(m, "HOST_PATH_CNTL 0x%08x\n", tmp); in rs400_debugfs_gart_info()
310 seq_printf(m, "BUS_CNTL 0x%08x\n", tmp); in rs400_debugfs_gart_info()
312 seq_printf(m, "AIC_CTRL_SCRATCH 0x%08x\n", tmp); in rs400_debugfs_gart_info()
315 seq_printf(m, "MCCFG_AGP_BASE 0x%08x\n", tmp); in rs400_debugfs_gart_info()
317 seq_printf(m, "MCCFG_AGP_BASE_2 0x%08x\n", tmp); in rs400_debugfs_gart_info()
319 seq_printf(m, "MCCFG_AGP_LOCATION 0x%08x\n", tmp); in rs400_debugfs_gart_info()
321 seq_printf(m, "MCCFG_FB_LOCATION 0x%08x\n", tmp); in rs400_debugfs_gart_info()
323 seq_printf(m, "HDP_FB_LOCATION 0x%08x\n", tmp); in rs400_debugfs_gart_info()
326 seq_printf(m, "AGP_BASE 0x%08x\n", tmp); in rs400_debugfs_gart_info()
328 seq_printf(m, "AGP_BASE_2 0x%08x\n", tmp); in rs400_debugfs_gart_info()
[all …]
HDradeon_ring.c475 seq_printf(m, "wptr: 0x%08x [%5d]\n", in radeon_debugfs_ring_info()
479 seq_printf(m, "rptr: 0x%08x [%5d]\n", in radeon_debugfs_ring_info()
484 seq_printf(m, "rptr next(0x%04x): 0x%08x [%5d]\n", in radeon_debugfs_ring_info()
489 seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n", in radeon_debugfs_ring_info()
491 seq_printf(m, "last semaphore signal addr : 0x%016llx\n", in radeon_debugfs_ring_info()
493 seq_printf(m, "last semaphore wait addr : 0x%016llx\n", in radeon_debugfs_ring_info()
495 seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw); in radeon_debugfs_ring_info()
496 seq_printf(m, "%u dwords in ring\n", count); in radeon_debugfs_ring_info()
506 seq_printf(m, "r[%5d]=0x%08x", i, ring->ring[i]); in radeon_debugfs_ring_info()
HDradeon_sa.c410 seq_printf(m, ">"); in radeon_sa_bo_dump_debug_info()
412 seq_printf(m, " "); in radeon_sa_bo_dump_debug_info()
414 seq_printf(m, "[0x%010llx 0x%010llx] size %8lld", in radeon_sa_bo_dump_debug_info()
417 seq_printf(m, " protected by 0x%016llx on ring %d", in radeon_sa_bo_dump_debug_info()
420 seq_printf(m, "\n"); in radeon_sa_bo_dump_debug_info()
HDr100.c2941 seq_printf(m, "RBBM_STATUS 0x%08x\n", RREG32(RADEON_RBBM_STATUS)); in r100_debugfs_rbbm_info()
2942 seq_printf(m, "RBBM_CMDFIFO_STAT 0x%08x\n", RREG32(0xE7C)); in r100_debugfs_rbbm_info()
2943 seq_printf(m, "CP_STAT 0x%08x\n", RREG32(RADEON_CP_STAT)); in r100_debugfs_rbbm_info()
2949 seq_printf(m, "[0x%03X] 0x%04X=0x%08X\n", i, reg, value); in r100_debugfs_rbbm_info()
2967 seq_printf(m, "CP_STAT 0x%08x\n", RREG32(RADEON_CP_STAT)); in r100_debugfs_cp_ring_info()
2968 seq_printf(m, "CP_RB_WPTR 0x%08x\n", wdp); in r100_debugfs_cp_ring_info()
2969 seq_printf(m, "CP_RB_RPTR 0x%08x\n", rdp); in r100_debugfs_cp_ring_info()
2970 seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw); in r100_debugfs_cp_ring_info()
2971 seq_printf(m, "%u dwords in ring\n", count); in r100_debugfs_cp_ring_info()
2975 seq_printf(m, "r[%04d]=0x%08x\n", i, ring->ring[i]); in r100_debugfs_cp_ring_info()
[all …]
HDradeon_fence.c982 seq_printf(m, "--- ring %d ---\n", i); in radeon_debugfs_fence_info()
983 seq_printf(m, "Last signaled fence 0x%016llx\n", in radeon_debugfs_fence_info()
985 seq_printf(m, "Last emitted 0x%016llx\n", in radeon_debugfs_fence_info()
990 seq_printf(m, "Last sync to ring %d 0x%016llx\n", in radeon_debugfs_fence_info()
1009 seq_printf(m, "%d\n", rdev->needs_reset); in radeon_debugfs_gpu_reset()
HDr420.c484 seq_printf(m, "GB_PIPE_SELECT 0x%08x\n", tmp); in r420_debugfs_pipes_info()
486 seq_printf(m, "GB_TILE_CONFIG 0x%08x\n", tmp); in r420_debugfs_pipes_info()
488 seq_printf(m, "DST_PIPE_CONFIG 0x%08x\n", tmp); in r420_debugfs_pipes_info()
HDr300.c591 seq_printf(m, "PCIE_TX_GART_CNTL 0x%08x\n", tmp); in rv370_debugfs_pcie_gart_info()
593 seq_printf(m, "PCIE_TX_GART_BASE 0x%08x\n", tmp); in rv370_debugfs_pcie_gart_info()
595 seq_printf(m, "PCIE_TX_GART_START_LO 0x%08x\n", tmp); in rv370_debugfs_pcie_gart_info()
597 seq_printf(m, "PCIE_TX_GART_START_HI 0x%08x\n", tmp); in rv370_debugfs_pcie_gart_info()
599 seq_printf(m, "PCIE_TX_GART_END_LO 0x%08x\n", tmp); in rv370_debugfs_pcie_gart_info()
601 seq_printf(m, "PCIE_TX_GART_END_HI 0x%08x\n", tmp); in rv370_debugfs_pcie_gart_info()
603 seq_printf(m, "PCIE_TX_GART_ERROR 0x%08x\n", tmp); in rv370_debugfs_pcie_gart_info()
HDradeon_pm.c1966 seq_printf(m, "PX asic powered off\n"); in radeon_debugfs_pm_info()
1972 seq_printf(m, "Debugfs support not implemented for this asic\n"); in radeon_debugfs_pm_info()
1975 seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk); in radeon_debugfs_pm_info()
1978seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); in radeon_debugfs_pm_info()
1980seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); in radeon_debugfs_pm_info()
1981 seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); in radeon_debugfs_pm_info()
1983seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); in radeon_debugfs_pm_info()
1985 seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc); in radeon_debugfs_pm_info()
1987 seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev)); in radeon_debugfs_pm_info()
HDrv515.c240 seq_printf(m, "GB_PIPE_SELECT 0x%08x\n", tmp); in rv515_debugfs_pipes_info()
242 seq_printf(m, "SU_REG_DEST 0x%08x\n", tmp); in rv515_debugfs_pipes_info()
244 seq_printf(m, "GB_TILE_CONFIG 0x%08x\n", tmp); in rv515_debugfs_pipes_info()
246 seq_printf(m, "DST_PIPE_CONFIG 0x%08x\n", tmp); in rv515_debugfs_pipes_info()
258 seq_printf(m, "VAP_CNTL_STATUS 0x%08x\n", tmp); in rv515_debugfs_ga_info()
261 seq_printf(m, "GA_IDLE 0x%08x\n", tmp); in rv515_debugfs_ga_info()
HDrs780_dpm.c993 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rs780_dpm_debugfs_print_current_performance_level()
997 seq_printf(m, "power level 0 sclk: %u vddc_index: %d\n", in rs780_dpm_debugfs_print_current_performance_level()
1000 seq_printf(m, "power level 1 sclk: %u vddc_index: %d\n", in rs780_dpm_debugfs_print_current_performance_level()
HDsumo_dpm.c1827 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in sumo_dpm_debugfs_print_current_performance_level()
1828 seq_printf(m, "power level %d sclk: %u vddc: %u\n", in sumo_dpm_debugfs_print_current_performance_level()
1832 seq_printf(m, "invalid dpm profile %d\n", current_index); in sumo_dpm_debugfs_print_current_performance_level()
1835 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in sumo_dpm_debugfs_print_current_performance_level()
1836 seq_printf(m, "power level %d sclk: %u vddc: %u\n", in sumo_dpm_debugfs_print_current_performance_level()
/dragonfly/sys/dev/drm/amd/amdgpu/
HDamdgpu_pm.c2039 seq_printf(m, "GFX Clocks and Power:\n"); in amdgpu_debugfs_pm_info_pp()
2041 seq_printf(m, "\t%u MHz (MCLK)\n", value/100); in amdgpu_debugfs_pm_info_pp()
2043 seq_printf(m, "\t%u MHz (SCLK)\n", value/100); in amdgpu_debugfs_pm_info_pp()
2045 seq_printf(m, "\t%u MHz (PSTATE_SCLK)\n", value/100); in amdgpu_debugfs_pm_info_pp()
2047 seq_printf(m, "\t%u MHz (PSTATE_MCLK)\n", value/100); in amdgpu_debugfs_pm_info_pp()
2049 seq_printf(m, "\t%u mV (VDDGFX)\n", value); in amdgpu_debugfs_pm_info_pp()
2051 seq_printf(m, "\t%u mV (VDDNB)\n", value); in amdgpu_debugfs_pm_info_pp()
2054 seq_printf(m, "\t%u.%u W (average GPU)\n", query >> 8, query & 0xff); in amdgpu_debugfs_pm_info_pp()
2056 seq_printf(m, "\n"); in amdgpu_debugfs_pm_info_pp()
2060 seq_printf(m, "GPU Temperature: %u C\n", value/1000); in amdgpu_debugfs_pm_info_pp()
[all …]
HDamdgpu_kms.c1123 seq_printf(m, "VCE feature version: %u, firmware version: 0x%08x\n", in amdgpu_debugfs_firmware_info()
1131 seq_printf(m, "UVD feature version: %u, firmware version: 0x%08x\n", in amdgpu_debugfs_firmware_info()
1139 seq_printf(m, "MC feature version: %u, firmware version: 0x%08x\n", in amdgpu_debugfs_firmware_info()
1147 seq_printf(m, "ME feature version: %u, firmware version: 0x%08x\n", in amdgpu_debugfs_firmware_info()
1155 seq_printf(m, "PFP feature version: %u, firmware version: 0x%08x\n", in amdgpu_debugfs_firmware_info()
1163 seq_printf(m, "CE feature version: %u, firmware version: 0x%08x\n", in amdgpu_debugfs_firmware_info()
1171 seq_printf(m, "RLC feature version: %u, firmware version: 0x%08x\n", in amdgpu_debugfs_firmware_info()
1179 seq_printf(m, "RLC SRLC feature version: %u, firmware version: 0x%08x\n", in amdgpu_debugfs_firmware_info()
1187 seq_printf(m, "RLC SRLG feature version: %u, firmware version: 0x%08x\n", in amdgpu_debugfs_firmware_info()
1195 seq_printf(m, "RLC SRLS feature version: %u, firmware version: 0x%08x\n", in amdgpu_debugfs_firmware_info()
[all …]
HDamdgpu_fence.c678 seq_printf(m, "--- ring %d (%s) ---\n", i, ring->name); in amdgpu_debugfs_fence_info()
679 seq_printf(m, "Last signaled fence 0x%08x\n", in amdgpu_debugfs_fence_info()
681 seq_printf(m, "Last emitted 0x%08x\n", in amdgpu_debugfs_fence_info()
688 seq_printf(m, "Last preempted 0x%08x\n", in amdgpu_debugfs_fence_info()
691 seq_printf(m, "Last reset 0x%08x\n", in amdgpu_debugfs_fence_info()
694 seq_printf(m, "Last both 0x%08x\n", in amdgpu_debugfs_fence_info()
711 seq_printf(m, "gpu recover\n"); in amdgpu_debugfs_gpu_recover()
HDamdgpu_sa.c383 seq_printf(m, ">"); in amdgpu_sa_bo_dump_debug_info()
385 seq_printf(m, " "); in amdgpu_sa_bo_dump_debug_info()
387 seq_printf(m, "[0x%010llx 0x%010llx] size %8lld", in amdgpu_sa_bo_dump_debug_info()
391 seq_printf(m, " protected by 0x%08x on context %llu", in amdgpu_sa_bo_dump_debug_info()
394 seq_printf(m, "\n"); in amdgpu_sa_bo_dump_debug_info()
HDamdgpu_gem.c801 seq_printf((m), " " #flag); \
829 seq_printf(m, "\t0x%08x: %12ld byte %s", in amdgpu_debugfs_gem_bo_info()
834 seq_printf(m, " pin count %d", pin_count); in amdgpu_debugfs_gem_bo_info()
840 seq_printf(m, " imported from %p", dma_buf); in amdgpu_debugfs_gem_bo_info()
842 seq_printf(m, " exported as %p", dma_buf); in amdgpu_debugfs_gem_bo_info()
853 seq_printf(m, "\n"); in amdgpu_debugfs_gem_bo_info()
880 seq_printf(m, "pid %8d command %s:\n", pid_nr(file->pid), in amdgpu_debugfs_gem_info()
HDamdgpu_debugfs.c879 seq_printf(m, "run ib test:\n"); in amdgpu_debugfs_test_ib()
882 seq_printf(m, "ib ring tests failed (%d).\n", r); in amdgpu_debugfs_test_ib()
884 seq_printf(m, "ib ring tests passed.\n"); in amdgpu_debugfs_test_ib()
914 seq_printf(m, "(%d)\n", amdgpu_bo_evict_vram(adev)); in amdgpu_debugfs_evict_vram()
924 seq_printf(m, "(%d)\n", ttm_bo_evict_mm(&adev->mman.bdev, TTM_PL_TT)); in amdgpu_debugfs_evict_gtt()
/dragonfly/sys/dev/drm/
HDdrm_dp_helper.c557 seq_printf(m, "\tDP branch device present: %s\n", in drm_dp_downstream_debug()
591 seq_printf(m, "\t\tID: %s\n", id); in drm_dp_downstream_debug()
595 seq_printf(m, "\t\tHW: %d.%d\n", in drm_dp_downstream_debug()
600 seq_printf(m, "\t\tSW: %d.%d\n", rev[0], rev[1]); in drm_dp_downstream_debug()
607 seq_printf(m, "\t\tMax dot clock: %d kHz\n", clk); in drm_dp_downstream_debug()
609 seq_printf(m, "\t\tMax TMDS clock: %d kHz\n", clk); in drm_dp_downstream_debug()
615 seq_printf(m, "\t\tMax bpc: %d\n", bpc); in drm_dp_downstream_debug()
HDlinux_printf.c32 seq_printf(struct seq_file *m, const char *f, ...) in seq_printf() function
HDdrm_print.c32 seq_printf(p->arg, "%pV", vaf); in __drm_printfn_seq_file()
HDdrm_dp_mst_topology.c2931 seq_printf(m, "%smst: %p, %d\n", prefix, mstb, mstb->num_ports); in drm_dp_mst_dump_mstb()
2933seq_printf(m, "%sport: %d: input: %d: pdt: %d, ddps: %d ldps: %d, sdp: %d/%d, %p, conn: %p\n", pre… in drm_dp_mst_dump_mstb()
2984 seq_printf(m, "vcpi: %lx %lx %d\n", mgr->payload_mask, mgr->vcpi_mask, in drm_dp_mst_dump_topology()
2993 seq_printf(m, "vcpi %d: %d %d %d sink name: %s\n", i, in drm_dp_mst_dump_topology()
2998 seq_printf(m, "vcpi %d:unused\n", i); in drm_dp_mst_dump_topology()
3001 seq_printf(m, "payload %d: %d, %d, %d\n", in drm_dp_mst_dump_topology()
3017 seq_printf(m, "dpcd: %*ph\n", DP_RECEIVER_CAP_SIZE, buf); in drm_dp_mst_dump_topology()
3019 seq_printf(m, "faux/mst: %*ph\n", 2, buf); in drm_dp_mst_dump_topology()
3021 seq_printf(m, "mst ctrl: %*ph\n", 1, buf); in drm_dp_mst_dump_topology()
3025 seq_printf(m, "branch oui: %*phN devid: ", 3, buf); in drm_dp_mst_dump_topology()
[all …]
/dragonfly/sys/dev/drm/include/linux/
HDseq_file.h42 void seq_printf(struct seq_file *m, const char *f, ...);
/dragonfly/sys/dev/drm/ttm/
HDttm_page_alloc.c1016 seq_printf(m, "No pool allocator running.\n");
1019 seq_printf(m, "%7s %12s %13s %8s\n",
1024 seq_printf(m, "%7s %12ld %13ld %8d\n",
HDttm_page_alloc_dma.c1223 seq_printf(m, "No pool allocator running.\n"); in ttm_dma_page_alloc_debugfs()
1226 seq_printf(m, " pool refills pages freed inuse available name\n"); in ttm_dma_page_alloc_debugfs()
1233 seq_printf(m, "%13s %12ld %13ld %8d %8d %8s\n", in ttm_dma_page_alloc_debugfs()
/dragonfly/sys/dev/drm/i915/
HDi915_gem_gtt.c1462 seq_printf(m, "\tPDPE #%d\n", pdpe); in gen8_dump_pdp()
1484seq_printf(m, "\t\t0x%llx [%03d,%03d,%04d]: =", va, pdpe, pde, pte); in gen8_dump_pdp()
1487seq_printf(m, " %llx", pt_vaddr[pte + i]); in gen8_dump_pdp()
1514 seq_printf(m, " PML4E #%llu\n", pml4e); in gen8_dump_ppgtt()
1649 seq_printf(m, "\tPDE #%d mismatch: Actual PDE: %x Expected PDE: %x\n", in gen6_dump_ppgtt()
1653 seq_printf(m, "\tPDE: %x\n", pd_entry); in gen6_dump_ppgtt()
1669 seq_printf(m, "\t\t0x%lx [%03d,%04d]: =", va, pde, pte); in gen6_dump_ppgtt()
1672 seq_printf(m, " %08x", pt_vaddr[pte + i]); in gen6_dump_ppgtt()

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